1//===-- MCTargetDesc/AMDGPUMCAsmInfo.cpp - Assembly Info ------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7/// \file
8//===----------------------------------------------------------------------===//
9
10#include "AMDGPUMCAsmInfo.h"
11#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
12#include "llvm/MC/MCSubtargetInfo.h"
13#include "llvm/TargetParser/Triple.h"
14
15using namespace llvm;
16
17AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT,
18 const MCTargetOptions &Options) {
19 CodePointerSize = (TT.getArch() == Triple::amdgcn) ? 8 : 4;
20 StackGrowsUp = true;
21 HasSingleParameterDotFile = false;
22 //===------------------------------------------------------------------===//
23 MinInstAlignment = 4;
24
25 // This is the maximum instruction encoded size for gfx10. With a known
26 // subtarget, it can be reduced to 8 bytes.
27 MaxInstLength = (TT.getArch() == Triple::amdgcn) ? 20 : 16;
28 SeparatorString = "\n";
29 CommentString = ";";
30 InlineAsmStart = ";#ASMSTART";
31 InlineAsmEnd = ";#ASMEND";
32
33 //===--- Data Emission Directives -------------------------------------===//
34 UsesELFSectionDirectiveForBSS = true;
35
36 //===--- Global Variable Emission Directives --------------------------===//
37 HasAggressiveSymbolFolding = true;
38 COMMDirectiveAlignmentIsInBytes = false;
39 HasNoDeadStrip = true;
40 //===--- Dwarf Emission Directives -----------------------------------===//
41 SupportsDebugInformation = true;
42 UsesCFIWithoutEH = true;
43 DwarfRegNumForCFI = true;
44
45 UseIntegratedAssembler = false;
46}
47
48bool AMDGPUMCAsmInfo::shouldOmitSectionDirective(StringRef SectionName) const {
49 return SectionName == ".hsatext" || SectionName == ".hsadata_global_agent" ||
50 SectionName == ".hsadata_global_program" ||
51 SectionName == ".hsarodata_readonly_agent" ||
52 MCAsmInfo::shouldOmitSectionDirective(SectionName);
53}
54
55unsigned AMDGPUMCAsmInfo::getMaxInstLength(const MCSubtargetInfo *STI) const {
56 if (!STI || STI->getTargetTriple().getArch() == Triple::r600)
57 return MaxInstLength;
58
59 // Maximum for NSA encoded images
60 if (STI->hasFeature(AMDGPU::FeatureNSAEncoding))
61 return 20;
62
63 // 64-bit instruction with 32-bit literal.
64 if (STI->hasFeature(AMDGPU::FeatureVOP3Literal))
65 return 12;
66
67 return 8;
68}
69

source code of llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp