1 | //===-- NVPTXISelDAGToDAG.h - A dag to dag inst selector for NVPTX --------===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // This file defines an instruction selector for the NVPTX target. |
10 | // |
11 | //===----------------------------------------------------------------------===// |
12 | |
13 | #ifndef LLVM_LIB_TARGET_NVPTX_NVPTXISELDAGTODAG_H |
14 | #define LLVM_LIB_TARGET_NVPTX_NVPTXISELDAGTODAG_H |
15 | |
16 | #include "MCTargetDesc/NVPTXBaseInfo.h" |
17 | #include "NVPTX.h" |
18 | #include "NVPTXISelLowering.h" |
19 | #include "NVPTXRegisterInfo.h" |
20 | #include "NVPTXTargetMachine.h" |
21 | #include "llvm/CodeGen/SelectionDAGISel.h" |
22 | #include "llvm/IR/InlineAsm.h" |
23 | #include "llvm/IR/Intrinsics.h" |
24 | #include "llvm/Support/Compiler.h" |
25 | |
26 | namespace llvm { |
27 | |
28 | class LLVM_LIBRARY_VISIBILITY NVPTXDAGToDAGISel : public SelectionDAGISel { |
29 | const NVPTXTargetMachine &TM; |
30 | |
31 | // If true, generate mul.wide from sext and mul |
32 | bool doMulWide; |
33 | |
34 | int getDivF32Level() const; |
35 | bool usePrecSqrtF32() const; |
36 | bool useF32FTZ() const; |
37 | bool allowFMA() const; |
38 | bool allowUnsafeFPMath() const; |
39 | bool doRsqrtOpt() const; |
40 | |
41 | public: |
42 | static char ID; |
43 | |
44 | NVPTXDAGToDAGISel() = delete; |
45 | |
46 | explicit NVPTXDAGToDAGISel(NVPTXTargetMachine &tm, CodeGenOptLevel OptLevel); |
47 | |
48 | bool runOnMachineFunction(MachineFunction &MF) override; |
49 | const NVPTXSubtarget *Subtarget = nullptr; |
50 | |
51 | bool SelectInlineAsmMemoryOperand(const SDValue &Op, |
52 | InlineAsm::ConstraintCode ConstraintID, |
53 | std::vector<SDValue> &OutOps) override; |
54 | |
55 | private: |
56 | // Include the pieces autogenerated from the target description. |
57 | #include "NVPTXGenDAGISel.inc" |
58 | |
59 | void Select(SDNode *N) override; |
60 | bool tryIntrinsicNoChain(SDNode *N); |
61 | bool tryIntrinsicChain(SDNode *N); |
62 | void SelectTexSurfHandle(SDNode *N); |
63 | bool tryLoad(SDNode *N); |
64 | bool tryLoadVector(SDNode *N); |
65 | bool tryLDGLDU(SDNode *N); |
66 | bool tryStore(SDNode *N); |
67 | bool tryStoreVector(SDNode *N); |
68 | bool tryLoadParam(SDNode *N); |
69 | bool tryStoreRetval(SDNode *N); |
70 | bool tryStoreParam(SDNode *N); |
71 | void SelectAddrSpaceCast(SDNode *N); |
72 | bool tryTextureIntrinsic(SDNode *N); |
73 | bool trySurfaceIntrinsic(SDNode *N); |
74 | bool tryBFE(SDNode *N); |
75 | bool tryConstantFP(SDNode *N); |
76 | bool SelectSETP_F16X2(SDNode *N); |
77 | bool SelectSETP_BF16X2(SDNode *N); |
78 | bool (SDNode *N); |
79 | |
80 | inline SDValue getI32Imm(unsigned Imm, const SDLoc &DL) { |
81 | return CurDAG->getTargetConstant(Imm, DL, MVT::i32); |
82 | } |
83 | |
84 | // Match direct address complex pattern. |
85 | bool SelectDirectAddr(SDValue N, SDValue &Address); |
86 | |
87 | bool SelectADDRri_imp(SDNode *OpNode, SDValue Addr, SDValue &Base, |
88 | SDValue &Offset, MVT mvt); |
89 | bool SelectADDRri(SDNode *OpNode, SDValue Addr, SDValue &Base, |
90 | SDValue &Offset); |
91 | bool SelectADDRri64(SDNode *OpNode, SDValue Addr, SDValue &Base, |
92 | SDValue &Offset); |
93 | bool SelectADDRsi_imp(SDNode *OpNode, SDValue Addr, SDValue &Base, |
94 | SDValue &Offset, MVT mvt); |
95 | bool SelectADDRsi(SDNode *OpNode, SDValue Addr, SDValue &Base, |
96 | SDValue &Offset); |
97 | bool SelectADDRsi64(SDNode *OpNode, SDValue Addr, SDValue &Base, |
98 | SDValue &Offset); |
99 | |
100 | bool ChkMemSDNodeAddressSpace(SDNode *N, unsigned int spN) const; |
101 | |
102 | static unsigned GetConvertOpcode(MVT DestTy, MVT SrcTy, LoadSDNode *N); |
103 | }; |
104 | } // end namespace llvm |
105 | |
106 | #endif |
107 | |