| 1 | //===- X86ManualFoldTables.def ----------------------------*- C++ -*-==// |
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| 2 | // |
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| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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| 4 | // See https://llvm.org/LICENSE.txt for license information. |
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| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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| 6 | // |
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| 7 | //===----------------------------------------------------------------------===// |
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| 8 | // \file |
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| 9 | // This file defines all the entries in X86 memory folding tables that need |
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| 10 | // special handling. |
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| 11 | //===----------------------------------------------------------------------===// |
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| 12 | |
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| 13 | #ifndef NOFOLD |
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| 14 | #define NOFOLD(INSN) |
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| 15 | #endif |
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| 16 | NOFOLD(BTC16rr) |
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| 17 | NOFOLD(BTC32rr) |
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| 18 | NOFOLD(BTC64rr) |
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| 19 | NOFOLD(BTR16rr) |
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| 20 | NOFOLD(BTR32rr) |
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| 21 | NOFOLD(BTR64rr) |
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| 22 | NOFOLD(BTS16rr) |
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| 23 | NOFOLD(BTS32rr) |
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| 24 | NOFOLD(BTS64rr) |
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| 25 | NOFOLD(VCOMPRESSPDZ128rrk) |
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| 26 | NOFOLD(VCOMPRESSPDZ256rrk) |
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| 27 | NOFOLD(VCOMPRESSPDZrrk) |
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| 28 | NOFOLD(VCOMPRESSPSZ128rrk) |
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| 29 | NOFOLD(VCOMPRESSPSZ256rrk) |
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| 30 | NOFOLD(VCOMPRESSPSZrrk) |
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| 31 | NOFOLD(VCVTPS2PHZ128rrk) |
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| 32 | NOFOLD(VCVTPS2PHZ256rrk) |
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| 33 | NOFOLD(VCVTPS2PHZrrk) |
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| 34 | NOFOLD(VEXTRACTF32x4Z256rrk) |
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| 35 | NOFOLD(VEXTRACTF32x4Zrrk) |
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| 36 | NOFOLD(VEXTRACTF32x8Zrrk) |
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| 37 | NOFOLD(VEXTRACTF64x2Z256rrk) |
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| 38 | NOFOLD(VEXTRACTF64x2Zrrk) |
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| 39 | NOFOLD(VEXTRACTF64x4Zrrk) |
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| 40 | NOFOLD(VEXTRACTI32x4Z256rrk) |
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| 41 | NOFOLD(VEXTRACTI32x4Zrrk) |
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| 42 | NOFOLD(VEXTRACTI32x8Zrrk) |
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| 43 | NOFOLD(VEXTRACTI64x2Z256rrk) |
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| 44 | NOFOLD(VEXTRACTI64x2Zrrk) |
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| 45 | NOFOLD(VEXTRACTI64x4Zrrk) |
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| 46 | NOFOLD(VMOVAPDZ128mrk) |
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| 47 | NOFOLD(VMOVAPDZ256mrk) |
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| 48 | NOFOLD(VMOVAPDZmrk) |
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| 49 | NOFOLD(VMOVAPSZ128mrk) |
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| 50 | NOFOLD(VMOVAPSZ256mrk) |
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| 51 | NOFOLD(VMOVAPSZmrk) |
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| 52 | NOFOLD(VMOVDQA32Z128mrk) |
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| 53 | NOFOLD(VMOVDQA32Z256mrk) |
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| 54 | NOFOLD(VMOVDQA32Zmrk) |
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| 55 | NOFOLD(VMOVDQA64Z128mrk) |
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| 56 | NOFOLD(VMOVDQA64Z256mrk) |
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| 57 | NOFOLD(VMOVDQA64Zmrk) |
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| 58 | NOFOLD(VMOVDQU16Z128mrk) |
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| 59 | NOFOLD(VMOVDQU16Z256mrk) |
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| 60 | NOFOLD(VMOVDQU16Zmrk) |
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| 61 | NOFOLD(VMOVDQU32Z128mrk) |
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| 62 | NOFOLD(VMOVDQU32Z256mrk) |
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| 63 | NOFOLD(VMOVDQU32Zmrk) |
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| 64 | NOFOLD(VMOVDQU64Z128mrk) |
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| 65 | NOFOLD(VMOVDQU64Z256mrk) |
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| 66 | NOFOLD(VMOVDQU64Zmrk) |
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| 67 | NOFOLD(VMOVDQU8Z128mrk) |
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| 68 | NOFOLD(VMOVDQU8Z256mrk) |
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| 69 | NOFOLD(VMOVDQU8Zmrk) |
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| 70 | NOFOLD(VMOVUPDZ128mrk) |
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| 71 | NOFOLD(VMOVUPDZ256mrk) |
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| 72 | NOFOLD(VMOVUPDZmrk) |
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| 73 | NOFOLD(VMOVUPSZ128mrk) |
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| 74 | NOFOLD(VMOVUPSZ256mrk) |
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| 75 | NOFOLD(VMOVUPSZmrk) |
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| 76 | NOFOLD(VPCOMPRESSBZ128rrk) |
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| 77 | NOFOLD(VPCOMPRESSBZ256rrk) |
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| 78 | NOFOLD(VPCOMPRESSBZrrk) |
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| 79 | NOFOLD(VPCOMPRESSDZ128rrk) |
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| 80 | NOFOLD(VPCOMPRESSDZ256rrk) |
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| 81 | NOFOLD(VPCOMPRESSDZrrk) |
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| 82 | NOFOLD(VPCOMPRESSQZ128rrk) |
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| 83 | NOFOLD(VPCOMPRESSQZ256rrk) |
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| 84 | NOFOLD(VPCOMPRESSQZrrk) |
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| 85 | NOFOLD(VPCOMPRESSWZ128rrk) |
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| 86 | NOFOLD(VPCOMPRESSWZ256rrk) |
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| 87 | NOFOLD(VPCOMPRESSWZrrk) |
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| 88 | NOFOLD(VPMOVDBZ128rrk) |
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| 89 | NOFOLD(VPMOVDBZ256rrk) |
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| 90 | NOFOLD(VPMOVDBZrrk) |
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| 91 | NOFOLD(VPMOVDWZ128rrk) |
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| 92 | NOFOLD(VPMOVDWZ256rrk) |
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| 93 | NOFOLD(VPMOVDWZrrk) |
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| 94 | NOFOLD(VPMOVQBZ128rrk) |
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| 95 | NOFOLD(VPMOVQBZ256rrk) |
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| 96 | NOFOLD(VPMOVQBZrrk) |
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| 97 | NOFOLD(VPMOVQDZ128rrk) |
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| 98 | NOFOLD(VPMOVQDZ256rrk) |
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| 99 | NOFOLD(VPMOVQDZrrk) |
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| 100 | NOFOLD(VPMOVQWZ128rrk) |
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| 101 | NOFOLD(VPMOVQWZ256rrk) |
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| 102 | NOFOLD(VPMOVQWZrrk) |
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| 103 | NOFOLD(VPMOVSDBZ128rrk) |
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| 104 | NOFOLD(VPMOVSDBZ256rrk) |
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| 105 | NOFOLD(VPMOVSDBZrrk) |
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| 106 | NOFOLD(VPMOVSDWZ128rrk) |
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| 107 | NOFOLD(VPMOVSDWZ256rrk) |
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| 108 | NOFOLD(VPMOVSDWZrrk) |
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| 109 | NOFOLD(VPMOVSQBZ128rrk) |
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| 110 | NOFOLD(VPMOVSQBZ256rrk) |
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| 111 | NOFOLD(VPMOVSQBZrrk) |
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| 112 | NOFOLD(VPMOVSQDZ128rrk) |
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| 113 | NOFOLD(VPMOVSQDZ256rrk) |
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| 114 | NOFOLD(VPMOVSQDZrrk) |
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| 115 | NOFOLD(VPMOVSQWZ128rrk) |
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| 116 | NOFOLD(VPMOVSQWZ256rrk) |
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| 117 | NOFOLD(VPMOVSQWZrrk) |
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| 118 | NOFOLD(VPMOVSWBZ128rrk) |
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| 119 | NOFOLD(VPMOVSWBZ256rrk) |
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| 120 | NOFOLD(VPMOVSWBZrrk) |
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| 121 | NOFOLD(VPMOVUSDBZ128rrk) |
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| 122 | NOFOLD(VPMOVUSDBZ256rrk) |
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| 123 | NOFOLD(VPMOVUSDBZrrk) |
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| 124 | NOFOLD(VPMOVUSDWZ128rrk) |
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| 125 | NOFOLD(VPMOVUSDWZ256rrk) |
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| 126 | NOFOLD(VPMOVUSDWZrrk) |
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| 127 | NOFOLD(VPMOVUSQBZ128rrk) |
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| 128 | NOFOLD(VPMOVUSQBZ256rrk) |
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| 129 | NOFOLD(VPMOVUSQBZrrk) |
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| 130 | NOFOLD(VPMOVUSQDZ128rrk) |
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| 131 | NOFOLD(VPMOVUSQDZ256rrk) |
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| 132 | NOFOLD(VPMOVUSQDZrrk) |
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| 133 | NOFOLD(VPMOVUSQWZ128rrk) |
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| 134 | NOFOLD(VPMOVUSQWZ256rrk) |
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| 135 | NOFOLD(VPMOVUSQWZrrk) |
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| 136 | NOFOLD(VPMOVUSWBZ128rrk) |
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| 137 | NOFOLD(VPMOVUSWBZ256rrk) |
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| 138 | NOFOLD(VPMOVUSWBZrrk) |
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| 139 | NOFOLD(VPMOVWBZ128rrk) |
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| 140 | NOFOLD(VPMOVWBZ256rrk) |
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| 141 | NOFOLD(VPMOVWBZrrk) |
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| 142 | NOFOLD(ARPL16rr) |
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| 143 | NOFOLD(BT16rr) |
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| 144 | NOFOLD(BT32rr) |
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| 145 | NOFOLD(BT64rr) |
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| 146 | NOFOLD(CMPXCHG16rr) |
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| 147 | NOFOLD(CMPXCHG32rr) |
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| 148 | NOFOLD(CMPXCHG64rr) |
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| 149 | NOFOLD(CMPXCHG8rr) |
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| 150 | NOFOLD(LLDT16r) |
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| 151 | NOFOLD(LMSW16r) |
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| 152 | NOFOLD(LTRr) |
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| 153 | NOFOLD(NOOPLr) |
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| 154 | NOFOLD(NOOPQr) |
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| 155 | NOFOLD(NOOPWr) |
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| 156 | NOFOLD(POP16rmr) |
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| 157 | NOFOLD(POP32rmr) |
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| 158 | NOFOLD(POP64rmr) |
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| 159 | NOFOLD(PUSH16rmr) |
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| 160 | NOFOLD(PUSH32rmr) |
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| 161 | NOFOLD(PUSH64rmr) |
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| 162 | NOFOLD(VCOMPRESSPDZ128rr) |
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| 163 | NOFOLD(VCOMPRESSPDZ256rr) |
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| 164 | NOFOLD(VCOMPRESSPDZrr) |
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| 165 | NOFOLD(VCOMPRESSPSZ128rr) |
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| 166 | NOFOLD(VCOMPRESSPSZ256rr) |
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| 167 | NOFOLD(VCOMPRESSPSZrr) |
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| 168 | NOFOLD(VERRr) |
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| 169 | NOFOLD(VERWr) |
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| 170 | NOFOLD(VMREAD32rr) |
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| 171 | NOFOLD(VMREAD64rr) |
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| 172 | NOFOLD(VPCOMPRESSBZ128rr) |
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| 173 | NOFOLD(VPCOMPRESSBZ256rr) |
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| 174 | NOFOLD(VPCOMPRESSBZrr) |
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| 175 | NOFOLD(VPCOMPRESSDZ128rr) |
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| 176 | NOFOLD(VPCOMPRESSDZ256rr) |
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| 177 | NOFOLD(VPCOMPRESSDZrr) |
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| 178 | NOFOLD(VPCOMPRESSQZ128rr) |
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| 179 | NOFOLD(VPCOMPRESSQZ256rr) |
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| 180 | NOFOLD(VPCOMPRESSQZrr) |
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| 181 | NOFOLD(VPCOMPRESSWZ128rr) |
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| 182 | NOFOLD(VPCOMPRESSWZ256rr) |
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| 183 | NOFOLD(VPCOMPRESSWZrr) |
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| 184 | NOFOLD(LAR16rr) |
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| 185 | NOFOLD(LAR32rr) |
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| 186 | NOFOLD(LAR64rr) |
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| 187 | NOFOLD(LSL16rr) |
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| 188 | NOFOLD(LSL32rr) |
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| 189 | NOFOLD(LSL64rr) |
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| 190 | NOFOLD(MOVSX16rr16) |
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| 191 | NOFOLD(MOVZX16rr16) |
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| 192 | NOFOLD(VMWRITE32rr) |
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| 193 | NOFOLD(VMWRITE64rr) |
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| 194 | NOFOLD(VBLENDMPDZ128rrkz) |
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| 195 | NOFOLD(VBLENDMPDZ256rrkz) |
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| 196 | NOFOLD(VBLENDMPDZrrkz) |
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| 197 | NOFOLD(VBLENDMPSZ128rrkz) |
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| 198 | NOFOLD(VBLENDMPSZ256rrkz) |
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| 199 | NOFOLD(VBLENDMPSZrrkz) |
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| 200 | NOFOLD(VPBLENDMBZ128rrkz) |
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| 201 | NOFOLD(VPBLENDMBZ256rrkz) |
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| 202 | NOFOLD(VPBLENDMBZrrkz) |
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| 203 | NOFOLD(VPBLENDMDZ128rrkz) |
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| 204 | NOFOLD(VPBLENDMDZ256rrkz) |
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| 205 | NOFOLD(VPBLENDMDZrrkz) |
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| 206 | NOFOLD(VPBLENDMQZ128rrkz) |
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| 207 | NOFOLD(VPBLENDMQZ256rrkz) |
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| 208 | NOFOLD(VPBLENDMQZrrkz) |
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| 209 | NOFOLD(VPBLENDMWZ128rrkz) |
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| 210 | NOFOLD(VPBLENDMWZ256rrkz) |
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| 211 | NOFOLD(VPBLENDMWZrrkz) |
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| 212 | NOFOLD(UD1Lr) |
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| 213 | NOFOLD(UD1Qr) |
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| 214 | NOFOLD(UD1Wr) |
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| 215 | // Exclude these two b/c they would conflict with {MMX_MOVD64from64rr, MMX_MOVQ64mr} in unfolding table |
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| 216 | NOFOLD(MMX_MOVQ64rr) |
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| 217 | NOFOLD(MMX_MOVQ64rr_REV) |
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| 218 | // INSERTPSrm has no count_s while INSERTPSrr has count_s. |
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| 219 | // count_s is to indicate which element in dst vector is inserted. |
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| 220 | // if count_s!=0, we can not fold INSERTPSrr into INSERTPSrm |
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| 221 | // |
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| 222 | // the following folding can happen when count_s==0 |
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| 223 | // load xmm0, m32 |
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| 224 | // insertpsrr xmm1, xmm0, imm |
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| 225 | // => |
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| 226 | // insertpsrm xmm1, m32, imm |
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| 227 | NOFOLD(INSERTPSrr) |
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| 228 | NOFOLD(VINSERTPSZrr) |
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| 229 | NOFOLD(VINSERTPSrr) |
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| 230 | // Memory faults are suppressed for CFCMOV with memory operand. |
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| 231 | NOFOLD(CFCMOV16rr_REV) |
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| 232 | NOFOLD(CFCMOV32rr_REV) |
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| 233 | NOFOLD(CFCMOV64rr_REV) |
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| 234 | NOFOLD(CFCMOV16rr_ND) |
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| 235 | NOFOLD(CFCMOV32rr_ND) |
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| 236 | NOFOLD(CFCMOV64rr_ND) |
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| 237 | #undef NOFOLD |
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| 238 | |
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| 239 | #ifndef ENTRY |
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| 240 | #define ENTRY(REG, MEM, FLAGS) |
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| 241 | #endif |
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| 242 | // The following entries are added manually b/c the encodings of reg form does not match the |
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| 243 | // encoding of memory form |
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| 244 | ENTRY(ADD16ri_DB, ADD16mi, TB_NO_REVERSE) |
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| 245 | ENTRY(ADD16rr_DB, ADD16mr, TB_NO_REVERSE) |
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| 246 | ENTRY(ADD32ri_DB, ADD32mi, TB_NO_REVERSE) |
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| 247 | ENTRY(ADD32rr_DB, ADD32mr, TB_NO_REVERSE) |
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| 248 | ENTRY(ADD64ri32_DB, ADD64mi32, TB_NO_REVERSE) |
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| 249 | ENTRY(ADD64rr_DB, ADD64mr, TB_NO_REVERSE) |
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| 250 | ENTRY(ADD8ri_DB, ADD8mi, TB_NO_REVERSE) |
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| 251 | ENTRY(ADD8rr_DB, ADD8mr, TB_NO_REVERSE) |
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| 252 | ENTRY(ADD16rr_DB, ADD16rm, TB_NO_REVERSE) |
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| 253 | ENTRY(ADD32rr_DB, ADD32rm, TB_NO_REVERSE) |
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| 254 | ENTRY(ADD64rr_DB, ADD64rm, TB_NO_REVERSE) |
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| 255 | ENTRY(ADD8rr_DB, ADD8rm, TB_NO_REVERSE) |
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| 256 | ENTRY(MMX_MOVD64from64rr, MMX_MOVQ64mr, TB_FOLDED_STORE) |
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| 257 | ENTRY(MMX_MOVD64grr, MMX_MOVD64mr, TB_FOLDED_STORE) |
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| 258 | ENTRY(MOV64toSDrr, MOV64mr, TB_FOLDED_STORE | TB_NO_REVERSE) |
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| 259 | ENTRY(MOVDI2SSrr, MOV32mr, TB_FOLDED_STORE | TB_NO_REVERSE) |
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| 260 | ENTRY(MOVPQIto64rr, MOVPQI2QImr, TB_FOLDED_STORE | TB_NO_REVERSE) |
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| 261 | ENTRY(MOVSDto64rr, MOVSDmr, TB_FOLDED_STORE | TB_NO_REVERSE) |
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| 262 | ENTRY(MOVSS2DIrr, MOVSSmr, TB_FOLDED_STORE) |
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| 263 | ENTRY(MOVLHPSrr, MOVHPSrm, TB_NO_REVERSE) |
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| 264 | ENTRY(PUSH16r, PUSH16rmm, TB_FOLDED_LOAD) |
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| 265 | ENTRY(PUSH32r, PUSH32rmm, TB_FOLDED_LOAD) |
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| 266 | ENTRY(PUSH64r, PUSH64rmm, TB_FOLDED_LOAD) |
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| 267 | ENTRY(TAILJMPr, TAILJMPm, TB_FOLDED_LOAD) |
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| 268 | ENTRY(TAILJMPr64, TAILJMPm64, TB_FOLDED_LOAD) |
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| 269 | ENTRY(TAILJMPr64_REX, TAILJMPm64_REX, TB_FOLDED_LOAD) |
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| 270 | ENTRY(TCRETURNri, TCRETURNmi, TB_FOLDED_LOAD | TB_NO_FORWARD) |
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| 271 | ENTRY(TCRETURNri64, TCRETURNmi64, TB_FOLDED_LOAD | TB_NO_FORWARD) |
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| 272 | ENTRY(VMOVLHPSZrr, VMOVHPSZ128rm, TB_NO_REVERSE) |
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| 273 | ENTRY(VMOVLHPSrr, VMOVHPSrm, TB_NO_REVERSE) |
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| 274 | ENTRY(VMOV64toSDZrr, MOV64mr, TB_FOLDED_STORE | TB_NO_REVERSE) |
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| 275 | ENTRY(VMOV64toSDrr, MOV64mr, TB_FOLDED_STORE | TB_NO_REVERSE) |
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| 276 | ENTRY(VMOVDI2SSZrr, MOV32mr, TB_FOLDED_STORE | TB_NO_REVERSE) |
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| 277 | ENTRY(VMOVDI2SSrr, MOV32mr, TB_FOLDED_STORE | TB_NO_REVERSE) |
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| 278 | ENTRY(VMOVPQIto64Zrr, VMOVPQI2QIZmr, TB_FOLDED_STORE | TB_NO_REVERSE) |
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| 279 | ENTRY(VMOVPQIto64rr, VMOVPQI2QImr, TB_FOLDED_STORE | TB_NO_REVERSE) |
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| 280 | ENTRY(VMOVSDto64Zrr, VMOVSDZmr, TB_FOLDED_STORE | TB_NO_REVERSE) |
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| 281 | ENTRY(VMOVSDto64rr, VMOVSDmr, TB_FOLDED_STORE | TB_NO_REVERSE) |
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| 282 | ENTRY(VMOVSS2DIZrr, VMOVSSZmr, TB_FOLDED_STORE) |
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| 283 | ENTRY(VMOVSS2DIrr, VMOVSSmr, TB_FOLDED_STORE) |
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| 284 | ENTRY(MMX_MOVD64to64rr, MMX_MOVQ64rm, 0) |
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| 285 | ENTRY(MOV64toPQIrr, MOVQI2PQIrm, TB_NO_REVERSE) |
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| 286 | ENTRY(MOV64toSDrr, MOVSDrm_alt, TB_NO_REVERSE) |
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| 287 | ENTRY(MOVDI2SSrr, MOVSSrm_alt, 0) |
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| 288 | ENTRY(VMOV64toPQIZrr, VMOVQI2PQIZrm, TB_NO_REVERSE) |
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| 289 | ENTRY(VMOV64toPQIrr, VMOVQI2PQIrm, TB_NO_REVERSE) |
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| 290 | ENTRY(VMOV64toSDZrr, VMOVSDZrm_alt, TB_NO_REVERSE) |
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| 291 | ENTRY(VMOV64toSDrr, VMOVSDrm_alt, TB_NO_REVERSE) |
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| 292 | ENTRY(VMOVDI2SSZrr, VMOVSSZrm_alt, 0) |
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| 293 | ENTRY(VMOVDI2SSrr, VMOVSSrm_alt, 0) |
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| 294 | ENTRY(MOVSDrr, MOVLPDrm, TB_NO_REVERSE) |
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| 295 | ENTRY(VMOVSDZrr, VMOVLPDZ128rm, TB_NO_REVERSE) |
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| 296 | ENTRY(VMOVSDrr, VMOVLPDrm, TB_NO_REVERSE) |
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| 297 | #undef ENTRY |
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| 298 | |
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