1 | /**************************************************************************** |
2 | ** |
3 | ** Copyright (C) 2016 The Qt Company Ltd. |
4 | ** Copyright (C) 2016 Intel Corporation. |
5 | ** Contact: https://www.qt.io/licensing/ |
6 | ** |
7 | ** This file is part of the QtCore module of the Qt Toolkit. |
8 | ** |
9 | ** $QT_BEGIN_LICENSE:LGPL$ |
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18 | ** GNU Lesser General Public License Usage |
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20 | ** General Public License version 3 as published by the Free Software |
21 | ** Foundation and appearing in the file LICENSE.LGPL3 included in the |
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23 | ** ensure the GNU Lesser General Public License version 3 requirements |
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25 | ** |
26 | ** GNU General Public License Usage |
27 | ** Alternatively, this file may be used under the terms of the GNU |
28 | ** General Public License version 2.0 or (at your option) the GNU General |
29 | ** Public license version 3 or any later version approved by the KDE Free |
30 | ** Qt Foundation. The licenses are as published by the Free Software |
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36 | ** |
37 | ** $QT_END_LICENSE$ |
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39 | ****************************************************************************/ |
40 | |
41 | #include "qprocessordetection.h" |
42 | |
43 | // main part: processor type |
44 | #if defined(Q_PROCESSOR_ALPHA) |
45 | # define ARCH_PROCESSOR "alpha" |
46 | #elif defined(Q_PROCESSOR_ARM_32) |
47 | # define ARCH_PROCESSOR "arm" |
48 | #elif defined(Q_PROCESSOR_ARM_64) |
49 | # define ARCH_PROCESSOR "arm64" |
50 | #elif defined(Q_PROCESSOR_AVR32) |
51 | # define ARCH_PROCESSOR "avr32" |
52 | #elif defined(Q_PROCESSOR_BLACKFIN) |
53 | # define ARCH_PROCESSOR "bfin" |
54 | #elif defined(Q_PROCESSOR_WASM) |
55 | # define ARCH_PROCESSOR "wasm" |
56 | #elif defined(Q_PROCESSOR_X86_32) |
57 | # define ARCH_PROCESSOR "i386" |
58 | #elif defined(Q_PROCESSOR_X86_64) |
59 | # define ARCH_PROCESSOR "x86_64" |
60 | #elif defined(Q_PROCESSOR_IA64) |
61 | # define ARCH_PROCESSOR "ia64" |
62 | #elif defined(Q_PROCESSOR_MIPS_64) |
63 | # define ARCH_PROCESSOR "mips64" |
64 | #elif defined(Q_PROCESSOR_MIPS) |
65 | # define ARCH_PROCESSOR "mips" |
66 | #elif defined(Q_PROCESSOR_POWER_32) |
67 | # define ARCH_PROCESSOR "power" |
68 | #elif defined(Q_PROCESSOR_POWER_64) |
69 | # define ARCH_PROCESSOR "power64" |
70 | #elif defined(Q_PROCESSOR_RISCV_32) |
71 | # define ARCH_PROCESSOR "riscv32" |
72 | #elif defined(Q_PROCESSOR_RISCV_64) |
73 | # define ARCH_PROCESSOR "riscv64" |
74 | #elif defined(Q_PROCESSOR_S390_X) |
75 | # define ARCH_PROCESSOR "s390x" |
76 | #elif defined(Q_PROCESSOR_S390) |
77 | # define ARCH_PROCESSOR "s390" |
78 | #elif defined(Q_PROCESSOR_SH) |
79 | # define ARCH_PROCESSOR "sh" |
80 | #elif defined(Q_PROCESSORS_SPARC_64) |
81 | # define ARCH_PROCESSOR "sparc64" |
82 | #elif defined(Q_PROCESSOR_SPARC_V9) |
83 | # define ARCH_PROCESSOR "sparcv9" |
84 | #elif defined(Q_PROCESSOR_SPARC) |
85 | # define ARCH_PROCESSOR "sparc" |
86 | #else |
87 | # define ARCH_PROCESSOR "unknown" |
88 | #endif |
89 | |
90 | // endianness |
91 | #if Q_BYTE_ORDER == Q_LITTLE_ENDIAN |
92 | # define ARCH_ENDIANNESS "little_endian" |
93 | #elif Q_BYTE_ORDER == Q_BIG_ENDIAN |
94 | # define ARCH_ENDIANNESS "big_endian" |
95 | #endif |
96 | |
97 | // pointer type |
98 | #if defined(Q_OS_WIN64) || (defined(Q_OS_WINRT) && defined(_M_X64)) |
99 | # define ARCH_POINTER "llp64" |
100 | #elif defined(__LP64__) || QT_POINTER_SIZE - 0 == 8 |
101 | # define ARCH_POINTER "lp64" |
102 | #else |
103 | # define ARCH_POINTER "ilp32" |
104 | #endif |
105 | |
106 | // qreal type, if not double (includes the dash) |
107 | #ifdef QT_COORD_TYPE_STRING |
108 | # define ARCH_COORD_TYPE "-qreal_" QT_COORD_TYPE_STRING |
109 | #else |
110 | # define ARCH_COORD_TYPE "" |
111 | #endif |
112 | |
113 | // secondary: ABI string (includes the dash) |
114 | #if defined(__ARM_EABI__) || defined(__mips_eabi) |
115 | # define ARCH_ABI1 "-eabi" |
116 | #elif defined(_MIPS_SIM) |
117 | # if _MIPS_SIM == _ABIO32 |
118 | # define ARCH_ABI1 "-o32" |
119 | # elif _MIPS_SIM == _ABIN32 |
120 | # define ARCH_ABI1 "-n32" |
121 | # elif _MIPS_SIM == _ABI64 |
122 | # define ARCH_ABI1 "-n64" |
123 | # elif _MIPS_SIM == _ABIO64 |
124 | # define ARCH_ABI1 "-o64" |
125 | # endif |
126 | #else |
127 | # define ARCH_ABI1 "" |
128 | #endif |
129 | #if defined(__ARM_PCS_VFP) || defined(__mips_hard_float) |
130 | // Use "-hardfloat" for platforms that usually have no FPUs |
131 | // (and for the platforms which had "-hardfloat" before we established the rule) |
132 | # define ARCH_ABI2 "-hardfloat" |
133 | #elif defined(_SOFT_FLOAT) |
134 | // Use "-softfloat" for architectures that usually have FPUs |
135 | # define ARCH_ABI2 "-softfloat" |
136 | #else |
137 | # define ARCH_ABI2 "" |
138 | #endif |
139 | |
140 | #define ARCH_ABI ARCH_ABI1 ARCH_ABI2 |
141 | |
142 | #define ARCH_FULL ARCH_PROCESSOR "-" ARCH_ENDIANNESS "-" ARCH_POINTER ARCH_COORD_TYPE ARCH_ABI |
143 | |