1 | // This is a generated file. DO NOT EDIT. |
2 | // Please see util/x86simdgen/generate.pl |
3 | #ifndef QSIMD_P_H |
4 | # error "Please include <private/qsimd_p.h> instead" |
5 | #endif |
6 | #ifndef QSIMD_X86_P_H |
7 | #define QSIMD_X86_P_H |
8 | |
9 | #include "qsimd_p.h" |
10 | |
11 | // |
12 | // W A R N I N G |
13 | // ------------- |
14 | // |
15 | // This file is not part of the Qt API. It exists purely as an |
16 | // implementation detail. This header file may change from version to |
17 | // version without notice, or even be removed. |
18 | // |
19 | // We mean it. |
20 | // |
21 | |
22 | QT_BEGIN_NAMESPACE |
23 | |
24 | // used only to indicate that the CPU detection was initialized |
25 | #define QSimdInitialized (Q_UINT64_C(1) << 0) |
26 | |
27 | // in CPUID Leaf 1, EDX: |
28 | #define CpuFeatureSSE2 (Q_UINT64_C(1) << 1) |
29 | #define QT_FUNCTION_TARGET_STRING_SSE2 "sse2" |
30 | |
31 | // in CPUID Leaf 1, ECX: |
32 | #define CpuFeatureSSE3 (Q_UINT64_C(1) << 2) |
33 | #define QT_FUNCTION_TARGET_STRING_SSE3 "sse3" |
34 | #define CpuFeatureSSSE3 (Q_UINT64_C(1) << 3) |
35 | #define QT_FUNCTION_TARGET_STRING_SSSE3 "ssse3" |
36 | #define CpuFeatureFMA (Q_UINT64_C(1) << 4) |
37 | #define QT_FUNCTION_TARGET_STRING_FMA "fma" |
38 | #define CpuFeatureSSE4_1 (Q_UINT64_C(1) << 5) |
39 | #define QT_FUNCTION_TARGET_STRING_SSE4_1 "sse4.1" |
40 | #define CpuFeatureSSE4_2 (Q_UINT64_C(1) << 6) |
41 | #define QT_FUNCTION_TARGET_STRING_SSE4_2 "sse4.2" |
42 | #define CpuFeatureMOVBE (Q_UINT64_C(1) << 7) |
43 | #define QT_FUNCTION_TARGET_STRING_MOVBE "movbe" |
44 | #define CpuFeaturePOPCNT (Q_UINT64_C(1) << 8) |
45 | #define QT_FUNCTION_TARGET_STRING_POPCNT "popcnt" |
46 | #define CpuFeatureAES (Q_UINT64_C(1) << 9) |
47 | #define QT_FUNCTION_TARGET_STRING_AES "aes,sse4.2" |
48 | #define CpuFeatureAVX (Q_UINT64_C(1) << 10) |
49 | #define QT_FUNCTION_TARGET_STRING_AVX "avx" |
50 | #define CpuFeatureF16C (Q_UINT64_C(1) << 11) |
51 | #define QT_FUNCTION_TARGET_STRING_F16C "f16c" |
52 | #define CpuFeatureRDRND (Q_UINT64_C(1) << 12) |
53 | #define QT_FUNCTION_TARGET_STRING_RDRND "rdrnd" |
54 | |
55 | // in CPUID Leaf 7, Sub-leaf 0, EBX: |
56 | #define CpuFeatureBMI (Q_UINT64_C(1) << 13) |
57 | #define QT_FUNCTION_TARGET_STRING_BMI "bmi" |
58 | #define CpuFeatureHLE (Q_UINT64_C(1) << 14) |
59 | #define QT_FUNCTION_TARGET_STRING_HLE "hle" |
60 | #define CpuFeatureAVX2 (Q_UINT64_C(1) << 15) |
61 | #define QT_FUNCTION_TARGET_STRING_AVX2 "avx2" |
62 | #define CpuFeatureBMI2 (Q_UINT64_C(1) << 16) |
63 | #define QT_FUNCTION_TARGET_STRING_BMI2 "bmi2" |
64 | #define CpuFeatureRTM (Q_UINT64_C(1) << 17) |
65 | #define QT_FUNCTION_TARGET_STRING_RTM "rtm" |
66 | #define CpuFeatureAVX512F (Q_UINT64_C(1) << 18) |
67 | #define QT_FUNCTION_TARGET_STRING_AVX512F "avx512f" |
68 | #define CpuFeatureAVX512DQ (Q_UINT64_C(1) << 19) |
69 | #define QT_FUNCTION_TARGET_STRING_AVX512DQ "avx512dq" |
70 | #define CpuFeatureRDSEED (Q_UINT64_C(1) << 20) |
71 | #define QT_FUNCTION_TARGET_STRING_RDSEED "rdseed" |
72 | #define CpuFeatureAVX512IFMA (Q_UINT64_C(1) << 21) |
73 | #define QT_FUNCTION_TARGET_STRING_AVX512IFMA "avx512ifma" |
74 | #define CpuFeatureAVX512PF (Q_UINT64_C(1) << 22) |
75 | #define QT_FUNCTION_TARGET_STRING_AVX512PF "avx512pf" |
76 | #define CpuFeatureAVX512ER (Q_UINT64_C(1) << 23) |
77 | #define QT_FUNCTION_TARGET_STRING_AVX512ER "avx512er" |
78 | #define CpuFeatureAVX512CD (Q_UINT64_C(1) << 24) |
79 | #define QT_FUNCTION_TARGET_STRING_AVX512CD "avx512cd" |
80 | #define CpuFeatureSHA (Q_UINT64_C(1) << 25) |
81 | #define QT_FUNCTION_TARGET_STRING_SHA "sha" |
82 | #define CpuFeatureAVX512BW (Q_UINT64_C(1) << 26) |
83 | #define QT_FUNCTION_TARGET_STRING_AVX512BW "avx512bw" |
84 | #define CpuFeatureAVX512VL (Q_UINT64_C(1) << 27) |
85 | #define QT_FUNCTION_TARGET_STRING_AVX512VL "avx512vl" |
86 | |
87 | // in CPUID Leaf 7, Sub-leaf 0, ECX: |
88 | #define CpuFeatureAVX512VBMI (Q_UINT64_C(1) << 28) |
89 | #define QT_FUNCTION_TARGET_STRING_AVX512VBMI "avx512vbmi" |
90 | #define CpuFeatureAVX512VBMI2 (Q_UINT64_C(1) << 29) |
91 | #define QT_FUNCTION_TARGET_STRING_AVX512VBMI2 "avx512vbmi2" |
92 | #define CpuFeatureGFNI (Q_UINT64_C(1) << 30) |
93 | #define QT_FUNCTION_TARGET_STRING_GFNI "gfni" |
94 | #define CpuFeatureVAES (Q_UINT64_C(1) << 31) |
95 | #define QT_FUNCTION_TARGET_STRING_VAES "vaes" |
96 | #define CpuFeatureAVX512VNNI (Q_UINT64_C(1) << 32) |
97 | #define QT_FUNCTION_TARGET_STRING_AVX512VNNI "avx512vnni" |
98 | #define CpuFeatureAVX512BITALG (Q_UINT64_C(1) << 33) |
99 | #define QT_FUNCTION_TARGET_STRING_AVX512BITALG "avx512bitalg" |
100 | #define CpuFeatureAVX512VPOPCNTDQ (Q_UINT64_C(1) << 34) |
101 | #define QT_FUNCTION_TARGET_STRING_AVX512VPOPCNTDQ "avx512vpopcntdq" |
102 | |
103 | // in CPUID Leaf 7, Sub-leaf 0, EDX: |
104 | #define CpuFeatureAVX5124NNIW (Q_UINT64_C(1) << 35) |
105 | #define QT_FUNCTION_TARGET_STRING_AVX5124NNIW "avx5124nniw" |
106 | #define CpuFeatureAVX5124FMAPS (Q_UINT64_C(1) << 36) |
107 | #define QT_FUNCTION_TARGET_STRING_AVX5124FMAPS "avx5124fmaps" |
108 | |
109 | static const quint64 qCompilerCpuFeatures = 0 |
110 | #ifdef __SSE2__ |
111 | | CpuFeatureSSE2 |
112 | #endif |
113 | #ifdef __SSE3__ |
114 | | CpuFeatureSSE3 |
115 | #endif |
116 | #ifdef __SSSE3__ |
117 | | CpuFeatureSSSE3 |
118 | #endif |
119 | #ifdef __FMA__ |
120 | | CpuFeatureFMA |
121 | #endif |
122 | #ifdef __SSE4_1__ |
123 | | CpuFeatureSSE4_1 |
124 | #endif |
125 | #ifdef __SSE4_2__ |
126 | | CpuFeatureSSE4_2 |
127 | #endif |
128 | #ifdef __MOVBE__ |
129 | | CpuFeatureMOVBE |
130 | #endif |
131 | #ifdef __POPCNT__ |
132 | | CpuFeaturePOPCNT |
133 | #endif |
134 | #ifdef __AES__ |
135 | | CpuFeatureAES |
136 | #endif |
137 | #ifdef __AVX__ |
138 | | CpuFeatureAVX |
139 | #endif |
140 | #ifdef __F16C__ |
141 | | CpuFeatureF16C |
142 | #endif |
143 | #ifdef __RDRND__ |
144 | | CpuFeatureRDRND |
145 | #endif |
146 | #ifdef __BMI__ |
147 | | CpuFeatureBMI |
148 | #endif |
149 | #ifdef __HLE__ |
150 | | CpuFeatureHLE |
151 | #endif |
152 | #ifdef __AVX2__ |
153 | | CpuFeatureAVX2 |
154 | #endif |
155 | #ifdef __BMI2__ |
156 | | CpuFeatureBMI2 |
157 | #endif |
158 | #ifdef __RTM__ |
159 | | CpuFeatureRTM |
160 | #endif |
161 | #ifdef __AVX512F__ |
162 | | CpuFeatureAVX512F |
163 | #endif |
164 | #ifdef __AVX512DQ__ |
165 | | CpuFeatureAVX512DQ |
166 | #endif |
167 | #ifdef __RDSEED__ |
168 | | CpuFeatureRDSEED |
169 | #endif |
170 | #ifdef __AVX512IFMA__ |
171 | | CpuFeatureAVX512IFMA |
172 | #endif |
173 | #ifdef __AVX512PF__ |
174 | | CpuFeatureAVX512PF |
175 | #endif |
176 | #ifdef __AVX512ER__ |
177 | | CpuFeatureAVX512ER |
178 | #endif |
179 | #ifdef __AVX512CD__ |
180 | | CpuFeatureAVX512CD |
181 | #endif |
182 | #ifdef __SHA__ |
183 | | CpuFeatureSHA |
184 | #endif |
185 | #ifdef __AVX512BW__ |
186 | | CpuFeatureAVX512BW |
187 | #endif |
188 | #ifdef __AVX512VL__ |
189 | | CpuFeatureAVX512VL |
190 | #endif |
191 | #ifdef __AVX512VBMI__ |
192 | | CpuFeatureAVX512VBMI |
193 | #endif |
194 | #ifdef __AVX512VBMI2__ |
195 | | CpuFeatureAVX512VBMI2 |
196 | #endif |
197 | #ifdef __GFNI__ |
198 | | CpuFeatureGFNI |
199 | #endif |
200 | #ifdef __VAES__ |
201 | | CpuFeatureVAES |
202 | #endif |
203 | #ifdef __AVX512VNNI__ |
204 | | CpuFeatureAVX512VNNI |
205 | #endif |
206 | #ifdef __AVX512BITALG__ |
207 | | CpuFeatureAVX512BITALG |
208 | #endif |
209 | #ifdef __AVX512VPOPCNTDQ__ |
210 | | CpuFeatureAVX512VPOPCNTDQ |
211 | #endif |
212 | #ifdef __AVX5124NNIW__ |
213 | | CpuFeatureAVX5124NNIW |
214 | #endif |
215 | #ifdef __AVX5124FMAPS__ |
216 | | CpuFeatureAVX5124FMAPS |
217 | #endif |
218 | ; |
219 | |
220 | QT_END_NAMESPACE |
221 | |
222 | #endif // QSIMD_X86_P_H |
223 | |