1// Copyright (C) 2016 The Qt Company Ltd.
2// Copyright (C) 2016 Intel Corporation.
3// SPDX-License-Identifier: LicenseRef-Qt-Commercial OR LGPL-3.0-only OR GPL-2.0-only OR GPL-3.0-only
4
5#include "qprocessordetection.h"
6
7// main part: processor type
8#if defined(Q_PROCESSOR_ALPHA)
9# define ARCH_PROCESSOR "alpha"
10#elif defined(Q_PROCESSOR_ARM_32)
11# define ARCH_PROCESSOR "arm"
12#elif defined(Q_PROCESSOR_ARM_64)
13# define ARCH_PROCESSOR "arm64"
14#elif defined(Q_PROCESSOR_AVR32)
15# define ARCH_PROCESSOR "avr32"
16#elif defined(Q_PROCESSOR_BLACKFIN)
17# define ARCH_PROCESSOR "bfin"
18#elif defined(Q_PROCESSOR_WASM_64)
19# define ARCH_PROCESSOR "wasm64"
20#elif defined(Q_PROCESSOR_WASM)
21# define ARCH_PROCESSOR "wasm"
22#elif defined(Q_PROCESSOR_HPPA)
23# define ARCH_PROCESSOR "hppa"
24#elif defined(Q_PROCESSOR_X86_32)
25# define ARCH_PROCESSOR "i386"
26#elif defined(Q_PROCESSOR_X86_64)
27# define ARCH_PROCESSOR "x86_64"
28#elif defined(Q_PROCESSOR_IA64)
29# define ARCH_PROCESSOR "ia64"
30#elif defined(Q_PROCESSOR_LOONGARCH_32)
31# define ARCH_PROCESSOR "loongarch32"
32#elif defined(Q_PROCESSOR_LOONGARCH_64)
33# define ARCH_PROCESSOR "loongarch64"
34#elif defined(Q_PROCESSOR_M68K)
35# define ARCH_PROCESSOR "m68k"
36#elif defined(Q_PROCESSOR_MIPS_64)
37# define ARCH_PROCESSOR "mips64"
38#elif defined(Q_PROCESSOR_MIPS)
39# define ARCH_PROCESSOR "mips"
40#elif defined(Q_PROCESSOR_POWER_32)
41# define ARCH_PROCESSOR "power"
42#elif defined(Q_PROCESSOR_POWER_64)
43# define ARCH_PROCESSOR "power64"
44#elif defined(Q_PROCESSOR_RISCV_32)
45# define ARCH_PROCESSOR "riscv32"
46#elif defined(Q_PROCESSOR_RISCV_64)
47# define ARCH_PROCESSOR "riscv64"
48#elif defined(Q_PROCESSOR_S390_X)
49# define ARCH_PROCESSOR "s390x"
50#elif defined(Q_PROCESSOR_S390)
51# define ARCH_PROCESSOR "s390"
52#elif defined(Q_PROCESSOR_SH)
53# define ARCH_PROCESSOR "sh"
54#elif defined(Q_PROCESSORS_SPARC_64)
55# define ARCH_PROCESSOR "sparc64"
56#elif defined(Q_PROCESSOR_SPARC_V9)
57# define ARCH_PROCESSOR "sparcv9"
58#elif defined(Q_PROCESSOR_SPARC)
59# define ARCH_PROCESSOR "sparc"
60#else
61# define ARCH_PROCESSOR "unknown"
62#endif
63
64// endianness
65#if Q_BYTE_ORDER == Q_LITTLE_ENDIAN
66# define ARCH_ENDIANNESS "little_endian"
67#elif Q_BYTE_ORDER == Q_BIG_ENDIAN
68# define ARCH_ENDIANNESS "big_endian"
69#endif
70
71// pointer type
72#if defined(Q_OS_WIN64)
73# define ARCH_POINTER "llp64"
74#elif defined(__LP64__) || QT_POINTER_SIZE - 0 == 8
75# define ARCH_POINTER "lp64"
76#else
77# define ARCH_POINTER "ilp32"
78#endif
79
80// qreal type, if not double (includes the dash)
81#ifdef QT_COORD_TYPE_STRING
82# define ARCH_COORD_TYPE "-qreal_" QT_COORD_TYPE_STRING
83#else
84# define ARCH_COORD_TYPE ""
85#endif
86
87// secondary: ABI string (includes the dash)
88#if defined(__ARM_EABI__) || defined(__mips_eabi)
89# define ARCH_ABI1 "-eabi"
90#elif defined(_MIPS_SIM)
91# if _MIPS_SIM == _ABIO32
92# define ARCH_ABI1 "-o32"
93# elif _MIPS_SIM == _ABIN32
94# define ARCH_ABI1 "-n32"
95# elif _MIPS_SIM == _ABI64
96# define ARCH_ABI1 "-n64"
97# elif _MIPS_SIM == _ABIO64
98# define ARCH_ABI1 "-o64"
99# endif
100#else
101# define ARCH_ABI1 ""
102#endif
103#if defined(__ARM_PCS_VFP) || defined(__mips_hard_float)
104// Use "-hardfloat" for platforms that usually have no FPUs
105// (and for the platforms which had "-hardfloat" before we established the rule)
106# define ARCH_ABI2 "-hardfloat"
107#elif defined(_SOFT_FLOAT)
108// Use "-softfloat" for architectures that usually have FPUs
109# define ARCH_ABI2 "-softfloat"
110#else
111# define ARCH_ABI2 ""
112#endif
113
114#define ARCH_ABI ARCH_ABI1 ARCH_ABI2
115
116#define ARCH_FULL ARCH_PROCESSOR "-" ARCH_ENDIANNESS "-" ARCH_POINTER ARCH_COORD_TYPE ARCH_ABI
117

source code of qtbase/src/corelib/global/archdetect.cpp