| 1 | use crate::int::{DInt, HInt, Int, MinInt}; | 
| 2 |  | 
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| 3 | trait Ashl: DInt { | 
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| 4 | /// Returns `a << b`, requires `b < Self::BITS` | 
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| 5 | fn ashl(self, shl: u32) -> Self { | 
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| 6 | let n_h: u32 = Self::H::BITS; | 
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| 7 | if shl & n_h != 0 { | 
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| 8 | // we only need `self.lo()` because `self.hi()` will be shifted out entirely | 
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| 9 | self.lo().wrapping_shl(shl - n_h).widen_hi() | 
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| 10 | } else if shl == 0 { | 
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| 11 | self | 
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| 12 | } else { | 
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| 13 | Self::from_lo_hi( | 
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| 14 | self.lo().wrapping_shl(shl), | 
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| 15 | self.lo().logical_shr(n_h.wrapping_sub(shl)) | self.hi().wrapping_shl(shl), | 
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| 16 | ) | 
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| 17 | } | 
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| 18 | } | 
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| 19 | } | 
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| 20 |  | 
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| 21 | impl Ashl for u32 {} | 
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| 22 | impl Ashl for u64 {} | 
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| 23 | impl Ashl for u128 {} | 
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| 24 |  | 
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| 25 | trait Ashr: DInt { | 
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| 26 | /// Returns arithmetic `a >> b`, requires `b < Self::BITS` | 
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| 27 | fn ashr(self, shr: u32) -> Self { | 
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| 28 | let n_h: u32 = Self::H::BITS; | 
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| 29 | if shr & n_h != 0 { | 
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| 30 | Self::from_lo_hi( | 
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| 31 | self.hi().wrapping_shr(shr - n_h), | 
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| 32 | // smear the sign bit | 
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| 33 | self.hi().wrapping_shr(n_h - 1), | 
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| 34 | ) | 
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| 35 | } else if shr == 0 { | 
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| 36 | self | 
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| 37 | } else { | 
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| 38 | Self::from_lo_hi( | 
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| 39 | self.lo().logical_shr(shr) | self.hi().wrapping_shl(n_h.wrapping_sub(shr)), | 
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| 40 | self.hi().wrapping_shr(shr), | 
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| 41 | ) | 
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| 42 | } | 
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| 43 | } | 
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| 44 | } | 
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| 45 |  | 
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| 46 | impl Ashr for i32 {} | 
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| 47 | impl Ashr for i64 {} | 
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| 48 | impl Ashr for i128 {} | 
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| 49 |  | 
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| 50 | trait Lshr: DInt { | 
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| 51 | /// Returns logical `a >> b`, requires `b < Self::BITS` | 
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| 52 | fn lshr(self, shr: u32) -> Self { | 
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| 53 | let n_h: u32 = Self::H::BITS; | 
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| 54 | if shr & n_h != 0 { | 
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| 55 | self.hi().logical_shr(shr - n_h).zero_widen() | 
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| 56 | } else if shr == 0 { | 
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| 57 | self | 
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| 58 | } else { | 
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| 59 | Self::from_lo_hi( | 
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| 60 | self.lo().logical_shr(shr) | self.hi().wrapping_shl(n_h.wrapping_sub(shr)), | 
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| 61 | self.hi().logical_shr(shr), | 
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| 62 | ) | 
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| 63 | } | 
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| 64 | } | 
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| 65 | } | 
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| 66 |  | 
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| 67 | impl Lshr for u32 {} | 
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| 68 | impl Lshr for u64 {} | 
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| 69 | impl Lshr for u128 {} | 
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| 70 |  | 
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| 71 | intrinsics! { | 
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| 72 | #[maybe_use_optimized_c_shim] | 
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| 73 | pub extern "C"fn __ashlsi3(a: u32, b: u32) -> u32 { | 
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| 74 | a.ashl(b) | 
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| 75 | } | 
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| 76 |  | 
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| 77 | #[maybe_use_optimized_c_shim] | 
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| 78 | #[arm_aeabi_alias = __aeabi_llsl] | 
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| 79 | pub extern "C"fn __ashldi3(a: u64, b: core::ffi::c_uint) -> u64 { | 
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| 80 | a.ashl(b as u32) | 
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| 81 | } | 
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| 82 |  | 
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| 83 | pub extern "C"fn __ashlti3(a: u128, b: u32) -> u128 { | 
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| 84 | a.ashl(b) | 
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| 85 | } | 
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| 86 |  | 
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| 87 | #[maybe_use_optimized_c_shim] | 
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| 88 | pub extern "C"fn __ashrsi3(a: i32, b: u32) -> i32 { | 
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| 89 | a.ashr(b) | 
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| 90 | } | 
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| 91 |  | 
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| 92 | #[maybe_use_optimized_c_shim] | 
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| 93 | #[arm_aeabi_alias = __aeabi_lasr] | 
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| 94 | pub extern "C"fn __ashrdi3(a: i64, b: core::ffi::c_uint) -> i64 { | 
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| 95 | a.ashr(b as u32) | 
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| 96 | } | 
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| 97 |  | 
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| 98 | pub extern "C"fn __ashrti3(a: i128, b: u32) -> i128 { | 
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| 99 | a.ashr(b) | 
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| 100 | } | 
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| 101 |  | 
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| 102 | #[maybe_use_optimized_c_shim] | 
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| 103 | pub extern "C"fn __lshrsi3(a: u32, b: u32) -> u32 { | 
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| 104 | a.lshr(b) | 
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| 105 | } | 
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| 106 |  | 
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| 107 | #[maybe_use_optimized_c_shim] | 
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| 108 | #[arm_aeabi_alias = __aeabi_llsr] | 
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| 109 | pub extern "C"fn __lshrdi3(a: u64, b: core::ffi::c_uint) -> u64 { | 
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| 110 | a.lshr(b as u32) | 
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| 111 | } | 
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| 112 |  | 
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| 113 | pub extern "C"fn __lshrti3(a: u128, b: u32) -> u128 { | 
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| 114 | a.lshr(b) | 
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| 115 | } | 
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| 116 | } | 
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| 117 |  | 
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