| 1 | use crate::arch::asm; | 
| 2 | #[ cfg(test)] | 
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| 3 | use stdarch_test::assert_instr; | 
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| 4 |  | 
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| 5 | // x32 wants to use a 32-bit address size, but asm! defaults to using the full | 
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| 6 | // register name (e.g. rax). We have to explicitly override the placeholder to | 
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| 7 | // use the 32-bit register name in that case. | 
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| 8 | #[ cfg(target_pointer_width = "32")] | 
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| 9 | macro_rules! bt { | 
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| 10 | ($inst:expr) => { | 
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| 11 | concat!($inst, " {b:e}, ({p:e})") | 
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| 12 | }; | 
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| 13 | } | 
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| 14 | #[ cfg(target_pointer_width = "64")] | 
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| 15 | macro_rules! bt { | 
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| 16 | ($inst:expr) => { | 
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| 17 | concat!($inst, " {b:e}, ({p})") | 
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| 18 | }; | 
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| 19 | } | 
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| 20 |  | 
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| 21 | /// Returns the bit in position `b` of the memory addressed by `p`. | 
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| 22 | /// | 
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| 23 | /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_bittest) | 
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| 24 | #[ inline] | 
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| 25 | #[ cfg_attr(test, assert_instr(bt))] | 
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| 26 | #[ stable(feature = "simd_x86_bittest", since = "1.55.0")] | 
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| 27 | pub unsafe fn _bittest(p: *const i32, b: i32) -> u8 { | 
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| 28 | let r: u8; | 
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| 29 | asm!( | 
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| 30 | bt!( "btl"), | 
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| 31 | "setc {r }", | 
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| 32 | p = in(reg) p, | 
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| 33 | b = in(reg) b, | 
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| 34 | r = out(reg_byte) r, | 
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| 35 | options(readonly, nostack, pure, att_syntax) | 
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| 36 | ); | 
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| 37 | r | 
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| 38 | } | 
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| 39 |  | 
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| 40 | /// Returns the bit in position `b` of the memory addressed by `p`, then sets the bit to `1`. | 
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| 41 | /// | 
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| 42 | /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_bittestandset) | 
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| 43 | #[ inline] | 
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| 44 | #[ cfg_attr(test, assert_instr(bts))] | 
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| 45 | #[ stable(feature = "simd_x86_bittest", since = "1.55.0")] | 
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| 46 | pub unsafe fn _bittestandset(p: *mut i32, b: i32) -> u8 { | 
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| 47 | let r: u8; | 
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| 48 | asm!( | 
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| 49 | bt!( "btsl"), | 
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| 50 | "setc {r }", | 
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| 51 | p = in(reg) p, | 
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| 52 | b = in(reg) b, | 
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| 53 | r = out(reg_byte) r, | 
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| 54 | options(nostack, att_syntax) | 
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| 55 | ); | 
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| 56 | r | 
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| 57 | } | 
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| 58 |  | 
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| 59 | /// Returns the bit in position `b` of the memory addressed by `p`, then resets that bit to `0`. | 
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| 60 | /// | 
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| 61 | /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_bittestandreset) | 
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| 62 | #[ inline] | 
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| 63 | #[ cfg_attr(test, assert_instr(btr))] | 
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| 64 | #[ stable(feature = "simd_x86_bittest", since = "1.55.0")] | 
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| 65 | pub unsafe fn _bittestandreset(p: *mut i32, b: i32) -> u8 { | 
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| 66 | let r: u8; | 
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| 67 | asm!( | 
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| 68 | bt!( "btrl"), | 
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| 69 | "setc {r }", | 
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| 70 | p = in(reg) p, | 
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| 71 | b = in(reg) b, | 
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| 72 | r = out(reg_byte) r, | 
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| 73 | options(nostack, att_syntax) | 
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| 74 | ); | 
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| 75 | r | 
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| 76 | } | 
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| 77 |  | 
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| 78 | /// Returns the bit in position `b` of the memory addressed by `p`, then inverts that bit. | 
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| 79 | /// | 
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| 80 | /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_bittestandcomplement) | 
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| 81 | #[ inline] | 
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| 82 | #[ cfg_attr(test, assert_instr(btc))] | 
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| 83 | #[ stable(feature = "simd_x86_bittest", since = "1.55.0")] | 
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| 84 | pub unsafe fn _bittestandcomplement(p: *mut i32, b: i32) -> u8 { | 
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| 85 | let r: u8; | 
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| 86 | asm!( | 
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| 87 | bt!( "btcl"), | 
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| 88 | "setc {r }", | 
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| 89 | p = in(reg) p, | 
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| 90 | b = in(reg) b, | 
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| 91 | r = out(reg_byte) r, | 
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| 92 | options(nostack, att_syntax) | 
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| 93 | ); | 
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| 94 | r | 
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| 95 | } | 
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| 96 |  | 
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| 97 | #[ cfg(test)] | 
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| 98 | mod tests { | 
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| 99 | use crate::core_arch::x86::*; | 
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| 100 |  | 
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| 101 | #[ test] | 
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| 102 | #[ cfg_attr(miri, ignore)] // Uses inline assembly | 
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| 103 | fn test_bittest() { | 
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| 104 | unsafe { | 
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| 105 | let a = 0b0101_0000i32; | 
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| 106 | assert_eq!(_bittest(&a as _, 4), 1); | 
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| 107 | assert_eq!(_bittest(&a as _, 5), 0); | 
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| 108 | } | 
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| 109 | } | 
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| 110 |  | 
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| 111 | #[ test] | 
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| 112 | #[ cfg_attr(miri, ignore)] // Uses inline assembly | 
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| 113 | fn test_bittestandset() { | 
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| 114 | unsafe { | 
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| 115 | let mut a = 0b0101_0000i32; | 
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| 116 | assert_eq!(_bittestandset(&mut a as _, 4), 1); | 
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| 117 | assert_eq!(_bittestandset(&mut a as _, 4), 1); | 
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| 118 | assert_eq!(_bittestandset(&mut a as _, 5), 0); | 
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| 119 | assert_eq!(_bittestandset(&mut a as _, 5), 1); | 
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| 120 | } | 
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| 121 | } | 
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| 122 |  | 
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| 123 | #[ test] | 
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| 124 | #[ cfg_attr(miri, ignore)] // Uses inline assembly | 
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| 125 | fn test_bittestandreset() { | 
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| 126 | unsafe { | 
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| 127 | let mut a = 0b0101_0000i32; | 
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| 128 | assert_eq!(_bittestandreset(&mut a as _, 4), 1); | 
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| 129 | assert_eq!(_bittestandreset(&mut a as _, 4), 0); | 
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| 130 | assert_eq!(_bittestandreset(&mut a as _, 5), 0); | 
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| 131 | assert_eq!(_bittestandreset(&mut a as _, 5), 0); | 
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| 132 | } | 
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| 133 | } | 
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| 134 |  | 
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| 135 | #[ test] | 
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| 136 | #[ cfg_attr(miri, ignore)] // Uses inline assembly | 
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| 137 | fn test_bittestandcomplement() { | 
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| 138 | unsafe { | 
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| 139 | let mut a = 0b0101_0000i32; | 
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| 140 | assert_eq!(_bittestandcomplement(&mut a as _, 4), 1); | 
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| 141 | assert_eq!(_bittestandcomplement(&mut a as _, 4), 0); | 
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| 142 | assert_eq!(_bittestandcomplement(&mut a as _, 4), 1); | 
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| 143 | assert_eq!(_bittestandcomplement(&mut a as _, 5), 0); | 
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| 144 | assert_eq!(_bittestandcomplement(&mut a as _, 5), 1); | 
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| 145 | } | 
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| 146 | } | 
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| 147 | } | 
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| 148 |  | 
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