1/* SPDX-License-Identifier: MIT */
2/* origin: musl src/math/fmaf.c. Ported to generic Rust algorithm in 2025, TG. */
3
4use super::support::{FpResult, IntTy, Round, Status};
5use super::{CastFrom, CastInto, DFloat, Float, HFloat, MinInt};
6
7// Placeholder so we can have `fmaf16` in the `Float` trait.
8#[allow(unused)]
9#[cfg(f16_enabled)]
10#[cfg_attr(all(test, assert_no_panic), no_panic::no_panic)]
11pub(crate) fn fmaf16(_x: f16, _y: f16, _z: f16) -> f16 {
12 unimplemented!()
13}
14
15/// Floating multiply add (f32)
16///
17/// Computes `(x*y)+z`, rounded as one ternary operation (i.e. calculated with infinite precision).
18#[cfg_attr(all(test, assert_no_panic), no_panic::no_panic)]
19pub fn fmaf(x: f32, y: f32, z: f32) -> f32 {
20 fma_wide_round(x, y, z, Round::Nearest).val
21}
22
23/// Fma implementation when a hardware-backed larger float type is available. For `f32` and `f64`,
24/// `f64` has enough precision to represent the `f32` in its entirety, except for double rounding.
25pub fn fma_wide_round<F, B>(x: F, y: F, z: F, round: Round) -> FpResult<F>
26where
27 F: Float + HFloat<D = B>,
28 B: Float + DFloat<H = F>,
29 B::Int: CastInto<i32>,
30 i32: CastFrom<i32>,
31{
32 let one = IntTy::<B>::ONE;
33
34 let xy: B = x.widen() * y.widen();
35 let mut result: B = xy + z.widen();
36 let mut ui: B::Int = result.to_bits();
37 let re = result.ex();
38 let zb: B = z.widen();
39
40 let prec_diff = B::SIG_BITS - F::SIG_BITS;
41 let excess_prec = ui & ((one << prec_diff) - one);
42 let halfway = one << (prec_diff - 1);
43
44 // Common case: the larger precision is fine if...
45 // This is not a halfway case
46 if excess_prec != halfway
47 // Or the result is NaN
48 || re == B::EXP_SAT
49 // Or the result is exact
50 || (result - xy == zb && result - zb == xy)
51 // Or the mode is something other than round to nearest
52 || round != Round::Nearest
53 {
54 let min_inexact_exp = (B::EXP_BIAS as i32 + F::EXP_MIN_SUBNORM) as u32;
55 let max_inexact_exp = (B::EXP_BIAS as i32 + F::EXP_MIN) as u32;
56
57 let mut status = Status::OK;
58
59 if (min_inexact_exp..max_inexact_exp).contains(&re) && status.inexact() {
60 // This branch is never hit; requires previous operations to set a status
61 status.set_inexact(false);
62
63 result = xy + z.widen();
64 if status.inexact() {
65 status.set_underflow(true);
66 } else {
67 status.set_inexact(true);
68 }
69 }
70
71 return FpResult { val: result.narrow(), status };
72 }
73
74 let neg = ui >> (B::BITS - 1) != IntTy::<B>::ZERO;
75 let err = if neg == (zb > xy) { xy - result + zb } else { zb - result + xy };
76 if neg == (err < B::ZERO) {
77 ui += one;
78 } else {
79 ui -= one;
80 }
81
82 FpResult::ok(B::from_bits(ui).narrow())
83}
84
85#[cfg(test)]
86mod tests {
87 use super::*;
88
89 #[test]
90 fn issue_263() {
91 let a = f32::from_bits(1266679807);
92 let b = f32::from_bits(1300234242);
93 let c = f32::from_bits(1115553792);
94 let expected = f32::from_bits(1501560833);
95 assert_eq!(fmaf(a, b, c), expected);
96 }
97}
98