1 | //! Advanced Vector Extensions (AVX) |
2 | //! |
3 | //! The references are: |
4 | //! |
5 | //! - [Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2: |
6 | //! Instruction Set Reference, A-Z][intel64_ref]. - [AMD64 Architecture |
7 | //! Programmer's Manual, Volume 3: General-Purpose and System |
8 | //! Instructions][amd64_ref]. |
9 | //! |
10 | //! [Wikipedia][wiki] provides a quick overview of the instructions available. |
11 | //! |
12 | //! [intel64_ref]: http://www.intel.de/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf |
13 | //! [amd64_ref]: http://support.amd.com/TechDocs/24594.pdf |
14 | //! [wiki]: https://en.wikipedia.org/wiki/Advanced_Vector_Extensions |
15 | |
16 | use crate::{ |
17 | core_arch::{simd_llvm::*, x86::*}, |
18 | mem::transmute, |
19 | }; |
20 | |
21 | /// Copies `a` to result, and insert the 64-bit integer `i` into result |
22 | /// at the location specified by `index`. |
23 | /// |
24 | /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_insert_epi64) |
25 | #[inline ] |
26 | #[rustc_legacy_const_generics (2)] |
27 | #[target_feature (enable = "avx" )] |
28 | // This intrinsic has no corresponding instruction. |
29 | #[stable (feature = "simd_x86" , since = "1.27.0" )] |
30 | pub unsafe fn _mm256_insert_epi64<const INDEX: i32>(a: __m256i, i: i64) -> __m256i { |
31 | static_assert_uimm_bits!(INDEX, 2); |
32 | transmute(src:simd_insert(x:a.as_i64x4(), INDEX as u32, val:i)) |
33 | } |
34 | |
35 | #[cfg (test)] |
36 | mod tests { |
37 | use stdarch_test::simd_test; |
38 | |
39 | use crate::core_arch::x86::*; |
40 | |
41 | #[simd_test(enable = "avx" )] |
42 | unsafe fn test_mm256_insert_epi64() { |
43 | let a = _mm256_setr_epi64x(1, 2, 3, 4); |
44 | let r = _mm256_insert_epi64::<3>(a, 0); |
45 | let e = _mm256_setr_epi64x(1, 2, 3, 0); |
46 | assert_eq_m256i(r, e); |
47 | } |
48 | } |
49 | |