1// Note: This file is copied and modified from fdcan crate by Richard Meadows
2
3use volatile_register::RW;
4
5pub(crate) mod common;
6pub(crate) mod enums;
7pub(crate) mod generic;
8
9/// Number of Receive Fifos configured by this module
10pub const RX_FIFOS_MAX: u8 = 2;
11/// Number of Receive Messages per RxFifo configured by this module
12pub const RX_FIFO_MAX: u8 = 3;
13/// Number of Transmit Messages configured by this module
14pub const TX_FIFO_MAX: u8 = 3;
15/// Number of Transmit Events configured by this module
16pub const TX_EVENT_MAX: u8 = 3;
17/// Number of Standard Filters configured by this module
18pub const STANDARD_FILTER_MAX: u8 = 28;
19/// Number of Extended Filters configured by this module
20pub const EXTENDED_FILTER_MAX: u8 = 8;
21
22/// MessageRam Overlay
23#[repr(C)]
24pub struct RegisterBlock {
25 pub(crate) filters: Filters,
26 pub(crate) receive: [Receive; RX_FIFOS_MAX as usize],
27 pub(crate) transmit: Transmit,
28}
29impl RegisterBlock {
30 pub fn reset(&mut self) {
31 self.filters.reset();
32 self.receive[0].reset();
33 self.receive[1].reset();
34 self.transmit.reset();
35 }
36}
37
38#[repr(C)]
39pub(crate) struct Filters {
40 pub(crate) flssa: [StandardFilter; STANDARD_FILTER_MAX as usize],
41 pub(crate) flesa: [ExtendedFilter; EXTENDED_FILTER_MAX as usize],
42}
43impl Filters {
44 pub fn reset(&mut self) {
45 for sf: &mut Reg in &mut self.flssa {
46 sf.reset();
47 }
48 for ef: &mut Reg<[u32; 2], _ExtendedFilter> in &mut self.flesa {
49 ef.reset();
50 }
51 }
52}
53
54#[repr(C)]
55pub(crate) struct Receive {
56 pub(crate) fxsa: [RxFifoElement; RX_FIFO_MAX as usize],
57}
58impl Receive {
59 pub fn reset(&mut self) {
60 for fe: &mut RxFifoElement in &mut self.fxsa {
61 fe.reset();
62 }
63 }
64}
65
66#[repr(C)]
67pub(crate) struct Transmit {
68 pub(crate) efsa: [TxEventElement; TX_EVENT_MAX as usize],
69 pub(crate) tbsa: [TxBufferElement; TX_FIFO_MAX as usize],
70}
71impl Transmit {
72 pub fn reset(&mut self) {
73 for ee: &mut Reg<[u32; 2], _TxEventElement> in &mut self.efsa {
74 ee.reset();
75 }
76 for be: &mut TxBufferElement in &mut self.tbsa {
77 be.reset();
78 }
79 }
80}
81
82pub(crate) mod standard_filter;
83pub(crate) type StandardFilterType = u32;
84pub(crate) type StandardFilter = generic::Reg<StandardFilterType, _StandardFilter>;
85pub(crate) struct _StandardFilter;
86impl generic::Readable for StandardFilter {}
87impl generic::Writable for StandardFilter {}
88
89pub(crate) mod extended_filter;
90pub(crate) type ExtendedFilterType = [u32; 2];
91pub(crate) type ExtendedFilter = generic::Reg<ExtendedFilterType, _ExtendedFilter>;
92pub(crate) struct _ExtendedFilter;
93impl generic::Readable for ExtendedFilter {}
94impl generic::Writable for ExtendedFilter {}
95
96pub(crate) mod txevent_element;
97pub(crate) type TxEventElementType = [u32; 2];
98pub(crate) type TxEventElement = generic::Reg<TxEventElementType, _TxEventElement>;
99pub(crate) struct _TxEventElement;
100impl generic::Readable for TxEventElement {}
101impl generic::Writable for TxEventElement {}
102
103pub(crate) mod rxfifo_element;
104#[repr(C)]
105pub(crate) struct RxFifoElement {
106 pub(crate) header: RxFifoElementHeader,
107 pub(crate) data: [RW<u32>; 16],
108}
109impl RxFifoElement {
110 pub(crate) fn reset(&mut self) {
111 self.header.reset();
112 for byte: &mut RW in self.data.iter_mut() {
113 unsafe { byte.write(0) };
114 }
115 }
116}
117pub(crate) type RxFifoElementHeaderType = [u32; 2];
118pub(crate) type RxFifoElementHeader = generic::Reg<RxFifoElementHeaderType, _RxFifoElement>;
119pub(crate) struct _RxFifoElement;
120impl generic::Readable for RxFifoElementHeader {}
121impl generic::Writable for RxFifoElementHeader {}
122
123pub(crate) mod txbuffer_element;
124#[repr(C)]
125pub(crate) struct TxBufferElement {
126 pub(crate) header: TxBufferElementHeader,
127 pub(crate) data: [RW<u32>; 16],
128}
129impl TxBufferElement {
130 pub(crate) fn reset(&mut self) {
131 self.header.reset();
132 for byte: &mut RW in self.data.iter_mut() {
133 unsafe { byte.write(0) };
134 }
135 }
136}
137pub(crate) type TxBufferElementHeader = generic::Reg<TxBufferElementHeaderType, _TxBufferElement>;
138pub(crate) type TxBufferElementHeaderType = [u32; 2];
139pub(crate) struct _TxBufferElement;
140impl generic::Readable for TxBufferElementHeader {}
141impl generic::Writable for TxBufferElementHeader {}
142
143// Ensure the RegisterBlock is the same size as on pg 1957 of RM0440.
144static_assertions::assert_eq_size!(Filters, [u32; 28 + 16]);
145static_assertions::assert_eq_size!(Receive, [u32; 54]);
146static_assertions::assert_eq_size!(Transmit, [u32; 6 + 54]);
147static_assertions::assert_eq_size!(
148 RegisterBlock,
149 [u32; 28 /*Standard Filters*/ +16 /*Extended Filters*/ +54 /*RxFifo0*/ +54 /*RxFifo1*/ +6 /*TxEvent*/ +54 /*TxFifo */]
150);
151