1// Definition of private classes for RTL SSA -*- C++ -*-
2// Copyright (C) 2020-2024 Free Software Foundation, Inc.
3//
4// This file is part of GCC.
5//
6// GCC is free software; you can redistribute it and/or modify it under
7// the terms of the GNU General Public License as published by the Free
8// Software Foundation; either version 3, or (at your option) any later
9// version.
10//
11// GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12// WARRANTY; without even the implied warranty of MERCHANTABILITY or
13// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14// for more details.
15//
16// You should have received a copy of the GNU General Public License
17// along with GCC; see the file COPYING3. If not see
18// <http://www.gnu.org/licenses/>.
19
20namespace rtl_ssa {
21
22// Information about a basic block's phi nodes. This class is only used when
23// constructing the SSA form, it isn't meant to be kept up-to-date.
24class function_info::bb_phi_info
25{
26public:
27 // The set of registers that need phi nodes.
28 bitmap_head regs;
29
30 // The number of registers in REGS.
31 unsigned int num_phis;
32
33 // The number of inputs to each phi node. Caching the information here
34 // is at best a minor optimisation, but it fills a 32-bit hole that would
35 // otherwise exist on 64-bit hosts.
36 unsigned int num_preds;
37
38 // An array of all the phi inputs for this block. It lists all inputs
39 // from the first incoming edge followed by all inputs for the next
40 // incoming edge, and so on. The inputs for a given edge are sorted
41 // by increasing register number.
42 set_info **inputs;
43};
44
45// Information used while constructing the SSA form and discarded
46// afterwards.
47class function_info::build_info
48{
49public:
50 build_info (unsigned int, unsigned int);
51 ~build_info ();
52
53 set_info *current_reg_value (unsigned int) const;
54 set_info *current_mem_value () const;
55
56 void record_reg_def (def_info *);
57 void record_mem_def (def_info *);
58
59 // The block that we're currently processing.
60 bb_info *current_bb;
61
62 // The EBB that contains CURRENT_BB.
63 ebb_info *current_ebb;
64
65 // Except for the local exception noted below:
66 //
67 // - If register R has been defined in the current EBB, LAST_ACCESS[R + 1]
68 // is the last definition of R in the EBB.
69 //
70 // - Otherwise, if the current EBB is dominated by a definition of R,
71 // LAST_ACCESS[R + 1] is the nearest dominating definition.
72 //
73 // - Otherwise, LAST_ACCESS[R + 1] is null.
74 //
75 // Similarly:
76 //
77 // - If the current EBB has defined memory, LAST_ACCESS[0] is the last
78 // definition of memory in the EBB.
79 //
80 // - Otherwise LAST_ACCESS[0] is the value of memory that is live on
81 // - entry to the EBB.
82 //
83 // The exception is that while building instructions, LAST_ACCESS[I]
84 // can temporarily be the use of regno I - 1 by that instruction.
85 auto_vec<access_info *> last_access;
86
87 // A bitmap used to hold EBB_LIVE_IN_FOR_DEBUG.
88 auto_bitmap tmp_ebb_live_in_for_debug;
89
90 // If nonnull, a bitmap of registers that are live on entry to this EBB,
91 // with a tree view for quick lookup. This bitmap is calculated lazily
92 // and is only used if MAY_HAVE_DEBUG_INSNS.
93 bitmap ebb_live_in_for_debug;
94
95 // The set of registers that might need to have phis associated with them.
96 // Registers outside this set are known to have a single definition that
97 // dominates all uses.
98 //
99 // Before RA, about 5% of registers are typically in the set.
100 auto_sbitmap potential_phi_regs;
101
102 // A sparse bitmap representation of POTENTIAL_PHI_REGS. Only used if
103 // MAY_HAVE_DEBUG_INSNS.
104 auto_bitmap potential_phi_regs_for_debug;
105
106 // The set of registers that have been defined so far in the current EBB.
107 auto_bitmap ebb_def_regs;
108
109 // BB_PHIS[B] describes the phis for basic block B.
110 auto_vec<bb_phi_info> bb_phis;
111
112 // BB_MEM_LIVE_OUT[B] is the memory value that is live on exit from
113 // basic block B.
114 auto_vec<set_info *> bb_mem_live_out;
115
116 // BB_TO_RPO[B] gives the position of block B in a reverse postorder
117 // of the CFG. The RPO is a tweaked version of the one normally
118 // returned by pre_and_rev_post_order_compute, with all blocks in
119 // an EBB having consecutive positions.
120 auto_vec<int> bb_to_rpo;
121
122 // This stack is divided into sections, with one section for the
123 // current basic block and one section for each dominating block.
124 // Each element is a register definition.
125 //
126 // If the section for block B contains a definition D of a register R,
127 // then one of two things is true:
128 //
129 // - D occurs in B and no definition of R dominates B.
130 // - D dominates B and is the nearest dominating definition of R.
131 //
132 // The two cases are distinguished by the value of D->bb ().
133 auto_vec<def_info *> def_stack;
134
135 // The top of this stack records the start of the current block's
136 // section in DEF_STACK.
137 auto_vec<unsigned int> old_def_stack_limit;
138
139 // The block that dominates the exit block, or null if the exit block
140 // is unreachable.
141 basic_block exit_block_dominator;
142};
143
144}
145

source code of gcc/rtl-ssa/internals.h