| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * Generic definitions of Orion SoC flavors: |
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| 4 | * Orion-1, Orion-VoIP, Orion-NAS, Orion-2, and Orion-1-90. |
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| 5 | * |
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| 6 | * Maintainer: Tzachi Perelstein <tzachi@marvell.com> |
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| 7 | */ |
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| 8 | |
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| 9 | #ifndef __ASM_ARCH_ORION5X_H |
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| 10 | #define __ASM_ARCH_ORION5X_H |
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| 11 | |
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| 12 | #include "irqs.h" |
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| 13 | |
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| 14 | /***************************************************************************** |
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| 15 | * Orion Address Maps |
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| 16 | * |
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| 17 | * phys |
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| 18 | * e0000000 PCIe MEM space |
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| 19 | * e8000000 PCI MEM space |
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| 20 | * f0000000 PCIe WA space (Orion-1/Orion-NAS only) |
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| 21 | * f1000000 on-chip peripheral registers |
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| 22 | * f2000000 PCIe I/O space |
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| 23 | * f2100000 PCI I/O space |
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| 24 | * f2200000 SRAM dedicated for the crypto unit |
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| 25 | * f4000000 device bus mappings (boot) |
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| 26 | * fa000000 device bus mappings (cs0) |
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| 27 | * fa800000 device bus mappings (cs2) |
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| 28 | * fc000000 device bus mappings (cs0/cs1) |
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| 29 | * |
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| 30 | * virt phys size |
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| 31 | * fec00000 f1000000 1M on-chip peripheral registers |
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| 32 | * fee00000 f2000000 64K PCIe I/O space |
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| 33 | * fee10000 f2100000 64K PCI I/O space |
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| 34 | * fd000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only) |
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| 35 | ****************************************************************************/ |
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| 36 | #define ORION5X_REGS_PHYS_BASE 0xf1000000 |
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| 37 | #define ORION5X_REGS_VIRT_BASE IOMEM(0xfec00000) |
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| 38 | #define ORION5X_REGS_SIZE SZ_1M |
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| 39 | |
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| 40 | #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000 |
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| 41 | #define ORION5X_PCIE_IO_BUS_BASE 0x00000000 |
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| 42 | #define ORION5X_PCIE_IO_SIZE SZ_64K |
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| 43 | |
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| 44 | #define ORION5X_PCI_IO_PHYS_BASE 0xf2100000 |
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| 45 | #define ORION5X_PCI_IO_BUS_BASE 0x00010000 |
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| 46 | #define ORION5X_PCI_IO_SIZE SZ_64K |
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| 47 | |
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| 48 | #define ORION5X_SRAM_PHYS_BASE (0xf2200000) |
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| 49 | #define ORION5X_SRAM_SIZE SZ_8K |
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| 50 | |
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| 51 | /* Relevant only for Orion-1/Orion-NAS */ |
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| 52 | #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000 |
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| 53 | #define ORION5X_PCIE_WA_VIRT_BASE IOMEM(0xfd000000) |
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| 54 | #define ORION5X_PCIE_WA_SIZE SZ_16M |
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| 55 | |
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| 56 | #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000 |
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| 57 | #define ORION5X_PCIE_MEM_SIZE SZ_128M |
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| 58 | |
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| 59 | #define ORION5X_PCI_MEM_PHYS_BASE 0xe8000000 |
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| 60 | #define ORION5X_PCI_MEM_SIZE SZ_128M |
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| 61 | |
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| 62 | /******************************************************************************* |
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| 63 | * Orion Registers Map |
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| 64 | ******************************************************************************/ |
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| 65 | |
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| 66 | #define ORION5X_DDR_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x00000) |
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| 67 | #define ORION5X_DDR_WINS_BASE (ORION5X_DDR_PHYS_BASE + 0x1500) |
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| 68 | #define ORION5X_DDR_WINS_SZ (0x10) |
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| 69 | #define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x00000) |
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| 70 | #define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x10000) |
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| 71 | #define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x10000) |
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| 72 | #define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE + (x)) |
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| 73 | #define GPIO_VIRT_BASE ORION5X_DEV_BUS_REG(0x0100) |
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| 74 | #define SPI_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x0600) |
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| 75 | #define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x1000) |
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| 76 | #define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x2000) |
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| 77 | #define UART0_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE + 0x2000) |
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| 78 | #define UART1_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x2100) |
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| 79 | #define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE + 0x2100) |
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| 80 | |
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| 81 | #define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x20000) |
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| 82 | #define ORION5X_BRIDGE_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x20000) |
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| 83 | #define ORION5X_BRIDGE_WINS_BASE (ORION5X_BRIDGE_PHYS_BASE) |
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| 84 | #define ORION5X_BRIDGE_WINS_SZ (0x80) |
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| 85 | |
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| 86 | #define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x30000) |
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| 87 | |
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| 88 | #define ORION5X_PCIE_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x40000) |
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| 89 | |
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| 90 | #define ORION5X_USB0_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x50000) |
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| 91 | #define ORION5X_USB0_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x50000) |
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| 92 | |
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| 93 | #define ORION5X_XOR_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x60900) |
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| 94 | #define ORION5X_XOR_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x60900) |
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| 95 | |
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| 96 | #define ORION5X_ETH_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x70000) |
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| 97 | #define ORION5X_ETH_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x70000) |
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| 98 | |
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| 99 | #define ORION5X_SATA_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x80000) |
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| 100 | #define ORION5X_SATA_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x80000) |
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| 101 | |
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| 102 | #define ORION5X_CRYPTO_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x90000) |
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| 103 | |
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| 104 | #define ORION5X_USB1_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0xa0000) |
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| 105 | #define ORION5X_USB1_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0xa0000) |
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| 106 | |
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| 107 | /******************************************************************************* |
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| 108 | * Device Bus Registers |
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| 109 | ******************************************************************************/ |
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| 110 | #define MPP_0_7_CTRL ORION5X_DEV_BUS_REG(0x000) |
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| 111 | #define MPP_8_15_CTRL ORION5X_DEV_BUS_REG(0x004) |
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| 112 | #define MPP_16_19_CTRL ORION5X_DEV_BUS_REG(0x050) |
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| 113 | #define MPP_DEV_CTRL ORION5X_DEV_BUS_REG(0x008) |
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| 114 | #define MPP_RESET_SAMPLE ORION5X_DEV_BUS_REG(0x010) |
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| 115 | #define DEV_BANK_0_PARAM ORION5X_DEV_BUS_REG(0x45c) |
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| 116 | #define DEV_BANK_1_PARAM ORION5X_DEV_BUS_REG(0x460) |
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| 117 | #define DEV_BANK_2_PARAM ORION5X_DEV_BUS_REG(0x464) |
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| 118 | #define DEV_BANK_BOOT_PARAM ORION5X_DEV_BUS_REG(0x46c) |
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| 119 | #define DEV_BUS_CTRL ORION5X_DEV_BUS_REG(0x4c0) |
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| 120 | #define DEV_BUS_INT_CAUSE ORION5X_DEV_BUS_REG(0x4d0) |
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| 121 | #define DEV_BUS_INT_MASK ORION5X_DEV_BUS_REG(0x4d4) |
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| 122 | |
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| 123 | /******************************************************************************* |
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| 124 | * Supported Devices & Revisions |
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| 125 | ******************************************************************************/ |
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| 126 | /* Orion-1 (88F5181) and Orion-VoIP (88F5181L) */ |
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| 127 | #define MV88F5181_DEV_ID 0x5181 |
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| 128 | #define MV88F5181_REV_B1 3 |
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| 129 | #define MV88F5181L_REV_A0 8 |
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| 130 | #define MV88F5181L_REV_A1 9 |
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| 131 | /* Orion-NAS (88F5182) */ |
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| 132 | #define MV88F5182_DEV_ID 0x5182 |
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| 133 | #define MV88F5182_REV_A2 2 |
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| 134 | /* Orion-2 (88F5281) */ |
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| 135 | #define MV88F5281_DEV_ID 0x5281 |
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| 136 | #define MV88F5281_REV_D0 4 |
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| 137 | #define MV88F5281_REV_D1 5 |
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| 138 | #define MV88F5281_REV_D2 6 |
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| 139 | /* Orion-1-90 (88F6183) */ |
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| 140 | #define MV88F6183_DEV_ID 0x6183 |
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| 141 | #define MV88F6183_REV_B0 3 |
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| 142 | |
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| 143 | #endif |
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| 144 | |
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