| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * Hardware specific definitions for SL-Cx000 series of PDAs |
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| 4 | * |
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| 5 | * Copyright (c) 2005 Alexander Wykes |
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| 6 | * Copyright (c) 2005 Richard Purdie |
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| 7 | * |
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| 8 | * Based on Sharp's 2.4 kernel patches |
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| 9 | */ |
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| 10 | #ifndef __ASM_ARCH_SPITZ_H |
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| 11 | #define __ASM_ARCH_SPITZ_H 1 |
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| 12 | #endif |
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| 13 | |
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| 14 | #include "irqs.h" /* PXA_NR_BUILTIN_GPIO, PXA_GPIO_TO_IRQ */ |
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| 15 | #include <linux/fb.h> |
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| 16 | |
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| 17 | /* Spitz/Akita GPIOs */ |
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| 18 | |
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| 19 | #define SPITZ_GPIO_KEY_INT (0) /* Key Interrupt */ |
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| 20 | #define SPITZ_GPIO_RESET (1) |
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| 21 | #define SPITZ_GPIO_nSD_DETECT (9) |
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| 22 | #define SPITZ_GPIO_TP_INT (11) /* Touch Panel interrupt */ |
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| 23 | #define SPITZ_GPIO_AK_INT (13) /* Remote Control */ |
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| 24 | #define SPITZ_GPIO_ADS7846_CS (14) |
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| 25 | #define SPITZ_GPIO_SYNC (16) |
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| 26 | #define SPITZ_GPIO_MAX1111_CS (20) |
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| 27 | #define SPITZ_GPIO_FATAL_BAT (21) |
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| 28 | #define SPITZ_GPIO_HSYNC (22) |
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| 29 | #define SPITZ_GPIO_nSD_CLK (32) |
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| 30 | #define SPITZ_GPIO_USB_DEVICE (35) |
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| 31 | #define SPITZ_GPIO_USB_HOST (37) |
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| 32 | #define SPITZ_GPIO_USB_CONNECT (41) |
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| 33 | #define SPITZ_GPIO_LCDCON_CS (53) |
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| 34 | #define SPITZ_GPIO_nPCE (54) |
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| 35 | #define SPITZ_GPIO_nSD_WP (81) |
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| 36 | #define SPITZ_GPIO_ON_RESET (89) |
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| 37 | #define SPITZ_GPIO_BAT_COVER (90) |
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| 38 | #define SPITZ_GPIO_CF_CD (94) |
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| 39 | #define SPITZ_GPIO_ON_KEY (95) |
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| 40 | #define SPITZ_GPIO_SWA (97) |
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| 41 | #define SPITZ_GPIO_SWB (96) |
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| 42 | #define SPITZ_GPIO_CHRG_FULL (101) |
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| 43 | #define SPITZ_GPIO_CO (101) |
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| 44 | #define SPITZ_GPIO_CF_IRQ (105) |
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| 45 | #define SPITZ_GPIO_AC_IN (115) |
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| 46 | #define SPITZ_GPIO_HP_IN (116) |
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| 47 | |
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| 48 | /* Spitz Only GPIOs */ |
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| 49 | |
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| 50 | #define SPITZ_GPIO_CF2_IRQ (106) /* CF slot1 Ready */ |
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| 51 | #define SPITZ_GPIO_CF2_CD (93) |
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| 52 | |
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| 53 | |
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| 54 | /* Spitz/Akita Keyboard Definitions */ |
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| 55 | |
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| 56 | #define SPITZ_KEY_STROBE_NUM (11) |
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| 57 | #define SPITZ_KEY_SENSE_NUM (7) |
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| 58 | #define SPITZ_GPIO_G0_STROBE_BIT 0x0f800000 |
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| 59 | #define SPITZ_GPIO_G1_STROBE_BIT 0x00100000 |
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| 60 | #define SPITZ_GPIO_G2_STROBE_BIT 0x01000000 |
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| 61 | #define SPITZ_GPIO_G3_STROBE_BIT 0x00041880 |
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| 62 | #define SPITZ_GPIO_G0_SENSE_BIT 0x00021000 |
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| 63 | #define SPITZ_GPIO_G1_SENSE_BIT 0x000000d4 |
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| 64 | #define SPITZ_GPIO_G2_SENSE_BIT 0x08000000 |
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| 65 | #define SPITZ_GPIO_G3_SENSE_BIT 0x00000000 |
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| 66 | |
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| 67 | #define SPITZ_GPIO_KEY_STROBE0 88 |
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| 68 | #define SPITZ_GPIO_KEY_STROBE1 23 |
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| 69 | #define SPITZ_GPIO_KEY_STROBE2 24 |
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| 70 | #define SPITZ_GPIO_KEY_STROBE3 25 |
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| 71 | #define SPITZ_GPIO_KEY_STROBE4 26 |
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| 72 | #define SPITZ_GPIO_KEY_STROBE5 27 |
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| 73 | #define SPITZ_GPIO_KEY_STROBE6 52 |
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| 74 | #define SPITZ_GPIO_KEY_STROBE7 103 |
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| 75 | #define SPITZ_GPIO_KEY_STROBE8 107 |
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| 76 | #define SPITZ_GPIO_KEY_STROBE9 108 |
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| 77 | #define SPITZ_GPIO_KEY_STROBE10 114 |
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| 78 | |
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| 79 | #define SPITZ_GPIO_KEY_SENSE0 12 |
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| 80 | #define SPITZ_GPIO_KEY_SENSE1 17 |
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| 81 | #define SPITZ_GPIO_KEY_SENSE2 91 |
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| 82 | #define SPITZ_GPIO_KEY_SENSE3 34 |
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| 83 | #define SPITZ_GPIO_KEY_SENSE4 36 |
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| 84 | #define SPITZ_GPIO_KEY_SENSE5 38 |
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| 85 | #define SPITZ_GPIO_KEY_SENSE6 39 |
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| 86 | |
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| 87 | |
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| 88 | /* Spitz Scoop Device (No. 1) GPIOs */ |
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| 89 | /* Suspend States in comments */ |
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| 90 | #define SPITZ_SCP_LED_GREEN SCOOP_GPCR_PA11 /* Keep */ |
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| 91 | #define SPITZ_SCP_JK_B SCOOP_GPCR_PA12 /* Keep */ |
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| 92 | #define SPITZ_SCP_CHRG_ON SCOOP_GPCR_PA13 /* Keep */ |
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| 93 | #define SPITZ_SCP_MUTE_L SCOOP_GPCR_PA14 /* Low */ |
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| 94 | #define SPITZ_SCP_MUTE_R SCOOP_GPCR_PA15 /* Low */ |
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| 95 | #define SPITZ_SCP_CF_POWER SCOOP_GPCR_PA16 /* Keep */ |
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| 96 | #define SPITZ_SCP_LED_ORANGE SCOOP_GPCR_PA17 /* Keep */ |
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| 97 | #define SPITZ_SCP_JK_A SCOOP_GPCR_PA18 /* Low */ |
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| 98 | #define SPITZ_SCP_ADC_TEMP_ON SCOOP_GPCR_PA19 /* Low */ |
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| 99 | |
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| 100 | #define SPITZ_SCP_IO_DIR (SPITZ_SCP_JK_B | SPITZ_SCP_CHRG_ON | \ |
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| 101 | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | \ |
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| 102 | SPITZ_SCP_CF_POWER | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) |
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| 103 | #define SPITZ_SCP_IO_OUT (SPITZ_SCP_CHRG_ON | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R) |
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| 104 | #define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) |
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| 105 | #define SPITZ_SCP_SUS_SET 0 |
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| 106 | |
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| 107 | #define SPITZ_SCP_GPIO_BASE (PXA_NR_BUILTIN_GPIO) |
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| 108 | #define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0) |
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| 109 | #define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1) |
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| 110 | #define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2) |
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| 111 | #define SPITZ_GPIO_MUTE_L (SPITZ_SCP_GPIO_BASE + 3) |
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| 112 | #define SPITZ_GPIO_MUTE_R (SPITZ_SCP_GPIO_BASE + 4) |
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| 113 | #define SPITZ_GPIO_CF_POWER (SPITZ_SCP_GPIO_BASE + 5) |
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| 114 | #define SPITZ_GPIO_LED_ORANGE (SPITZ_SCP_GPIO_BASE + 6) |
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| 115 | #define SPITZ_GPIO_JK_A (SPITZ_SCP_GPIO_BASE + 7) |
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| 116 | #define SPITZ_GPIO_ADC_TEMP_ON (SPITZ_SCP_GPIO_BASE + 8) |
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| 117 | |
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| 118 | /* Spitz Scoop Device (No. 2) GPIOs */ |
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| 119 | /* Suspend States in comments */ |
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| 120 | #define SPITZ_SCP2_IR_ON SCOOP_GPCR_PA11 /* High */ |
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| 121 | #define SPITZ_SCP2_AKIN_PULLUP SCOOP_GPCR_PA12 /* Keep */ |
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| 122 | #define SPITZ_SCP2_RESERVED_1 SCOOP_GPCR_PA13 /* High */ |
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| 123 | #define SPITZ_SCP2_RESERVED_2 SCOOP_GPCR_PA14 /* Low */ |
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| 124 | #define SPITZ_SCP2_RESERVED_3 SCOOP_GPCR_PA15 /* Low */ |
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| 125 | #define SPITZ_SCP2_RESERVED_4 SCOOP_GPCR_PA16 /* Low */ |
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| 126 | #define SPITZ_SCP2_BACKLIGHT_CONT SCOOP_GPCR_PA17 /* Low */ |
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| 127 | #define SPITZ_SCP2_BACKLIGHT_ON SCOOP_GPCR_PA18 /* Low */ |
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| 128 | #define SPITZ_SCP2_MIC_BIAS SCOOP_GPCR_PA19 /* Low */ |
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| 129 | |
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| 130 | #define SPITZ_SCP2_IO_DIR (SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1 | \ |
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| 131 | SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ |
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| 132 | SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) |
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| 133 | |
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| 134 | #define SPITZ_SCP2_IO_OUT (SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1) |
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| 135 | #define SPITZ_SCP2_SUS_CLR (SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ |
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| 136 | SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) |
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| 137 | #define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1) |
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| 138 | |
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| 139 | #define SPITZ_SCP2_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12) |
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| 140 | #define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0) |
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| 141 | #define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1) |
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| 142 | #define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2) |
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| 143 | #define SPITZ_GPIO_RESERVED_2 (SPITZ_SCP2_GPIO_BASE + 3) |
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| 144 | #define SPITZ_GPIO_RESERVED_3 (SPITZ_SCP2_GPIO_BASE + 4) |
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| 145 | #define SPITZ_GPIO_RESERVED_4 (SPITZ_SCP2_GPIO_BASE + 5) |
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| 146 | #define SPITZ_GPIO_BACKLIGHT_CONT (SPITZ_SCP2_GPIO_BASE + 6) |
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| 147 | #define SPITZ_GPIO_BACKLIGHT_ON (SPITZ_SCP2_GPIO_BASE + 7) |
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| 148 | #define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8) |
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| 149 | |
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| 150 | /* Akita IO Expander GPIOs */ |
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| 151 | #define AKITA_IOEXP_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12) |
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| 152 | #define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0) |
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| 153 | #define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1) |
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| 154 | #define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2) |
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| 155 | #define AKITA_GPIO_BACKLIGHT_ON (AKITA_IOEXP_GPIO_BASE + 3) |
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| 156 | #define AKITA_GPIO_BACKLIGHT_CONT (AKITA_IOEXP_GPIO_BASE + 4) |
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| 157 | #define AKITA_GPIO_AKIN_PULLUP (AKITA_IOEXP_GPIO_BASE + 5) |
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| 158 | #define AKITA_GPIO_IR_ON (AKITA_IOEXP_GPIO_BASE + 6) |
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| 159 | #define AKITA_GPIO_RESERVED_7 (AKITA_IOEXP_GPIO_BASE + 7) |
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| 160 | |
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| 161 | /* Spitz IRQ Definitions */ |
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| 162 | |
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| 163 | #define SPITZ_IRQ_GPIO_KEY_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_KEY_INT) |
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| 164 | #define SPITZ_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(SPITZ_GPIO_AC_IN) |
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| 165 | #define SPITZ_IRQ_GPIO_AK_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_AK_INT) |
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| 166 | #define SPITZ_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(SPITZ_GPIO_HP_IN) |
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| 167 | #define SPITZ_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT) |
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| 168 | #define SPITZ_IRQ_GPIO_SYNC PXA_GPIO_TO_IRQ(SPITZ_GPIO_SYNC) |
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| 169 | #define SPITZ_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(SPITZ_GPIO_ON_KEY) |
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| 170 | #define SPITZ_IRQ_GPIO_SWA PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWA) |
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| 171 | #define SPITZ_IRQ_GPIO_SWB PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWB) |
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| 172 | #define SPITZ_IRQ_GPIO_BAT_COVER PXA_GPIO_TO_IRQ(SPITZ_GPIO_BAT_COVER) |
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| 173 | #define SPITZ_IRQ_GPIO_FATAL_BAT PXA_GPIO_TO_IRQ(SPITZ_GPIO_FATAL_BAT) |
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| 174 | #define SPITZ_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(SPITZ_GPIO_CO) |
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| 175 | #define SPITZ_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_IRQ) |
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| 176 | #define SPITZ_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_CD) |
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| 177 | #define SPITZ_IRQ_GPIO_CF2_IRQ PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF2_IRQ) |
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| 178 | #define SPITZ_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_INT) |
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| 179 | #define SPITZ_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_DETECT) |
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| 180 | |
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| 181 | /* |
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| 182 | * Shared data structures |
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| 183 | */ |
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| 184 | extern struct platform_device spitzssp_device; |
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| 185 | extern struct sharpsl_charger_machinfo spitz_pm_machinfo; |
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| 186 | |
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