1 | /* |
2 | * IRQ vector handles |
3 | * |
4 | * This file is subject to the terms and conditions of the GNU General Public |
5 | * License. See the file "COPYING" in the main directory of this archive |
6 | * for more details. |
7 | * |
8 | * Copyright (C) 1995, 1996, 1997, 2003 by Ralf Baechle |
9 | */ |
10 | #include <linux/kernel.h> |
11 | #include <linux/init.h> |
12 | #include <linux/irq.h> |
13 | #include <linux/interrupt.h> |
14 | #include <linux/pci.h> |
15 | |
16 | #include <asm/i8259.h> |
17 | #include <asm/irq_cpu.h> |
18 | #include <asm/irq_gt641xx.h> |
19 | #include <asm/gt64120.h> |
20 | |
21 | #include <irq.h> |
22 | |
23 | asmlinkage void plat_irq_dispatch(void) |
24 | { |
25 | unsigned pending = read_c0_status() & read_c0_cause() & ST0_IM; |
26 | int irq; |
27 | |
28 | if (pending & CAUSEF_IP2) |
29 | gt641xx_irq_dispatch(); |
30 | else if (pending & CAUSEF_IP6) { |
31 | irq = i8259_irq(); |
32 | if (irq < 0) |
33 | spurious_interrupt(); |
34 | else |
35 | do_IRQ(irq); |
36 | } else if (pending & CAUSEF_IP3) |
37 | do_IRQ(MIPS_CPU_IRQ_BASE + 3); |
38 | else if (pending & CAUSEF_IP4) |
39 | do_IRQ(MIPS_CPU_IRQ_BASE + 4); |
40 | else if (pending & CAUSEF_IP5) |
41 | do_IRQ(MIPS_CPU_IRQ_BASE + 5); |
42 | else if (pending & CAUSEF_IP7) |
43 | do_IRQ(MIPS_CPU_IRQ_BASE + 7); |
44 | else |
45 | spurious_interrupt(); |
46 | } |
47 | |
48 | void __init arch_init_irq(void) |
49 | { |
50 | mips_cpu_irq_init(); |
51 | gt641xx_irq_init(); |
52 | init_i8259_irqs(); |
53 | |
54 | if (request_irq(irq: GT641XX_CASCADE_IRQ, handler: no_action, IRQF_NO_THREAD, |
55 | name: "cascade" , NULL)) { |
56 | pr_err("Failed to request irq %d (cascade)\n" , |
57 | GT641XX_CASCADE_IRQ); |
58 | } |
59 | if (request_irq(irq: I8259_CASCADE_IRQ, handler: no_action, IRQF_NO_THREAD, |
60 | name: "cascade" , NULL)) { |
61 | pr_err("Failed to request irq %d (cascade)\n" , |
62 | I8259_CASCADE_IRQ); |
63 | } |
64 | } |
65 | |