| 1 | /* |
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| 2 | * This file is subject to the terms and conditions of the GNU General Public |
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| 3 | * License. See the file "COPYING" in the main directory of this archive |
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| 4 | * for more details. |
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| 5 | * |
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| 6 | * Copyright (C) 1994, 1995, 1996, 1998, 1999, 2002, 2003 Ralf Baechle |
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| 7 | * Copyright (C) 1996 David S. Miller (davem@davemloft.net) |
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| 8 | * Copyright (C) 1994, 1995, 1996, by Andreas Busse |
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| 9 | * Copyright (C) 1999 Silicon Graphics, Inc. |
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| 10 | * Copyright (C) 2000 MIPS Technologies, Inc. |
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| 11 | * written by Carsten Langgaard, carstenl@mips.com |
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| 12 | */ |
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| 13 | #include <asm/asm.h> |
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| 14 | #include <asm/cachectl.h> |
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| 15 | #include <asm/mipsregs.h> |
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| 16 | #include <asm/asm-offsets.h> |
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| 17 | #include <asm/regdef.h> |
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| 18 | #include <asm/stackframe.h> |
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| 19 | #include <asm/thread_info.h> |
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| 20 | |
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| 21 | #include <asm/asmmacro.h> |
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| 22 | |
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| 23 | /* |
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| 24 | * task_struct *resume(task_struct *prev, task_struct *next, |
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| 25 | * struct thread_info *next_ti) |
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| 26 | */ |
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| 27 | .align 5 |
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| 28 | LEAF(resume) |
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| 29 | mfc0 t1, CP0_STATUS |
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| 30 | LONG_S t1, THREAD_STATUS(a0) |
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| 31 | cpu_save_nonscratch a0 |
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| 32 | LONG_S ra, THREAD_REG31(a0) |
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| 33 | |
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| 34 | #if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP) |
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| 35 | PTR_LA t8, __stack_chk_guard |
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| 36 | LONG_L t9, TASK_STACK_CANARY(a1) |
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| 37 | LONG_S t9, 0(t8) |
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| 38 | #endif |
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| 39 | |
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| 40 | /* |
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| 41 | * The order of restoring the registers takes care of the race |
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| 42 | * updating $28, $29 and kernelsp without disabling ints. |
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| 43 | */ |
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| 44 | move $28, a2 |
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| 45 | cpu_restore_nonscratch a1 |
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| 46 | |
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| 47 | PTR_ADDU t0, $28, _THREAD_SIZE - 32 |
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| 48 | set_saved_sp t0, t1, t2 |
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| 49 | mfc0 t1, CP0_STATUS /* Do we really need this? */ |
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| 50 | li a3, 0xff01 |
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| 51 | and t1, a3 |
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| 52 | LONG_L a2, THREAD_STATUS(a1) |
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| 53 | nor a3, $0, a3 |
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| 54 | and a2, a3 |
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| 55 | or a2, t1 |
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| 56 | mtc0 a2, CP0_STATUS |
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| 57 | move v0, a0 |
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| 58 | jr ra |
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| 59 | END(resume) |
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| 60 | |
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