| 1 | // SPDX-License-Identifier: GPL-2.0 |
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| 2 | #include <linux/types.h> |
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| 3 | #include <linux/errno.h> |
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| 4 | #include <linux/uaccess.h> |
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| 5 | |
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| 6 | #include <asm/sfp-machine.h> |
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| 7 | #include <math-emu/soft-fp.h> |
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| 8 | |
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| 9 | int |
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| 10 | mtfsf(unsigned int FM, u32 *frB) |
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| 11 | { |
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| 12 | u32 mask; |
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| 13 | u32 fpscr; |
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| 14 | |
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| 15 | if (likely(FM == 1)) |
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| 16 | mask = 0x0f; |
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| 17 | else if (likely(FM == 0xff)) |
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| 18 | mask = ~0; |
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| 19 | else { |
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| 20 | mask = ((FM & 1) | |
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| 21 | ((FM << 3) & 0x10) | |
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| 22 | ((FM << 6) & 0x100) | |
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| 23 | ((FM << 9) & 0x1000) | |
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| 24 | ((FM << 12) & 0x10000) | |
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| 25 | ((FM << 15) & 0x100000) | |
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| 26 | ((FM << 18) & 0x1000000) | |
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| 27 | ((FM << 21) & 0x10000000)) * 15; |
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| 28 | } |
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| 29 | |
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| 30 | fpscr = ((__FPU_FPSCR & ~mask) | (frB[1] & mask)) & |
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| 31 | ~(FPSCR_VX | FPSCR_FEX | 0x800); |
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| 32 | |
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| 33 | if (fpscr & (FPSCR_VXSNAN | FPSCR_VXISI | FPSCR_VXIDI | |
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| 34 | FPSCR_VXZDZ | FPSCR_VXIMZ | FPSCR_VXVC | |
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| 35 | FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI)) |
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| 36 | fpscr |= FPSCR_VX; |
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| 37 | |
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| 38 | /* The bit order of exception enables and exception status |
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| 39 | * is the same. Simply shift and mask to check for enabled |
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| 40 | * exceptions. |
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| 41 | */ |
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| 42 | if (fpscr & (fpscr >> 22) & 0xf8) |
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| 43 | fpscr |= FPSCR_FEX; |
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| 44 | |
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| 45 | __FPU_FPSCR = fpscr; |
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| 46 | |
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| 47 | #ifdef DEBUG |
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| 48 | printk("%s: %02x %p: %08lx\n" , __func__, FM, frB, __FPU_FPSCR); |
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| 49 | #endif |
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| 50 | |
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| 51 | return 0; |
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| 52 | } |
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| 53 | |
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