1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Keymile km82xx support
4 * Copyright 2008-2011 DENX Software Engineering GmbH
5 * Author: Heiko Schocher <hs@denx.de>
6 *
7 * based on code from:
8 * Copyright 2007 Freescale Semiconductor, Inc.
9 * Author: Scott Wood <scottwood@freescale.com>
10 */
11
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/fsl_devices.h>
15#include <linux/of_platform.h>
16
17#include <linux/io.h>
18#include <asm/cpm2.h>
19#include <asm/udbg.h>
20#include <asm/machdep.h>
21#include <linux/time.h>
22
23#include <sysdev/fsl_soc.h>
24#include <sysdev/cpm2_pic.h>
25
26#include "pq2.h"
27
28static void __init km82xx_pic_init(void)
29{
30 struct device_node *np __free(device_node);
31 np = of_find_compatible_node(NULL, NULL, "fsl,pq2-pic");
32
33 if (!np) {
34 pr_err("PIC init: can not find cpm-pic node\n");
35 return;
36 }
37
38 cpm2_pic_init(np);
39}
40
41struct cpm_pin {
42 int port, pin, flags;
43};
44
45static __initdata struct cpm_pin km82xx_pins[] = {
46 /* SMC1 */
47 {2, 4, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
48 {2, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
49
50 /* SMC2 */
51 {0, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
52 {0, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
53
54 /* SCC1 */
55 {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
56 {2, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
57 {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
58 {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
59
60 /* SCC4 */
61 {2, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
62 {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
63 {2, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
64 {2, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
65 {3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
66 {3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
67
68 /* FCC1 */
69 {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
70 {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
71 {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
72 {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
73 {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
74 {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
75 {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
76 {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
77 {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
78 {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
79 {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
80 {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
81 {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
82 {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
83
84 {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
85 {2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
86
87 /* FCC2 */
88 {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
89 {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
90 {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
91 {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
92 {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
93 {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
94 {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
95 {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
96 {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
97 {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
98 {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
99 {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
100 {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
101 {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
102
103 {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
104 {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
105
106 /* MDC */
107 {0, 13, CPM_PIN_OUTPUT | CPM_PIN_GPIO},
108
109#if defined(CONFIG_I2C_CPM)
110 /* I2C */
111 {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
112 {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
113#endif
114
115 /* USB */
116 {0, 10, CPM_PIN_OUTPUT | CPM_PIN_GPIO}, /* FULL_SPEED */
117 {0, 11, CPM_PIN_OUTPUT | CPM_PIN_GPIO}, /*/SLAVE */
118 {2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXN */
119 {2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXP */
120 {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* /OE */
121 {2, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXCLK */
122 {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXP */
123 {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXN */
124 {3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXD */
125
126 /* SPI */
127 {3, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_MISO PD16 */
128 {3, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_MOSI PD17 */
129 {3, 18, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_CLK PD18 */
130};
131
132static void __init init_ioports(void)
133{
134 int i;
135
136 for (i = 0; i < ARRAY_SIZE(km82xx_pins); i++) {
137 const struct cpm_pin *pin = &km82xx_pins[i];
138 cpm2_set_pin(pin->port, pin->pin, pin->flags);
139 }
140
141 cpm2_smc_clk_setup(CPM_CLK_SMC2, CPM_BRG8);
142 cpm2_smc_clk_setup(CPM_CLK_SMC1, CPM_BRG7);
143 cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_RX);
144 cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_TX);
145 cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK5, CPM_CLK_RTX);
146 cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK7, CPM_CLK_RX);
147 cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK8, CPM_CLK_TX);
148 cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_RX);
149 cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9, CPM_CLK_TX);
150 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
151 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
152
153 /* Force USB FULL SPEED bit to '1' */
154 setbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 10));
155 /* clear USB_SLAVE */
156 clrbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 11));
157}
158
159static void __init km82xx_setup_arch(void)
160{
161 if (ppc_md.progress)
162 ppc_md.progress("km82xx_setup_arch()", 0);
163
164 cpm2_reset();
165
166 /* When this is set, snooping CPM DMA from RAM causes
167 * machine checks. See erratum SIU18.
168 */
169 clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP);
170
171 init_ioports();
172
173 if (ppc_md.progress)
174 ppc_md.progress("km82xx_setup_arch(), finish", 0);
175}
176
177static const struct of_device_id of_bus_ids[] __initconst = {
178 { .compatible = "simple-bus", },
179 {},
180};
181
182static int __init declare_of_platform_devices(void)
183{
184 of_platform_bus_probe(NULL, matches: of_bus_ids, NULL);
185
186 return 0;
187}
188machine_device_initcall(km82xx, declare_of_platform_devices);
189
190define_machine(km82xx)
191{
192 .name = "Keymile km82xx",
193 .compatible = "keymile,km82xx",
194 .setup_arch = km82xx_setup_arch,
195 .init_IRQ = km82xx_pic_init,
196 .get_irq = cpm2_get_irq,
197 .restart = pq2_restart,
198 .progress = udbg_progress,
199};
200

source code of linux/arch/powerpc/platforms/82xx/km82xx.c