| 1 | // SPDX-License-Identifier: GPL-2.0 |
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| 2 | /* |
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| 3 | * Precise Delay Loops for SuperH |
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| 4 | * |
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| 5 | * Copyright (C) 1999 Niibe Yutaka & Kaz Kojima |
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| 6 | */ |
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| 7 | |
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| 8 | #include <linux/sched.h> |
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| 9 | #include <linux/delay.h> |
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| 10 | |
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| 11 | void __delay(unsigned long loops) |
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| 12 | { |
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| 13 | __asm__ __volatile__( |
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| 14 | /* |
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| 15 | * ST40-300 appears to have an issue with this code, |
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| 16 | * normally taking two cycles each loop, as with all |
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| 17 | * other SH variants. If however the branch and the |
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| 18 | * delay slot straddle an 8 byte boundary, this increases |
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| 19 | * to 3 cycles. |
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| 20 | * This align directive ensures this doesn't occur. |
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| 21 | */ |
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| 22 | ".balign 8\n\t" |
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| 23 | |
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| 24 | "tst %0, %0\n\t" |
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| 25 | "1:\t" |
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| 26 | "bf/s 1b\n\t" |
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| 27 | " dt %0" |
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| 28 | : "=r" (loops) |
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| 29 | : "0" (loops) |
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| 30 | : "t" ); |
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| 31 | } |
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| 32 | |
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| 33 | inline void __const_udelay(unsigned long xloops) |
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| 34 | { |
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| 35 | xloops *= 4; |
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| 36 | __asm__("dmulu.l %0, %2\n\t" |
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| 37 | "sts mach, %0" |
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| 38 | : "=r" (xloops) |
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| 39 | : "0" (xloops), |
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| 40 | "r" (cpu_data[raw_smp_processor_id()].loops_per_jiffy * (HZ/4)) |
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| 41 | : "macl" , "mach" ); |
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| 42 | __delay(loops: ++xloops); |
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| 43 | } |
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| 44 | |
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| 45 | void __udelay(unsigned long usecs) |
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| 46 | { |
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| 47 | __const_udelay(xloops: usecs * 0x000010c6); /* 2**32 / 1000000 */ |
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| 48 | } |
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| 49 | |
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| 50 | void __ndelay(unsigned long nsecs) |
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| 51 | { |
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| 52 | __const_udelay(xloops: nsecs * 0x00000005); |
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| 53 | } |
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| 54 | |
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| 55 | |
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