| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
|---|---|
| 2 | #ifndef _ASM_X86_IOBITMAP_H |
| 3 | #define _ASM_X86_IOBITMAP_H |
| 4 | |
| 5 | #include <linux/refcount.h> |
| 6 | #include <asm/processor.h> |
| 7 | |
| 8 | struct io_bitmap { |
| 9 | u64 sequence; |
| 10 | refcount_t refcnt; |
| 11 | /* The maximum number of bytes to copy so all zero bits are covered */ |
| 12 | unsigned int max; |
| 13 | unsigned long bitmap[IO_BITMAP_LONGS]; |
| 14 | }; |
| 15 | |
| 16 | struct task_struct; |
| 17 | |
| 18 | #ifdef CONFIG_X86_IOPL_IOPERM |
| 19 | void io_bitmap_share(struct task_struct *tsk); |
| 20 | void io_bitmap_exit(struct task_struct *tsk); |
| 21 | |
| 22 | static inline void native_tss_invalidate_io_bitmap(void) |
| 23 | { |
| 24 | /* |
| 25 | * Invalidate the I/O bitmap by moving io_bitmap_base outside the |
| 26 | * TSS limit so any subsequent I/O access from user space will |
| 27 | * trigger a #GP. |
| 28 | * |
| 29 | * This is correct even when VMEXIT rewrites the TSS limit |
| 30 | * to 0x67 as the only requirement is that the base points |
| 31 | * outside the limit. |
| 32 | */ |
| 33 | this_cpu_write(cpu_tss_rw.x86_tss.io_bitmap_base, |
| 34 | IO_BITMAP_OFFSET_INVALID); |
| 35 | } |
| 36 | |
| 37 | void native_tss_update_io_bitmap(void); |
| 38 | |
| 39 | #ifdef CONFIG_PARAVIRT_XXL |
| 40 | #include <asm/paravirt.h> |
| 41 | #else |
| 42 | #define tss_update_io_bitmap native_tss_update_io_bitmap |
| 43 | #define tss_invalidate_io_bitmap native_tss_invalidate_io_bitmap |
| 44 | #endif |
| 45 | |
| 46 | #else |
| 47 | static inline void io_bitmap_share(struct task_struct *tsk) { } |
| 48 | static inline void io_bitmap_exit(struct task_struct *tsk) { } |
| 49 | static inline void tss_update_io_bitmap(void) { } |
| 50 | #endif |
| 51 | |
| 52 | #endif |
| 53 |