| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * Copyright (C) 2023 Nuvoton Technology Corp. |
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| 4 | * Author: Chi-Fang Li <cfli0@nuvoton.com> |
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| 5 | */ |
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| 6 | |
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| 7 | #ifndef __DRV_CLK_NUVOTON_MA35D1_H |
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| 8 | #define __DRV_CLK_NUVOTON_MA35D1_H |
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| 9 | |
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| 10 | struct clk_hw *ma35d1_reg_clk_pll(struct device *dev, u32 id, u8 u8mode, const char *name, |
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| 11 | struct clk_hw *parent_hw, void __iomem *base); |
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| 12 | |
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| 13 | struct clk_hw *ma35d1_reg_adc_clkdiv(struct device *dev, const char *name, |
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| 14 | struct clk_hw *parent_hw, spinlock_t *lock, |
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| 15 | unsigned long flags, void __iomem *reg, |
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| 16 | u8 shift, u8 width, u32 mask_bit); |
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| 17 | |
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| 18 | #endif /* __DRV_CLK_NUVOTON_MA35D1_H */ |
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| 19 | |
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