| 1 | /* Copyright 2012-15 Advanced Micro Devices, Inc. |
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| 2 | * |
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| 3 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 4 | * copy of this software and associated documentation files (the "Software"), |
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| 5 | * to deal in the Software without restriction, including without limitation |
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| 6 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 7 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 8 | * Software is furnished to do so, subject to the following conditions: |
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| 9 | * |
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| 10 | * The above copyright notice and this permission notice shall be included in |
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| 11 | * all copies or substantial portions of the Software. |
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| 12 | * |
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| 13 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 14 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 15 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 16 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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| 17 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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| 18 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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| 19 | * OTHER DEALINGS IN THE SOFTWARE. |
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| 20 | * |
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| 21 | * Authors: AMD |
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| 22 | * |
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| 23 | */ |
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| 24 | |
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| 25 | #ifndef __DC_OPP_DCN201_H__ |
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| 26 | #define __DC_OPP_DCN201_H__ |
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| 27 | |
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| 28 | #include "dcn20/dcn20_opp.h" |
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| 29 | |
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| 30 | #define TO_DCN201_OPP(opp)\ |
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| 31 | container_of(opp, struct dcn201_opp, base) |
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| 32 | |
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| 33 | #define OPP_SF(reg_name, field_name, post_fix)\ |
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| 34 | .field_name = reg_name ## __ ## field_name ## post_fix |
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| 35 | |
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| 36 | #define OPP_REG_LIST_DCN201(id) \ |
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| 37 | OPP_REG_LIST_DCN10(id), \ |
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| 38 | OPP_DPG_REG_LIST(id), \ |
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| 39 | SRI(FMT_422_CONTROL, FMT, id) |
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| 40 | |
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| 41 | #define OPP_MASK_SH_LIST_DCN201(mask_sh) \ |
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| 42 | OPP_MASK_SH_LIST_DCN20(mask_sh) |
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| 43 | |
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| 44 | #define OPP_DCN201_REG_FIELD_LIST(type) \ |
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| 45 | OPP_DCN20_REG_FIELD_LIST(type); |
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| 46 | |
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| 47 | struct dcn201_opp_shift { |
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| 48 | OPP_DCN201_REG_FIELD_LIST(uint8_t); |
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| 49 | }; |
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| 50 | |
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| 51 | struct dcn201_opp_mask { |
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| 52 | OPP_DCN201_REG_FIELD_LIST(uint32_t); |
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| 53 | }; |
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| 54 | |
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| 55 | struct dcn201_opp_registers { |
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| 56 | OPP_REG_VARIABLE_LIST_DCN2_0; |
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| 57 | }; |
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| 58 | |
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| 59 | struct dcn201_opp { |
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| 60 | struct output_pixel_processor base; |
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| 61 | const struct dcn201_opp_registers *regs; |
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| 62 | const struct dcn201_opp_shift *opp_shift; |
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| 63 | const struct dcn201_opp_mask *opp_mask; |
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| 64 | bool is_write_to_ram_a_safe; |
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| 65 | }; |
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| 66 | |
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| 67 | void dcn201_opp_construct(struct dcn201_opp *oppn201, |
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| 68 | struct dc_context *ctx, |
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| 69 | uint32_t inst, |
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| 70 | const struct dcn201_opp_registers *regs, |
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| 71 | const struct dcn201_opp_shift *opp_shift, |
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| 72 | const struct dcn201_opp_mask *opp_mask); |
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| 73 | |
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| 74 | #endif |
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| 75 | |
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