1/*
2 * Copyright 2020 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef __DAL_DCN30_VPG_H__
27#define __DAL_DCN30_VPG_H__
28
29
30#define DCN30_VPG_FROM_VPG(vpg)\
31 container_of(vpg, struct dcn30_vpg, base)
32
33#define VPG_DCN3_REG_LIST(id) \
34 SRI(VPG_GENERIC_STATUS, VPG, id), \
35 SRI(VPG_GENERIC_PACKET_ACCESS_CTRL, VPG, id), \
36 SRI(VPG_GENERIC_PACKET_DATA, VPG, id), \
37 SRI(VPG_GSP_FRAME_UPDATE_CTRL, VPG, id), \
38 SRI(VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG, id)
39
40struct dcn30_vpg_registers {
41 uint32_t VPG_GENERIC_STATUS;
42 uint32_t VPG_GENERIC_PACKET_ACCESS_CTRL;
43 uint32_t VPG_GENERIC_PACKET_DATA;
44 uint32_t VPG_GSP_FRAME_UPDATE_CTRL;
45 uint32_t VPG_GSP_IMMEDIATE_UPDATE_CTRL;
46};
47
48#define DCN3_VPG_MASK_SH_LIST(mask_sh)\
49 SE_SF(VPG0_VPG_GENERIC_STATUS, VPG_GENERIC_CONFLICT_OCCURED, mask_sh),\
50 SE_SF(VPG0_VPG_GENERIC_STATUS, VPG_GENERIC_CONFLICT_CLR, mask_sh),\
51 SE_SF(VPG0_VPG_GENERIC_PACKET_ACCESS_CTRL, VPG_GENERIC_DATA_INDEX, mask_sh),\
52 SE_SF(VPG0_VPG_GENERIC_PACKET_DATA, VPG_GENERIC_DATA_BYTE0, mask_sh),\
53 SE_SF(VPG0_VPG_GENERIC_PACKET_DATA, VPG_GENERIC_DATA_BYTE1, mask_sh),\
54 SE_SF(VPG0_VPG_GENERIC_PACKET_DATA, VPG_GENERIC_DATA_BYTE2, mask_sh),\
55 SE_SF(VPG0_VPG_GENERIC_PACKET_DATA, VPG_GENERIC_DATA_BYTE3, mask_sh),\
56 SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC0_FRAME_UPDATE, mask_sh),\
57 SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC1_FRAME_UPDATE, mask_sh),\
58 SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC2_FRAME_UPDATE, mask_sh),\
59 SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC3_FRAME_UPDATE, mask_sh),\
60 SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC4_FRAME_UPDATE, mask_sh),\
61 SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC5_FRAME_UPDATE, mask_sh),\
62 SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC6_FRAME_UPDATE, mask_sh),\
63 SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC7_FRAME_UPDATE, mask_sh),\
64 SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC8_FRAME_UPDATE, mask_sh),\
65 SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC9_FRAME_UPDATE, mask_sh),\
66 SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC10_FRAME_UPDATE, mask_sh),\
67 SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC11_FRAME_UPDATE, mask_sh),\
68 SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC12_FRAME_UPDATE, mask_sh),\
69 SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC13_FRAME_UPDATE, mask_sh),\
70 SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC14_FRAME_UPDATE, mask_sh),\
71 SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC0_IMMEDIATE_UPDATE, mask_sh),\
72 SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC1_IMMEDIATE_UPDATE, mask_sh),\
73 SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC2_IMMEDIATE_UPDATE, mask_sh),\
74 SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC3_IMMEDIATE_UPDATE, mask_sh),\
75 SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC4_IMMEDIATE_UPDATE, mask_sh),\
76 SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC5_IMMEDIATE_UPDATE, mask_sh),\
77 SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC6_IMMEDIATE_UPDATE, mask_sh),\
78 SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC7_IMMEDIATE_UPDATE, mask_sh),\
79 SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC8_IMMEDIATE_UPDATE, mask_sh),\
80 SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC9_IMMEDIATE_UPDATE, mask_sh),\
81 SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC10_IMMEDIATE_UPDATE, mask_sh),\
82 SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC11_IMMEDIATE_UPDATE, mask_sh),\
83 SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC12_IMMEDIATE_UPDATE, mask_sh),\
84 SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC13_IMMEDIATE_UPDATE, mask_sh),\
85 SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC14_IMMEDIATE_UPDATE, mask_sh)
86
87#define VPG_DCN3_REG_FIELD_LIST(type) \
88 type VPG_GENERIC_CONFLICT_OCCURED;\
89 type VPG_GENERIC_CONFLICT_CLR;\
90 type VPG_GENERIC_DATA_INDEX;\
91 type VPG_GENERIC_DATA_BYTE0;\
92 type VPG_GENERIC_DATA_BYTE1;\
93 type VPG_GENERIC_DATA_BYTE2;\
94 type VPG_GENERIC_DATA_BYTE3;\
95 type VPG_GENERIC0_FRAME_UPDATE;\
96 type VPG_GENERIC1_FRAME_UPDATE;\
97 type VPG_GENERIC2_FRAME_UPDATE;\
98 type VPG_GENERIC3_FRAME_UPDATE;\
99 type VPG_GENERIC4_FRAME_UPDATE;\
100 type VPG_GENERIC5_FRAME_UPDATE;\
101 type VPG_GENERIC6_FRAME_UPDATE;\
102 type VPG_GENERIC7_FRAME_UPDATE;\
103 type VPG_GENERIC8_FRAME_UPDATE;\
104 type VPG_GENERIC9_FRAME_UPDATE;\
105 type VPG_GENERIC10_FRAME_UPDATE;\
106 type VPG_GENERIC11_FRAME_UPDATE;\
107 type VPG_GENERIC12_FRAME_UPDATE;\
108 type VPG_GENERIC13_FRAME_UPDATE;\
109 type VPG_GENERIC14_FRAME_UPDATE;\
110 type VPG_GENERIC0_IMMEDIATE_UPDATE;\
111 type VPG_GENERIC1_IMMEDIATE_UPDATE;\
112 type VPG_GENERIC2_IMMEDIATE_UPDATE;\
113 type VPG_GENERIC3_IMMEDIATE_UPDATE;\
114 type VPG_GENERIC4_IMMEDIATE_UPDATE;\
115 type VPG_GENERIC5_IMMEDIATE_UPDATE;\
116 type VPG_GENERIC6_IMMEDIATE_UPDATE;\
117 type VPG_GENERIC7_IMMEDIATE_UPDATE;\
118 type VPG_GENERIC8_IMMEDIATE_UPDATE;\
119 type VPG_GENERIC9_IMMEDIATE_UPDATE;\
120 type VPG_GENERIC10_IMMEDIATE_UPDATE;\
121 type VPG_GENERIC11_IMMEDIATE_UPDATE;\
122 type VPG_GENERIC12_IMMEDIATE_UPDATE;\
123 type VPG_GENERIC13_IMMEDIATE_UPDATE;\
124 type VPG_GENERIC14_IMMEDIATE_UPDATE
125
126
127struct dcn30_vpg_shift {
128 VPG_DCN3_REG_FIELD_LIST(uint8_t);
129};
130
131struct dcn30_vpg_mask {
132 VPG_DCN3_REG_FIELD_LIST(uint32_t);
133};
134
135struct vpg;
136
137struct vpg_funcs {
138 void (*update_generic_info_packet)(
139 struct vpg *vpg,
140 uint32_t packet_index,
141 const struct dc_info_packet *info_packet,
142 bool immediate_update);
143
144 void (*vpg_poweron)(
145 struct vpg *vpg);
146
147 void (*vpg_powerdown)(
148 struct vpg *vpg);
149};
150
151struct vpg {
152 const struct vpg_funcs *funcs;
153 struct dc_context *ctx;
154 int inst;
155};
156
157struct dcn30_vpg {
158 struct vpg base;
159 const struct dcn30_vpg_registers *regs;
160 const struct dcn30_vpg_shift *vpg_shift;
161 const struct dcn30_vpg_mask *vpg_mask;
162};
163
164void vpg3_update_generic_info_packet(
165 struct vpg *vpg,
166 uint32_t packet_index,
167 const struct dc_info_packet *info_packet,
168 bool immediate_update);
169
170void vpg3_construct(struct dcn30_vpg *vpg3,
171 struct dc_context *ctx,
172 uint32_t inst,
173 const struct dcn30_vpg_registers *vpg_regs,
174 const struct dcn30_vpg_shift *vpg_shift,
175 const struct dcn30_vpg_mask *vpg_mask);
176
177
178#endif
179

source code of linux/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h