| 1 | /* |
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| 2 | * Copyright 2019-2021 Advanced Micro Devices, Inc. |
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| 3 | * |
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 5 | * copy of this software and associated documentation files (the "Software"), |
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| 6 | * to deal in the Software without restriction, including without limitation |
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 9 | * Software is furnished to do so, subject to the following conditions: |
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| 10 | * |
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| 11 | * The above copyright notice and this permission notice shall be included in |
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| 12 | * all copies or substantial portions of the Software. |
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| 13 | * |
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| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
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| 21 | * |
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| 22 | * Authors: AMD |
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| 23 | * |
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| 24 | */ |
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| 25 | |
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| 26 | #ifndef __DCN31_FPU_H__ |
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| 27 | #define __DCN31_FPU_H__ |
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| 28 | |
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| 29 | #define DCN3_1_DEFAULT_DET_SIZE 384 |
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| 30 | #define DCN3_15_DEFAULT_DET_SIZE 192 |
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| 31 | #define DCN3_15_MIN_COMPBUF_SIZE_KB 128 |
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| 32 | #define DCN3_16_DEFAULT_DET_SIZE 192 |
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| 33 | |
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| 34 | void dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes, |
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| 35 | int pipe_cnt); |
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| 36 | |
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| 37 | void dcn31_update_soc_for_wm_a(struct dc *dc, struct dc_state *context); |
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| 38 | void dcn315_update_soc_for_wm_a(struct dc *dc, struct dc_state *context); |
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| 39 | |
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| 40 | void dcn31_calculate_wm_and_dlg_fp( |
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| 41 | struct dc *dc, struct dc_state *context, |
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| 42 | display_e2e_pipe_params_st *pipes, |
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| 43 | int pipe_cnt, |
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| 44 | int vlevel); |
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| 45 | |
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| 46 | void dcn31_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params); |
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| 47 | void dcn315_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params); |
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| 48 | void dcn316_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params); |
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| 49 | int dcn_get_max_non_odm_pix_rate_100hz(struct _vcs_dpi_soc_bounding_box_st *soc); |
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| 50 | int dcn_get_approx_det_segs_required_for_pstate( |
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| 51 | struct _vcs_dpi_soc_bounding_box_st *soc, |
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| 52 | int pix_clk_100hz, int bpp, int seg_size_kb); |
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| 53 | |
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| 54 | int dcn31x_populate_dml_pipes_from_context(struct dc *dc, |
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| 55 | struct dc_state *context, |
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| 56 | display_e2e_pipe_params_st *pipes, |
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| 57 | bool fast_validate); |
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| 58 | #endif /* __DCN31_FPU_H__*/ |
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| 59 | |
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