1 | /* |
2 | * Copyright 2012-15 Advanced Micro Devices, Inc. |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), |
6 | * to deal in the Software without restriction, including without limitation |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * Software is furnished to do so, subject to the following conditions: |
10 | * |
11 | * The above copyright notice and this permission notice shall be included in |
12 | * all copies or substantial portions of the Software. |
13 | * |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
20 | * OTHER DEALINGS IN THE SOFTWARE. |
21 | * |
22 | * Authors: AMD |
23 | * |
24 | */ |
25 | |
26 | #ifndef __DAL_HW_GPIO_H__ |
27 | #define __DAL_HW_GPIO_H__ |
28 | |
29 | #include "gpio_regs.h" |
30 | |
31 | #define FROM_HW_GPIO_PIN(ptr) \ |
32 | container_of((ptr), struct hw_gpio, base) |
33 | |
34 | struct addr_mask { |
35 | uint32_t addr; |
36 | uint32_t mask; |
37 | }; |
38 | |
39 | struct hw_gpio_pin { |
40 | const struct hw_gpio_pin_funcs *funcs; |
41 | enum gpio_id id; |
42 | uint32_t en; |
43 | enum gpio_mode mode; |
44 | bool opened; |
45 | struct dc_context *ctx; |
46 | }; |
47 | |
48 | struct hw_gpio_pin_funcs { |
49 | void (*destroy)( |
50 | struct hw_gpio_pin **ptr); |
51 | bool (*open)( |
52 | struct hw_gpio_pin *pin, |
53 | enum gpio_mode mode); |
54 | enum gpio_result (*get_value)( |
55 | const struct hw_gpio_pin *pin, |
56 | uint32_t *value); |
57 | enum gpio_result (*set_value)( |
58 | const struct hw_gpio_pin *pin, |
59 | uint32_t value); |
60 | enum gpio_result (*set_config)( |
61 | struct hw_gpio_pin *pin, |
62 | const struct gpio_config_data *config_data); |
63 | enum gpio_result (*change_mode)( |
64 | struct hw_gpio_pin *pin, |
65 | enum gpio_mode mode); |
66 | void (*close)( |
67 | struct hw_gpio_pin *pin); |
68 | }; |
69 | |
70 | |
71 | struct hw_gpio; |
72 | |
73 | /* Register indices are represented by member variables |
74 | * and are to be filled in by constructors of derived classes. |
75 | * These members permit the use of common code |
76 | * for programming registers, where the sequence is the same |
77 | * but register sets are different. |
78 | * Some GPIOs have HW mux which allows to choose |
79 | * what is the source of the signal in HW mode */ |
80 | |
81 | struct hw_gpio_pin_reg { |
82 | struct addr_mask DC_GPIO_DATA_MASK; |
83 | struct addr_mask DC_GPIO_DATA_A; |
84 | struct addr_mask DC_GPIO_DATA_EN; |
85 | struct addr_mask DC_GPIO_DATA_Y; |
86 | }; |
87 | |
88 | struct hw_gpio_mux_reg { |
89 | struct addr_mask GPIO_MUX_CONTROL; |
90 | struct addr_mask GPIO_MUX_STEREO_SEL; |
91 | }; |
92 | |
93 | struct hw_gpio { |
94 | struct hw_gpio_pin base; |
95 | |
96 | /* variables to save register value */ |
97 | struct { |
98 | uint32_t mask; |
99 | uint32_t a; |
100 | uint32_t en; |
101 | uint32_t mux; |
102 | } store; |
103 | |
104 | /* GPIO MUX support */ |
105 | bool mux_supported; |
106 | const struct gpio_registers *regs; |
107 | }; |
108 | |
109 | #define HW_GPIO_FROM_BASE(hw_gpio_pin) \ |
110 | container_of((hw_gpio_pin), struct hw_gpio, base) |
111 | |
112 | void dal_hw_gpio_construct( |
113 | struct hw_gpio *pin, |
114 | enum gpio_id id, |
115 | uint32_t en, |
116 | struct dc_context *ctx); |
117 | |
118 | bool dal_hw_gpio_open( |
119 | struct hw_gpio_pin *pin, |
120 | enum gpio_mode mode); |
121 | |
122 | enum gpio_result dal_hw_gpio_get_value( |
123 | const struct hw_gpio_pin *pin, |
124 | uint32_t *value); |
125 | |
126 | enum gpio_result dal_hw_gpio_config_mode( |
127 | struct hw_gpio *pin, |
128 | enum gpio_mode mode); |
129 | |
130 | void dal_hw_gpio_destruct( |
131 | struct hw_gpio *pin); |
132 | |
133 | enum gpio_result dal_hw_gpio_set_value( |
134 | const struct hw_gpio_pin *ptr, |
135 | uint32_t value); |
136 | |
137 | enum gpio_result dal_hw_gpio_change_mode( |
138 | struct hw_gpio_pin *ptr, |
139 | enum gpio_mode mode); |
140 | |
141 | void dal_hw_gpio_close( |
142 | struct hw_gpio_pin *ptr); |
143 | |
144 | #endif |
145 | |