1 | /* |
2 | * Copyright 2022 Advanced Micro Devices, Inc. |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), |
6 | * to deal in the Software without restriction, including without limitation |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * Software is furnished to do so, subject to the following conditions: |
10 | * |
11 | * The above copyright notice and this permission notice shall be included in |
12 | * all copies or substantial portions of the Software. |
13 | * |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
20 | * OTHER DEALINGS IN THE SOFTWARE. |
21 | * |
22 | * Authors: AMD |
23 | * |
24 | */ |
25 | |
26 | |
27 | #ifndef __DC_LINK_DP_TRAINING_H__ |
28 | #define __DC_LINK_DP_TRAINING_H__ |
29 | #include "link.h" |
30 | |
31 | bool perform_link_training_with_retries( |
32 | const struct dc_link_settings *link_setting, |
33 | bool skip_video_pattern, |
34 | int attempts, |
35 | struct pipe_ctx *pipe_ctx, |
36 | enum signal_type signal, |
37 | bool do_fallback); |
38 | |
39 | enum link_training_result dp_perform_link_training( |
40 | struct dc_link *link, |
41 | const struct link_resource *link_res, |
42 | const struct dc_link_settings *link_settings, |
43 | bool skip_video_pattern); |
44 | |
45 | bool dp_set_hw_training_pattern( |
46 | struct dc_link *link, |
47 | const struct link_resource *link_res, |
48 | enum dc_dp_training_pattern pattern, |
49 | uint32_t offset); |
50 | |
51 | void dp_set_hw_test_pattern( |
52 | struct dc_link *link, |
53 | const struct link_resource *link_res, |
54 | enum dp_test_pattern test_pattern, |
55 | uint8_t *custom_pattern, |
56 | uint32_t custom_pattern_size); |
57 | |
58 | void dpcd_set_training_pattern( |
59 | struct dc_link *link, |
60 | enum dc_dp_training_pattern training_pattern); |
61 | |
62 | /* Write DPCD drive settings. */ |
63 | enum dc_status dpcd_set_lane_settings( |
64 | struct dc_link *link, |
65 | const struct link_training_settings *link_training_setting, |
66 | uint32_t offset); |
67 | |
68 | /* Write DPCD link configuration data. */ |
69 | enum dc_status dpcd_set_link_settings( |
70 | struct dc_link *link, |
71 | const struct link_training_settings *lt_settings); |
72 | |
73 | void dpcd_set_lt_pattern_and_lane_settings( |
74 | struct dc_link *link, |
75 | const struct link_training_settings *lt_settings, |
76 | enum dc_dp_training_pattern pattern, |
77 | uint32_t offset); |
78 | |
79 | /* Read training status and adjustment requests from DPCD. */ |
80 | enum dc_status dp_get_lane_status_and_lane_adjust( |
81 | struct dc_link *link, |
82 | const struct link_training_settings *link_training_setting, |
83 | union lane_status ln_status[LANE_COUNT_DP_MAX], |
84 | union lane_align_status_updated *ln_align, |
85 | union lane_adjust ln_adjust[LANE_COUNT_DP_MAX], |
86 | uint32_t offset); |
87 | |
88 | enum dc_status dpcd_configure_lttpr_mode( |
89 | struct dc_link *link, |
90 | struct link_training_settings *lt_settings); |
91 | |
92 | enum dc_status configure_lttpr_mode_transparent(struct dc_link *link); |
93 | |
94 | enum dc_status dpcd_configure_channel_coding( |
95 | struct dc_link *link, |
96 | struct link_training_settings *lt_settings); |
97 | |
98 | void repeater_training_done(struct dc_link *link, uint32_t offset); |
99 | |
100 | void start_clock_recovery_pattern_early(struct dc_link *link, |
101 | const struct link_resource *link_res, |
102 | struct link_training_settings *lt_settings, |
103 | uint32_t offset); |
104 | |
105 | void dp_decide_training_settings( |
106 | struct dc_link *link, |
107 | const struct dc_link_settings *link_settings, |
108 | struct link_training_settings *lt_settings); |
109 | |
110 | void dp_decide_lane_settings( |
111 | const struct link_training_settings *lt_settings, |
112 | const union lane_adjust ln_adjust[LANE_COUNT_DP_MAX], |
113 | struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX], |
114 | union dpcd_training_lane *dpcd_lane_settings); |
115 | |
116 | enum dc_dp_training_pattern decide_cr_training_pattern( |
117 | const struct dc_link_settings *link_settings); |
118 | |
119 | enum dc_dp_training_pattern decide_eq_training_pattern(struct dc_link *link, |
120 | const struct dc_link_settings *link_settings); |
121 | |
122 | enum lttpr_mode dp_decide_lttpr_mode(struct dc_link *link, |
123 | struct dc_link_settings *link_setting); |
124 | |
125 | void dp_get_lttpr_mode_override(struct dc_link *link, |
126 | enum lttpr_mode *override); |
127 | |
128 | void override_training_settings( |
129 | struct dc_link *link, |
130 | const struct dc_link_training_overrides *overrides, |
131 | struct link_training_settings *lt_settings); |
132 | |
133 | /* Check DPCD training status registers to detect link loss. */ |
134 | enum link_training_result dp_check_link_loss_status( |
135 | struct dc_link *link, |
136 | const struct link_training_settings *link_training_setting); |
137 | |
138 | bool dp_is_cr_done(enum dc_lane_count ln_count, |
139 | union lane_status *dpcd_lane_status); |
140 | |
141 | bool dp_is_ch_eq_done(enum dc_lane_count ln_count, |
142 | union lane_status *dpcd_lane_status); |
143 | bool dp_is_symbol_locked(enum dc_lane_count ln_count, |
144 | union lane_status *dpcd_lane_status); |
145 | bool dp_is_interlane_aligned(union lane_align_status_updated align_status); |
146 | |
147 | bool is_repeater(const struct link_training_settings *lt_settings, uint32_t offset); |
148 | |
149 | bool dp_is_max_vs_reached( |
150 | const struct link_training_settings *lt_settings); |
151 | |
152 | uint8_t get_dpcd_link_rate(const struct dc_link_settings *link_settings); |
153 | |
154 | enum link_training_result dp_get_cr_failure(enum dc_lane_count ln_count, |
155 | union lane_status *dpcd_lane_status); |
156 | |
157 | void dp_hw_to_dpcd_lane_settings( |
158 | const struct link_training_settings *lt_settings, |
159 | const struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX], |
160 | union dpcd_training_lane dpcd_lane_settings[LANE_COUNT_DP_MAX]); |
161 | |
162 | void dp_wait_for_training_aux_rd_interval( |
163 | struct dc_link *link, |
164 | uint32_t wait_in_micro_secs); |
165 | |
166 | enum dpcd_training_patterns |
167 | dp_training_pattern_to_dpcd_training_pattern( |
168 | struct dc_link *link, |
169 | enum dc_dp_training_pattern pattern); |
170 | |
171 | uint8_t dp_initialize_scrambling_data_symbols( |
172 | struct dc_link *link, |
173 | enum dc_dp_training_pattern pattern); |
174 | |
175 | void dp_log_training_result( |
176 | struct dc_link *link, |
177 | const struct link_training_settings *lt_settings, |
178 | enum link_training_result status); |
179 | |
180 | uint32_t dp_translate_training_aux_read_interval( |
181 | uint32_t dpcd_aux_read_interval); |
182 | |
183 | uint8_t dp_get_nibble_at_index(const uint8_t *buf, |
184 | uint32_t index); |
185 | #endif /* __DC_LINK_DP_TRAINING_H__ */ |
186 | |