| 1 | // SPDX-License-Identifier: MIT |
|---|---|
| 2 | /* |
| 3 | * Copyright © 2023 Intel Corporation |
| 4 | */ |
| 5 | |
| 6 | #include "i915_reg.h" |
| 7 | #include "intel_de.h" |
| 8 | #include "intel_display_types.h" |
| 9 | #include "intel_dpt_common.h" |
| 10 | #include "skl_universal_plane_regs.h" |
| 11 | |
| 12 | void intel_dpt_configure(struct intel_crtc *crtc) |
| 13 | { |
| 14 | struct intel_display *display = to_intel_display(crtc); |
| 15 | |
| 16 | if (DISPLAY_VER(display) == 14) { |
| 17 | enum pipe pipe = crtc->pipe; |
| 18 | enum plane_id plane_id; |
| 19 | |
| 20 | for_each_plane_id_on_crtc(crtc, plane_id) { |
| 21 | if (plane_id == PLANE_CURSOR) |
| 22 | continue; |
| 23 | |
| 24 | intel_de_rmw(display, PLANE_CHICKEN(pipe, plane_id), |
| 25 | PLANE_CHICKEN_DISABLE_DPT, |
| 26 | set: display->params.enable_dpt ? 0 : |
| 27 | PLANE_CHICKEN_DISABLE_DPT); |
| 28 | } |
| 29 | } else if (DISPLAY_VER(display) == 13) { |
| 30 | intel_de_rmw(display, CHICKEN_MISC_2, |
| 31 | CHICKEN_MISC_DISABLE_DPT, |
| 32 | set: display->params.enable_dpt ? 0 : |
| 33 | CHICKEN_MISC_DISABLE_DPT); |
| 34 | } |
| 35 | } |
| 36 |