1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2023 Intel Corporation
4 */
5
6#ifndef _INTEL_GSC_UC_HECI_CMD_SUBMIT_H_
7#define _INTEL_GSC_UC_HECI_CMD_SUBMIT_H_
8
9#include <linux/types.h>
10
11struct i915_vma;
12struct intel_context;
13struct intel_gsc_uc;
14
15#define GSC_HECI_REPLY_LATENCY_MS 500
16/*
17 * Max FW response time is 500ms, but this should be counted from the time the
18 * command has hit the GSC-CS hardware, not the preceding handoff to GuC CTB.
19 */
20
21struct intel_gsc_mtl_header {
22 u32 validity_marker;
23#define GSC_HECI_VALIDITY_MARKER 0xA578875A
24
25 u8 heci_client_id;
26#define HECI_MEADDRESS_MKHI 7
27#define HECI_MEADDRESS_PROXY 10
28#define HECI_MEADDRESS_PXP 17
29#define HECI_MEADDRESS_HDCP 18
30
31 u8 reserved1;
32
33 u16 header_version;
34#define MTL_GSC_HEADER_VERSION 1
35
36 /*
37 * FW allows host to decide host_session handle
38 * as it sees fit.
39 * For intertracebility reserving select bits(60-63)
40 * to differentiate caller-target subsystem
41 * 0000 - HDCP
42 * 0001 - PXP Single Session
43 */
44 u64 host_session_handle;
45#define HOST_SESSION_MASK REG_GENMASK64(63, 60)
46#define HOST_SESSION_PXP_SINGLE BIT_ULL(60)
47 u64 gsc_message_handle;
48
49 u32 message_size; /* lower 20 bits only, upper 12 are reserved */
50
51 /*
52 * Flags mask:
53 * Bit 0: Pending
54 * Bit 1: Session Cleanup;
55 * Bits 2-15: Flags
56 * Bits 16-31: Extension Size
57 * According to internal spec flags are either input or output
58 * we distinguish the flags using OUTFLAG or INFLAG
59 */
60 u32 flags;
61#define GSC_OUTFLAG_MSG_PENDING BIT(0)
62#define GSC_INFLAG_MSG_CLEANUP BIT(1)
63
64 u32 status;
65} __packed;
66
67int intel_gsc_uc_heci_cmd_submit_packet(struct intel_gsc_uc *gsc,
68 u64 addr_in, u32 size_in,
69 u64 addr_out, u32 size_out);
70void intel_gsc_uc_heci_cmd_emit_mtl_header(struct intel_gsc_mtl_header *header,
71 u8 heci_client_id, u32 message_size,
72 u64 host_session_id);
73
74struct intel_gsc_heci_non_priv_pkt {
75 u64 addr_in;
76 u32 size_in;
77 u64 addr_out;
78 u32 size_out;
79 struct i915_vma *heci_pkt_vma;
80 struct i915_vma *bb_vma;
81};
82
83void
84intel_gsc_uc_heci_cmd_emit_mtl_header(struct intel_gsc_mtl_header *header,
85 u8 heci_client_id, u32 msg_size,
86 u64 host_session_id);
87
88int
89intel_gsc_uc_heci_cmd_submit_nonpriv(struct intel_gsc_uc *gsc,
90 struct intel_context *ce,
91 struct intel_gsc_heci_non_priv_pkt *pkt,
92 u32 *cs, int timeout_ms);
93#endif
94

source code of linux/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h