1/*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25#include <linux/string_helpers.h>
26
27#include <drm/drm_print.h>
28
29#include "i915_params.h"
30#include "i915_drv.h"
31
32DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0,
33 "DRM_UT_CORE",
34 "DRM_UT_DRIVER",
35 "DRM_UT_KMS",
36 "DRM_UT_PRIME",
37 "DRM_UT_ATOMIC",
38 "DRM_UT_VBL",
39 "DRM_UT_STATE",
40 "DRM_UT_LEASE",
41 "DRM_UT_DP",
42 "DRM_UT_DRMRES");
43
44#define i915_param_named(name, T, perm, desc) \
45 module_param_named(name, i915_modparams.name, T, perm); \
46 MODULE_PARM_DESC(name, desc)
47#define i915_param_named_unsafe(name, T, perm, desc) \
48 module_param_named_unsafe(name, i915_modparams.name, T, perm); \
49 MODULE_PARM_DESC(name, desc)
50
51struct i915_params i915_modparams __read_mostly = {
52#define MEMBER(T, member, value, ...) .member = (value),
53 I915_PARAMS_FOR_EACH(MEMBER)
54#undef MEMBER
55};
56
57/*
58 * Note: As a rule, keep module parameter sysfs permissions read-only
59 * 0400. Runtime changes are only supported through i915 debugfs.
60 *
61 * For any exceptions requiring write access and runtime changes through module
62 * parameter sysfs, prevent debugfs file creation by setting the parameter's
63 * debugfs mode to 0.
64 */
65
66i915_param_named(modeset, int, 0400,
67 "Use kernel modesetting [KMS] (0=disable, "
68 "1=on, -1=force vga console preference [default])");
69
70i915_param_named_unsafe(enable_dc, int, 0400,
71 "Enable power-saving display C-states. "
72 "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
73 "3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
74
75i915_param_named_unsafe(enable_fbc, int, 0400,
76 "Enable frame buffer compression for power savings "
77 "(default: -1 (use per-chip default))");
78
79i915_param_named_unsafe(lvds_channel_mode, int, 0400,
80 "Specify LVDS channel mode "
81 "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
82
83i915_param_named_unsafe(panel_use_ssc, int, 0400,
84 "Use Spread Spectrum Clock with panels [LVDS/eDP] "
85 "(default: auto from VBT)");
86
87i915_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
88 "Override/Ignore selection of SDVO panel mode in the VBT "
89 "(-2=ignore, -1=auto [default], index in VBT BIOS table)");
90
91i915_param_named_unsafe(reset, uint, 0400,
92 "Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset [default])");
93
94i915_param_named_unsafe(vbt_firmware, charp, 0400,
95 "Load VBT from specified file under /lib/firmware");
96
97#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
98i915_param_named(error_capture, bool, 0400,
99 "Record the GPU state following a hang. "
100 "This information in /sys/class/drm/card<N>/error is vital for "
101 "triaging and debugging hangs.");
102#endif
103
104i915_param_named_unsafe(enable_hangcheck, bool, 0400,
105 "Periodically check GPU activity for detecting hangs. "
106 "WARNING: Disabling this can cause system wide hangs. "
107 "(default: true)");
108
109i915_param_named_unsafe(enable_psr, int, 0400,
110 "Enable PSR "
111 "(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
112 "Default: -1 (use per-chip default)");
113
114i915_param_named(psr_safest_params, bool, 0400,
115 "Replace PSR VBT parameters by the safest and not optimal ones. This "
116 "is helpful to detect if PSR issues are related to bad values set in "
117 " VBT. (0=use VBT parameters, 1=use safest parameters)");
118
119i915_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
120 "Enable PSR2 selective fetch "
121 "(0=disabled, 1=enabled) "
122 "Default: 0");
123
124i915_param_named_unsafe(enable_sagv, bool, 0600,
125 "Enable system agent voltage/frequency scaling (SAGV) (default: true)");
126
127i915_param_named_unsafe(force_probe, charp, 0400,
128 "Force probe options for specified supported devices. "
129 "See CONFIG_DRM_I915_FORCE_PROBE for details.");
130
131i915_param_named_unsafe(disable_power_well, int, 0400,
132 "Disable display power wells when possible "
133 "(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)");
134
135i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
136
137i915_param_named_unsafe(enable_dpt, bool, 0400,
138 "Enable display page table (DPT) (default: true)");
139
140i915_param_named_unsafe(load_detect_test, bool, 0400,
141 "Force-enable the VGA load detect code for testing (default:false). "
142 "For developers only.");
143
144i915_param_named_unsafe(force_reset_modeset_test, bool, 0400,
145 "Force a modeset during gpu reset for testing (default:false). "
146 "For developers only.");
147
148i915_param_named_unsafe(invert_brightness, int, 0400,
149 "Invert backlight brightness "
150 "(-1 force normal, 0 machine defaults, 1 force inversion), please "
151 "report PCI device ID, subsystem vendor and subsystem device ID "
152 "to dri-devel@lists.freedesktop.org, if your machine needs it. "
153 "It will then be included in an upcoming module version.");
154
155i915_param_named(disable_display, bool, 0400,
156 "Disable display (default: false)");
157
158i915_param_named(memtest, bool, 0400,
159 "Perform a read/write test of all device memory on module load (default: off)");
160
161i915_param_named(mmio_debug, int, 0400,
162 "Enable the MMIO debug code for the first N failures (default: off). "
163 "This may negatively affect performance.");
164
165/* Special case writable file */
166i915_param_named(verbose_state_checks, bool, 0600,
167 "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
168
169i915_param_named_unsafe(nuclear_pageflip, bool, 0400,
170 "Force enable atomic functionality on platforms that don't have full support yet.");
171
172/* WA to get away with the default setting in VBT for early platforms.Will be removed */
173i915_param_named_unsafe(edp_vswing, int, 0400,
174 "Ignore/Override vswing pre-emph table selection from VBT "
175 "(0=use value from vbt [default], 1=low power swing(200mV),"
176 "2=default swing(400mV))");
177
178i915_param_named_unsafe(enable_guc, int, 0400,
179 "Enable GuC load for GuC submission and/or HuC load. "
180 "Required functionality can be selected using bitmask values. "
181 "(-1=auto [default], 0=disable, 1=GuC submission, 2=HuC load)");
182
183i915_param_named(guc_log_level, int, 0400,
184 "GuC firmware logging level. Requires GuC to be loaded. "
185 "(-1=auto [default], 0=disable, 1..4=enable with verbosity min..max)");
186
187i915_param_named_unsafe(guc_firmware_path, charp, 0400,
188 "GuC firmware path to use instead of the default one");
189
190i915_param_named_unsafe(huc_firmware_path, charp, 0400,
191 "HuC firmware path to use instead of the default one");
192
193i915_param_named_unsafe(dmc_firmware_path, charp, 0400,
194 "DMC firmware path to use instead of the default one");
195
196i915_param_named_unsafe(gsc_firmware_path, charp, 0400,
197 "GSC firmware path to use instead of the default one");
198
199i915_param_named_unsafe(enable_dp_mst, bool, 0400,
200 "Enable multi-stream transport (MST) for new DisplayPort sinks. (default: true)");
201
202#if IS_ENABLED(CONFIG_DRM_I915_DEBUG)
203i915_param_named_unsafe(inject_probe_failure, uint, 0400,
204 "Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)");
205#endif
206
207i915_param_named(enable_dpcd_backlight, int, 0400,
208 "Enable support for DPCD backlight control"
209 "(-1=use per-VBT LFP backlight type setting [default], 0=disabled, 1=enable, 2=force VESA interface, 3=force Intel interface)");
210
211#if IS_ENABLED(CONFIG_DRM_I915_GVT)
212i915_param_named(enable_gvt, bool, 0400,
213 "Enable support for Intel GVT-g graphics virtualization host support(default:false)");
214#endif
215
216#if CONFIG_DRM_I915_REQUEST_TIMEOUT
217i915_param_named_unsafe(request_timeout_ms, uint, 0600,
218 "Default request/fence/batch buffer expiration timeout.");
219#endif
220
221i915_param_named_unsafe(lmem_size, uint, 0400,
222 "Set the lmem size(in MiB) for each region. (default: 0, all memory)");
223i915_param_named_unsafe(lmem_bar_size, uint, 0400,
224 "Set the lmem bar size(in MiB).");
225
226static void _param_print_bool(struct drm_printer *p, const char *name,
227 bool val)
228{
229 drm_printf(p, f: "i915.%s=%s\n", name, str_yes_no(v: val));
230}
231
232static void _param_print_int(struct drm_printer *p, const char *name,
233 int val)
234{
235 drm_printf(p, f: "i915.%s=%d\n", name, val);
236}
237
238static void _param_print_uint(struct drm_printer *p, const char *name,
239 unsigned int val)
240{
241 drm_printf(p, f: "i915.%s=%u\n", name, val);
242}
243
244static void _param_print_ulong(struct drm_printer *p, const char *name,
245 unsigned long val)
246{
247 drm_printf(p, f: "i915.%s=%lu\n", name, val);
248}
249
250static void _param_print_charp(struct drm_printer *p, const char *name,
251 const char *val)
252{
253 drm_printf(p, f: "i915.%s=%s\n", name, val);
254}
255
256#define _param_print(p, name, val) \
257 _Generic(val, \
258 bool: _param_print_bool, \
259 int: _param_print_int, \
260 unsigned int: _param_print_uint, \
261 unsigned long: _param_print_ulong, \
262 char *: _param_print_charp)(p, name, val)
263
264/**
265 * i915_params_dump - dump i915 modparams
266 * @params: i915 modparams
267 * @p: the &drm_printer
268 *
269 * Pretty printer for i915 modparams.
270 */
271void i915_params_dump(const struct i915_params *params, struct drm_printer *p)
272{
273#define PRINT(T, x, ...) _param_print(p, #x, params->x);
274 I915_PARAMS_FOR_EACH(PRINT);
275#undef PRINT
276}
277
278static void _param_dup_charp(char **valp)
279{
280 *valp = kstrdup(s: *valp, GFP_ATOMIC);
281}
282
283static void _param_nop(void *valp)
284{
285}
286
287#define _param_dup(valp) \
288 _Generic(valp, \
289 char **: _param_dup_charp, \
290 default: _param_nop)(valp)
291
292void i915_params_copy(struct i915_params *dest, const struct i915_params *src)
293{
294 *dest = *src;
295#define DUP(T, x, ...) _param_dup(&dest->x);
296 I915_PARAMS_FOR_EACH(DUP);
297#undef DUP
298}
299
300static void _param_free_charp(char **valp)
301{
302 kfree(objp: *valp);
303 *valp = NULL;
304}
305
306#define _param_free(valp) \
307 _Generic(valp, \
308 char **: _param_free_charp, \
309 default: _param_nop)(valp)
310
311/* free the allocated members, *not* the passed in params itself */
312void i915_params_free(struct i915_params *params)
313{
314#define FREE(T, x, ...) _param_free(&params->x);
315 I915_PARAMS_FOR_EACH(FREE);
316#undef FREE
317}
318

source code of linux/drivers/gpu/drm/i915/i915_params.c