1 | /* |
2 | * SPDX-License-Identifier: MIT |
3 | * |
4 | * Copyright © 2018 Intel Corporation |
5 | */ |
6 | |
7 | #include "igt_reset.h" |
8 | |
9 | #include "gt/intel_engine.h" |
10 | #include "gt/intel_gt.h" |
11 | |
12 | #include "../i915_drv.h" |
13 | |
14 | void igt_global_reset_lock(struct intel_gt *gt) |
15 | { |
16 | struct intel_engine_cs *engine; |
17 | enum intel_engine_id id; |
18 | |
19 | pr_debug("%s: current gpu_error=%08lx\n" , __func__, gt->reset.flags); |
20 | |
21 | while (test_and_set_bit(I915_RESET_BACKOFF, addr: >->reset.flags)) |
22 | wait_event(gt->reset.queue, |
23 | !test_bit(I915_RESET_BACKOFF, >->reset.flags)); |
24 | |
25 | for_each_engine(engine, gt, id) { |
26 | while (test_and_set_bit(I915_RESET_ENGINE + id, |
27 | addr: >->reset.flags)) |
28 | wait_on_bit(word: >->reset.flags, I915_RESET_ENGINE + id, |
29 | TASK_UNINTERRUPTIBLE); |
30 | } |
31 | } |
32 | |
33 | void igt_global_reset_unlock(struct intel_gt *gt) |
34 | { |
35 | struct intel_engine_cs *engine; |
36 | enum intel_engine_id id; |
37 | |
38 | for_each_engine(engine, gt, id) |
39 | clear_and_wake_up_bit(I915_RESET_ENGINE + id, word: >->reset.flags); |
40 | |
41 | clear_bit(I915_RESET_BACKOFF, addr: >->reset.flags); |
42 | wake_up_all(>->reset.queue); |
43 | } |
44 | |
45 | bool igt_force_reset(struct intel_gt *gt) |
46 | { |
47 | intel_gt_set_wedged(gt); |
48 | intel_gt_reset(gt, stalled_mask: 0, NULL); |
49 | |
50 | return !intel_gt_is_wedged(gt); |
51 | } |
52 | |