1/* SPDX-License-Identifier: GPL-2.0-only
2 *
3 * Copyright © 2018-2020 Intel Corporation
4 */
5
6#ifndef __KMB_DRV_H__
7#define __KMB_DRV_H__
8
9#include <drm/drm_device.h>
10
11#include "kmb_plane.h"
12#include "kmb_regs.h"
13
14#define KMB_MAX_WIDTH 1920 /*Max width in pixels */
15#define KMB_MAX_HEIGHT 1080 /*Max height in pixels */
16#define KMB_MIN_WIDTH 1920 /*Max width in pixels */
17#define KMB_MIN_HEIGHT 1080 /*Max height in pixels */
18
19#define DRIVER_DATE "20210223"
20#define DRIVER_MAJOR 1
21#define DRIVER_MINOR 1
22
23/* Platform definitions */
24#define KMB_CRTC_MIN_VFP 4
25#define KMB_CRTC_MAX_WIDTH 1920 /* max width in pixels */
26#define KMB_CRTC_MAX_HEIGHT 1080 /* max height in pixels */
27#define KMB_CRTC_MIN_WIDTH 1920
28#define KMB_CRTC_MIN_HEIGHT 1080
29#define KMB_FB_MAX_WIDTH 1920
30#define KMB_FB_MAX_HEIGHT 1080
31#define KMB_FB_MIN_WIDTH 1
32#define KMB_FB_MIN_HEIGHT 1
33#define KMB_MIN_VREFRESH 59 /*vertical refresh in Hz */
34#define KMB_MAX_VREFRESH 60 /*vertical refresh in Hz */
35#define KMB_LCD_DEFAULT_CLK 200000000
36#define KMB_SYS_CLK_MHZ 500
37
38#define ICAM_MMIO 0x3b100000
39#define ICAM_LCD_OFFSET 0x1080
40#define ICAM_MMIO_SIZE 0x2000
41
42struct kmb_dsi;
43
44struct kmb_clock {
45 struct clk *clk_lcd;
46 struct clk *clk_pll0;
47};
48
49struct kmb_drm_private {
50 struct drm_device drm;
51 struct kmb_dsi *kmb_dsi;
52 void __iomem *lcd_mmio;
53 struct kmb_clock kmb_clk;
54 struct drm_crtc crtc;
55 struct kmb_plane *plane;
56 struct drm_atomic_state *state;
57 spinlock_t irq_lock;
58 int irq_lcd;
59 int sys_clk_mhz;
60 struct disp_cfg init_disp_cfg[KMB_MAX_PLANES];
61 struct layer_status plane_status[KMB_MAX_PLANES];
62 int kmb_under_flow;
63 int kmb_flush_done;
64 int layer_no;
65};
66
67static inline struct kmb_drm_private *to_kmb(const struct drm_device *dev)
68{
69 return container_of(dev, struct kmb_drm_private, drm);
70}
71
72static inline struct kmb_drm_private *crtc_to_kmb_priv(const struct drm_crtc *x)
73{
74 return container_of(x, struct kmb_drm_private, crtc);
75}
76
77static inline void kmb_write_lcd(struct kmb_drm_private *dev_p,
78 unsigned int reg, u32 value)
79{
80 writel(val: value, addr: (dev_p->lcd_mmio + reg));
81}
82
83static inline u32 kmb_read_lcd(struct kmb_drm_private *dev_p, unsigned int reg)
84{
85 return readl(addr: dev_p->lcd_mmio + reg);
86}
87
88static inline void kmb_set_bitmask_lcd(struct kmb_drm_private *dev_p,
89 unsigned int reg, u32 mask)
90{
91 u32 reg_val = kmb_read_lcd(dev_p, reg);
92
93 kmb_write_lcd(dev_p, reg, value: (reg_val | mask));
94}
95
96static inline void kmb_clr_bitmask_lcd(struct kmb_drm_private *dev_p,
97 unsigned int reg, u32 mask)
98{
99 u32 reg_val = kmb_read_lcd(dev_p, reg);
100
101 kmb_write_lcd(dev_p, reg, value: (reg_val & (~mask)));
102}
103
104int kmb_setup_crtc(struct drm_device *dev);
105void kmb_set_scanout(struct kmb_drm_private *lcd);
106#endif /* __KMB_DRV_H__ */
107

source code of linux/drivers/gpu/drm/kmb/kmb_drv.h