| 1 | /* |
| 2 | * Copyright (C) 2013, NVIDIA Corporation. All rights reserved. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sub license, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the |
| 12 | * next paragraph) shall be included in all copies or substantial portions |
| 13 | * of the Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 21 | * DEALINGS IN THE SOFTWARE. |
| 22 | */ |
| 23 | |
| 24 | #include <linux/debugfs.h> |
| 25 | #include <linux/delay.h> |
| 26 | #include <linux/gpio/consumer.h> |
| 27 | #include <linux/iopoll.h> |
| 28 | #include <linux/module.h> |
| 29 | #include <linux/of_platform.h> |
| 30 | #include <linux/platform_device.h> |
| 31 | #include <linux/pm_runtime.h> |
| 32 | #include <linux/regulator/consumer.h> |
| 33 | |
| 34 | #include <video/display_timing.h> |
| 35 | #include <video/of_display_timing.h> |
| 36 | #include <video/videomode.h> |
| 37 | |
| 38 | #include <drm/display/drm_dp_aux_bus.h> |
| 39 | #include <drm/display/drm_dp_helper.h> |
| 40 | #include <drm/drm_crtc.h> |
| 41 | #include <drm/drm_device.h> |
| 42 | #include <drm/drm_edid.h> |
| 43 | #include <drm/drm_panel.h> |
| 44 | |
| 45 | /** |
| 46 | * struct panel_delay - Describes delays for a simple panel. |
| 47 | */ |
| 48 | struct panel_delay { |
| 49 | /** |
| 50 | * @hpd_reliable: Time for HPD to be reliable |
| 51 | * |
| 52 | * The time (in milliseconds) that it takes after powering the panel |
| 53 | * before the HPD signal is reliable. Ideally this is 0 but some panels, |
| 54 | * board designs, or bad pulldown configs can cause a glitch here. |
| 55 | * |
| 56 | * NOTE: on some old panel data this number appears to be much too big. |
| 57 | * Presumably some old panels simply didn't have HPD hooked up and put |
| 58 | * the hpd_absent here because this field predates the |
| 59 | * hpd_absent. While that works, it's non-ideal. |
| 60 | */ |
| 61 | unsigned int hpd_reliable; |
| 62 | |
| 63 | /** |
| 64 | * @hpd_absent: Time to wait if HPD isn't hooked up. |
| 65 | * |
| 66 | * Add this to the prepare delay if we know Hot Plug Detect isn't used. |
| 67 | * |
| 68 | * This is T3-max on eDP timing diagrams or the delay from power on |
| 69 | * until HPD is guaranteed to be asserted. |
| 70 | */ |
| 71 | unsigned int hpd_absent; |
| 72 | |
| 73 | /** |
| 74 | * @powered_on_to_enable: Time between panel powered on and enable. |
| 75 | * |
| 76 | * The minimum time, in milliseconds, that needs to have passed |
| 77 | * between when panel powered on and enable may begin. |
| 78 | * |
| 79 | * This is (T3+T4+T5+T6+T8)-min on eDP timing diagrams or after the |
| 80 | * power supply enabled until we can turn the backlight on and see |
| 81 | * valid data. |
| 82 | * |
| 83 | * This doesn't normally need to be set if timings are already met by |
| 84 | * prepare_to_enable or enable. |
| 85 | */ |
| 86 | unsigned int powered_on_to_enable; |
| 87 | |
| 88 | /** |
| 89 | * @prepare_to_enable: Time between prepare and enable. |
| 90 | * |
| 91 | * The minimum time, in milliseconds, that needs to have passed |
| 92 | * between when prepare finished and enable may begin. If at |
| 93 | * enable time less time has passed since prepare finished, |
| 94 | * the driver waits for the remaining time. |
| 95 | * |
| 96 | * If a fixed enable delay is also specified, we'll start |
| 97 | * counting before delaying for the fixed delay. |
| 98 | * |
| 99 | * If a fixed prepare delay is also specified, we won't start |
| 100 | * counting until after the fixed delay. We can't overlap this |
| 101 | * fixed delay with the min time because the fixed delay |
| 102 | * doesn't happen at the end of the function if a HPD GPIO was |
| 103 | * specified. |
| 104 | * |
| 105 | * In other words: |
| 106 | * prepare() |
| 107 | * ... |
| 108 | * // do fixed prepare delay |
| 109 | * // wait for HPD GPIO if applicable |
| 110 | * // start counting for prepare_to_enable |
| 111 | * |
| 112 | * enable() |
| 113 | * // do fixed enable delay |
| 114 | * // enforce prepare_to_enable min time |
| 115 | * |
| 116 | * This is not specified in a standard way on eDP timing diagrams. |
| 117 | * It is effectively the time from HPD going high till you can |
| 118 | * turn on the backlight. |
| 119 | */ |
| 120 | unsigned int prepare_to_enable; |
| 121 | |
| 122 | /** |
| 123 | * @enable: Time for the panel to display a valid frame. |
| 124 | * |
| 125 | * The time (in milliseconds) that it takes for the panel to |
| 126 | * display the first valid frame after starting to receive |
| 127 | * video data. |
| 128 | * |
| 129 | * This is (T6-min + max(T7-max, T8-min)) on eDP timing diagrams or |
| 130 | * the delay after link training finishes until we can turn the |
| 131 | * backlight on and see valid data. |
| 132 | */ |
| 133 | unsigned int enable; |
| 134 | |
| 135 | /** |
| 136 | * @disable: Time for the panel to turn the display off. |
| 137 | * |
| 138 | * The time (in milliseconds) that it takes for the panel to |
| 139 | * turn the display off (no content is visible). |
| 140 | * |
| 141 | * This is T9-min (delay from backlight off to end of valid video |
| 142 | * data) on eDP timing diagrams. It is not common to set. |
| 143 | */ |
| 144 | unsigned int disable; |
| 145 | |
| 146 | /** |
| 147 | * @unprepare: Time to power down completely. |
| 148 | * |
| 149 | * The time (in milliseconds) that it takes for the panel |
| 150 | * to power itself down completely. |
| 151 | * |
| 152 | * This time is used to prevent a future "prepare" from |
| 153 | * starting until at least this many milliseconds has passed. |
| 154 | * If at prepare time less time has passed since unprepare |
| 155 | * finished, the driver waits for the remaining time. |
| 156 | * |
| 157 | * This is T12-min on eDP timing diagrams. |
| 158 | */ |
| 159 | unsigned int unprepare; |
| 160 | }; |
| 161 | |
| 162 | /** |
| 163 | * struct panel_desc - Describes a simple panel. |
| 164 | */ |
| 165 | struct panel_desc { |
| 166 | /** |
| 167 | * @modes: Pointer to array of fixed modes appropriate for this panel. |
| 168 | * |
| 169 | * If only one mode then this can just be the address of the mode. |
| 170 | * NOTE: cannot be used with "timings" and also if this is specified |
| 171 | * then you cannot override the mode in the device tree. |
| 172 | */ |
| 173 | const struct drm_display_mode *modes; |
| 174 | |
| 175 | /** @num_modes: Number of elements in modes array. */ |
| 176 | unsigned int num_modes; |
| 177 | |
| 178 | /** |
| 179 | * @timings: Pointer to array of display timings |
| 180 | * |
| 181 | * NOTE: cannot be used with "modes" and also these will be used to |
| 182 | * validate a device tree override if one is present. |
| 183 | */ |
| 184 | const struct display_timing *timings; |
| 185 | |
| 186 | /** @num_timings: Number of elements in timings array. */ |
| 187 | unsigned int num_timings; |
| 188 | |
| 189 | /** @bpc: Bits per color. */ |
| 190 | unsigned int bpc; |
| 191 | |
| 192 | /** @size: Structure containing the physical size of this panel. */ |
| 193 | struct { |
| 194 | /** |
| 195 | * @size.width: Width (in mm) of the active display area. |
| 196 | */ |
| 197 | unsigned int width; |
| 198 | |
| 199 | /** |
| 200 | * @size.height: Height (in mm) of the active display area. |
| 201 | */ |
| 202 | unsigned int height; |
| 203 | } size; |
| 204 | |
| 205 | /** @delay: Structure containing various delay values for this panel. */ |
| 206 | struct panel_delay delay; |
| 207 | }; |
| 208 | |
| 209 | /** |
| 210 | * struct edp_panel_entry - Maps panel ID to delay / panel name. |
| 211 | */ |
| 212 | struct edp_panel_entry { |
| 213 | /** @ident: edid identity used for panel matching. */ |
| 214 | const struct drm_edid_ident ident; |
| 215 | |
| 216 | /** @delay: The power sequencing delays needed for this panel. */ |
| 217 | const struct panel_delay *delay; |
| 218 | |
| 219 | /** @override_edid_mode: Override the mode obtained by edid. */ |
| 220 | const struct drm_display_mode *override_edid_mode; |
| 221 | }; |
| 222 | |
| 223 | struct panel_edp { |
| 224 | struct drm_panel base; |
| 225 | bool no_hpd; |
| 226 | |
| 227 | ktime_t prepared_time; |
| 228 | ktime_t powered_on_time; |
| 229 | ktime_t unprepared_time; |
| 230 | |
| 231 | const struct panel_desc *desc; |
| 232 | |
| 233 | struct regulator *supply; |
| 234 | struct i2c_adapter *ddc; |
| 235 | struct drm_dp_aux *aux; |
| 236 | |
| 237 | struct gpio_desc *enable_gpio; |
| 238 | struct gpio_desc *hpd_gpio; |
| 239 | |
| 240 | const struct edp_panel_entry *detected_panel; |
| 241 | |
| 242 | const struct drm_edid *drm_edid; |
| 243 | |
| 244 | struct drm_display_mode override_mode; |
| 245 | |
| 246 | enum drm_panel_orientation orientation; |
| 247 | }; |
| 248 | |
| 249 | static inline struct panel_edp *to_panel_edp(struct drm_panel *panel) |
| 250 | { |
| 251 | return container_of(panel, struct panel_edp, base); |
| 252 | } |
| 253 | |
| 254 | static unsigned int panel_edp_get_timings_modes(struct panel_edp *panel, |
| 255 | struct drm_connector *connector) |
| 256 | { |
| 257 | struct drm_display_mode *mode; |
| 258 | unsigned int i, num = 0; |
| 259 | |
| 260 | for (i = 0; i < panel->desc->num_timings; i++) { |
| 261 | const struct display_timing *dt = &panel->desc->timings[i]; |
| 262 | struct videomode vm; |
| 263 | |
| 264 | videomode_from_timing(dt, vm: &vm); |
| 265 | mode = drm_mode_create(dev: connector->dev); |
| 266 | if (!mode) { |
| 267 | dev_err(panel->base.dev, "failed to add mode %ux%u\n" , |
| 268 | dt->hactive.typ, dt->vactive.typ); |
| 269 | continue; |
| 270 | } |
| 271 | |
| 272 | drm_display_mode_from_videomode(vm: &vm, dmode: mode); |
| 273 | |
| 274 | mode->type |= DRM_MODE_TYPE_DRIVER; |
| 275 | |
| 276 | if (panel->desc->num_timings == 1) |
| 277 | mode->type |= DRM_MODE_TYPE_PREFERRED; |
| 278 | |
| 279 | drm_mode_probed_add(connector, mode); |
| 280 | num++; |
| 281 | } |
| 282 | |
| 283 | return num; |
| 284 | } |
| 285 | |
| 286 | static unsigned int panel_edp_get_display_modes(struct panel_edp *panel, |
| 287 | struct drm_connector *connector) |
| 288 | { |
| 289 | struct drm_display_mode *mode; |
| 290 | unsigned int i, num = 0; |
| 291 | |
| 292 | for (i = 0; i < panel->desc->num_modes; i++) { |
| 293 | const struct drm_display_mode *m = &panel->desc->modes[i]; |
| 294 | |
| 295 | mode = drm_mode_duplicate(dev: connector->dev, mode: m); |
| 296 | if (!mode) { |
| 297 | dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n" , |
| 298 | m->hdisplay, m->vdisplay, |
| 299 | drm_mode_vrefresh(m)); |
| 300 | continue; |
| 301 | } |
| 302 | |
| 303 | mode->type |= DRM_MODE_TYPE_DRIVER; |
| 304 | |
| 305 | if (panel->desc->num_modes == 1) |
| 306 | mode->type |= DRM_MODE_TYPE_PREFERRED; |
| 307 | |
| 308 | drm_mode_set_name(mode); |
| 309 | |
| 310 | drm_mode_probed_add(connector, mode); |
| 311 | num++; |
| 312 | } |
| 313 | |
| 314 | return num; |
| 315 | } |
| 316 | |
| 317 | static int panel_edp_override_edid_mode(struct panel_edp *panel, |
| 318 | struct drm_connector *connector, |
| 319 | const struct drm_display_mode *override_mode) |
| 320 | { |
| 321 | struct drm_display_mode *mode; |
| 322 | |
| 323 | mode = drm_mode_duplicate(dev: connector->dev, mode: override_mode); |
| 324 | if (!mode) { |
| 325 | dev_err(panel->base.dev, "failed to add additional mode\n" ); |
| 326 | return 0; |
| 327 | } |
| 328 | |
| 329 | mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; |
| 330 | drm_mode_set_name(mode); |
| 331 | drm_mode_probed_add(connector, mode); |
| 332 | return 1; |
| 333 | } |
| 334 | |
| 335 | static int panel_edp_get_non_edid_modes(struct panel_edp *panel, |
| 336 | struct drm_connector *connector) |
| 337 | { |
| 338 | struct drm_display_mode *mode; |
| 339 | bool has_override = panel->override_mode.type; |
| 340 | unsigned int num = 0; |
| 341 | |
| 342 | if (!panel->desc) |
| 343 | return 0; |
| 344 | |
| 345 | if (has_override) { |
| 346 | mode = drm_mode_duplicate(dev: connector->dev, |
| 347 | mode: &panel->override_mode); |
| 348 | if (mode) { |
| 349 | drm_mode_probed_add(connector, mode); |
| 350 | num = 1; |
| 351 | } else { |
| 352 | dev_err(panel->base.dev, "failed to add override mode\n" ); |
| 353 | } |
| 354 | } |
| 355 | |
| 356 | /* Only add timings if override was not there or failed to validate */ |
| 357 | if (num == 0 && panel->desc->num_timings) |
| 358 | num = panel_edp_get_timings_modes(panel, connector); |
| 359 | |
| 360 | /* |
| 361 | * Only add fixed modes if timings/override added no mode. |
| 362 | * |
| 363 | * We should only ever have either the display timings specified |
| 364 | * or a fixed mode. Anything else is rather bogus. |
| 365 | */ |
| 366 | WARN_ON(panel->desc->num_timings && panel->desc->num_modes); |
| 367 | if (num == 0) |
| 368 | num = panel_edp_get_display_modes(panel, connector); |
| 369 | |
| 370 | connector->display_info.bpc = panel->desc->bpc; |
| 371 | connector->display_info.width_mm = panel->desc->size.width; |
| 372 | connector->display_info.height_mm = panel->desc->size.height; |
| 373 | |
| 374 | return num; |
| 375 | } |
| 376 | |
| 377 | static void panel_edp_wait(ktime_t start_ktime, unsigned int min_ms) |
| 378 | { |
| 379 | ktime_t now_ktime, min_ktime; |
| 380 | |
| 381 | if (!min_ms) |
| 382 | return; |
| 383 | |
| 384 | min_ktime = ktime_add(start_ktime, ms_to_ktime(min_ms)); |
| 385 | now_ktime = ktime_get_boottime(); |
| 386 | |
| 387 | if (ktime_before(cmp1: now_ktime, cmp2: min_ktime)) |
| 388 | msleep(msecs: ktime_to_ms(ktime_sub(min_ktime, now_ktime)) + 1); |
| 389 | } |
| 390 | |
| 391 | static int panel_edp_disable(struct drm_panel *panel) |
| 392 | { |
| 393 | struct panel_edp *p = to_panel_edp(panel); |
| 394 | |
| 395 | if (p->desc->delay.disable) |
| 396 | msleep(msecs: p->desc->delay.disable); |
| 397 | |
| 398 | return 0; |
| 399 | } |
| 400 | |
| 401 | static int panel_edp_suspend(struct device *dev) |
| 402 | { |
| 403 | struct panel_edp *p = dev_get_drvdata(dev); |
| 404 | |
| 405 | drm_dp_dpcd_set_powered(aux: p->aux, powered: false); |
| 406 | gpiod_set_value_cansleep(desc: p->enable_gpio, value: 0); |
| 407 | regulator_disable(regulator: p->supply); |
| 408 | p->unprepared_time = ktime_get_boottime(); |
| 409 | |
| 410 | return 0; |
| 411 | } |
| 412 | |
| 413 | static int panel_edp_unprepare(struct drm_panel *panel) |
| 414 | { |
| 415 | int ret; |
| 416 | |
| 417 | ret = pm_runtime_put_sync_suspend(dev: panel->dev); |
| 418 | if (ret < 0) |
| 419 | return ret; |
| 420 | |
| 421 | return 0; |
| 422 | } |
| 423 | |
| 424 | static int panel_edp_get_hpd_gpio(struct device *dev, struct panel_edp *p) |
| 425 | { |
| 426 | p->hpd_gpio = devm_gpiod_get_optional(dev, con_id: "hpd" , flags: GPIOD_IN); |
| 427 | if (IS_ERR(ptr: p->hpd_gpio)) |
| 428 | return dev_err_probe(dev, err: PTR_ERR(ptr: p->hpd_gpio), |
| 429 | fmt: "failed to get 'hpd' GPIO\n" ); |
| 430 | |
| 431 | return 0; |
| 432 | } |
| 433 | |
| 434 | static bool panel_edp_can_read_hpd(struct panel_edp *p) |
| 435 | { |
| 436 | return !p->no_hpd && (p->hpd_gpio || (p->aux && p->aux->wait_hpd_asserted)); |
| 437 | } |
| 438 | |
| 439 | static int panel_edp_prepare_once(struct panel_edp *p) |
| 440 | { |
| 441 | struct device *dev = p->base.dev; |
| 442 | unsigned int delay; |
| 443 | int err; |
| 444 | int hpd_asserted; |
| 445 | unsigned long hpd_wait_us; |
| 446 | |
| 447 | panel_edp_wait(start_ktime: p->unprepared_time, min_ms: p->desc->delay.unprepare); |
| 448 | |
| 449 | err = regulator_enable(regulator: p->supply); |
| 450 | if (err < 0) { |
| 451 | dev_err(dev, "failed to enable supply: %d\n" , err); |
| 452 | return err; |
| 453 | } |
| 454 | |
| 455 | gpiod_set_value_cansleep(desc: p->enable_gpio, value: 1); |
| 456 | drm_dp_dpcd_set_powered(aux: p->aux, powered: true); |
| 457 | |
| 458 | p->powered_on_time = ktime_get_boottime(); |
| 459 | |
| 460 | delay = p->desc->delay.hpd_reliable; |
| 461 | if (p->no_hpd) |
| 462 | delay = max(delay, p->desc->delay.hpd_absent); |
| 463 | if (delay) |
| 464 | msleep(msecs: delay); |
| 465 | |
| 466 | if (panel_edp_can_read_hpd(p)) { |
| 467 | if (p->desc->delay.hpd_absent) |
| 468 | hpd_wait_us = p->desc->delay.hpd_absent * 1000UL; |
| 469 | else |
| 470 | hpd_wait_us = 2000000; |
| 471 | |
| 472 | if (p->hpd_gpio) { |
| 473 | err = readx_poll_timeout(gpiod_get_value_cansleep, |
| 474 | p->hpd_gpio, hpd_asserted, |
| 475 | hpd_asserted, 1000, hpd_wait_us); |
| 476 | if (hpd_asserted < 0) |
| 477 | err = hpd_asserted; |
| 478 | } else { |
| 479 | err = p->aux->wait_hpd_asserted(p->aux, hpd_wait_us); |
| 480 | } |
| 481 | |
| 482 | if (err) { |
| 483 | if (err != -ETIMEDOUT) |
| 484 | dev_err(dev, |
| 485 | "error waiting for hpd GPIO: %d\n" , err); |
| 486 | goto error; |
| 487 | } |
| 488 | } |
| 489 | |
| 490 | p->prepared_time = ktime_get_boottime(); |
| 491 | |
| 492 | return 0; |
| 493 | |
| 494 | error: |
| 495 | drm_dp_dpcd_set_powered(aux: p->aux, powered: false); |
| 496 | gpiod_set_value_cansleep(desc: p->enable_gpio, value: 0); |
| 497 | regulator_disable(regulator: p->supply); |
| 498 | p->unprepared_time = ktime_get_boottime(); |
| 499 | |
| 500 | return err; |
| 501 | } |
| 502 | |
| 503 | /* |
| 504 | * Some panels simply don't always come up and need to be power cycled to |
| 505 | * work properly. We'll allow for a handful of retries. |
| 506 | */ |
| 507 | #define MAX_PANEL_PREPARE_TRIES 5 |
| 508 | |
| 509 | static int panel_edp_resume(struct device *dev) |
| 510 | { |
| 511 | struct panel_edp *p = dev_get_drvdata(dev); |
| 512 | int ret; |
| 513 | int try; |
| 514 | |
| 515 | for (try = 0; try < MAX_PANEL_PREPARE_TRIES; try++) { |
| 516 | ret = panel_edp_prepare_once(p); |
| 517 | if (ret != -ETIMEDOUT) |
| 518 | break; |
| 519 | } |
| 520 | |
| 521 | if (ret == -ETIMEDOUT) |
| 522 | dev_err(dev, "Prepare timeout after %d tries\n" , try); |
| 523 | else if (try) |
| 524 | dev_warn(dev, "Prepare needed %d retries\n" , try); |
| 525 | |
| 526 | return ret; |
| 527 | } |
| 528 | |
| 529 | static int panel_edp_prepare(struct drm_panel *panel) |
| 530 | { |
| 531 | int ret; |
| 532 | |
| 533 | ret = pm_runtime_get_sync(dev: panel->dev); |
| 534 | if (ret < 0) { |
| 535 | pm_runtime_put_autosuspend(dev: panel->dev); |
| 536 | return ret; |
| 537 | } |
| 538 | |
| 539 | return 0; |
| 540 | } |
| 541 | |
| 542 | static int panel_edp_enable(struct drm_panel *panel) |
| 543 | { |
| 544 | struct panel_edp *p = to_panel_edp(panel); |
| 545 | unsigned int delay; |
| 546 | |
| 547 | delay = p->desc->delay.enable; |
| 548 | |
| 549 | /* |
| 550 | * If there is a "prepare_to_enable" delay then that's supposed to be |
| 551 | * the delay from HPD going high until we can turn the backlight on. |
| 552 | * However, we can only count this if HPD is readable by the panel |
| 553 | * driver. |
| 554 | * |
| 555 | * If we aren't handling the HPD pin ourselves then the best we |
| 556 | * can do is assume that HPD went high immediately before we were |
| 557 | * called (and link training took zero time). Note that "no-hpd" |
| 558 | * actually counts as handling HPD ourselves since we're doing the |
| 559 | * worst case delay (in prepare) ourselves. |
| 560 | * |
| 561 | * NOTE: if we ever end up in this "if" statement then we're |
| 562 | * guaranteed that the panel_edp_wait() call below will do no delay. |
| 563 | * It already handles that case, though, so we don't need any special |
| 564 | * code for it. |
| 565 | */ |
| 566 | if (p->desc->delay.prepare_to_enable && |
| 567 | !panel_edp_can_read_hpd(p) && !p->no_hpd) |
| 568 | delay = max(delay, p->desc->delay.prepare_to_enable); |
| 569 | |
| 570 | if (delay) |
| 571 | msleep(msecs: delay); |
| 572 | |
| 573 | panel_edp_wait(start_ktime: p->prepared_time, min_ms: p->desc->delay.prepare_to_enable); |
| 574 | |
| 575 | panel_edp_wait(start_ktime: p->powered_on_time, min_ms: p->desc->delay.powered_on_to_enable); |
| 576 | |
| 577 | return 0; |
| 578 | } |
| 579 | |
| 580 | static int panel_edp_get_modes(struct drm_panel *panel, |
| 581 | struct drm_connector *connector) |
| 582 | { |
| 583 | struct panel_edp *p = to_panel_edp(panel); |
| 584 | int num = 0; |
| 585 | bool has_hard_coded_modes = p->desc->num_timings || p->desc->num_modes; |
| 586 | bool has_override_edid_mode = p->detected_panel && |
| 587 | p->detected_panel != ERR_PTR(error: -EINVAL) && |
| 588 | p->detected_panel->override_edid_mode; |
| 589 | |
| 590 | /* probe EDID if a DDC bus is available */ |
| 591 | if (p->ddc) { |
| 592 | pm_runtime_get_sync(dev: panel->dev); |
| 593 | |
| 594 | if (!p->drm_edid) |
| 595 | p->drm_edid = drm_edid_read_ddc(connector, adapter: p->ddc); |
| 596 | |
| 597 | drm_edid_connector_update(connector, edid: p->drm_edid); |
| 598 | |
| 599 | /* |
| 600 | * If both edid and hard-coded modes exists, skip edid modes to |
| 601 | * avoid multiple preferred modes. |
| 602 | */ |
| 603 | if (p->drm_edid && !has_hard_coded_modes) { |
| 604 | if (has_override_edid_mode) { |
| 605 | /* |
| 606 | * override_edid_mode is specified. Use |
| 607 | * override_edid_mode instead of from edid. |
| 608 | */ |
| 609 | num += panel_edp_override_edid_mode(panel: p, connector, |
| 610 | override_mode: p->detected_panel->override_edid_mode); |
| 611 | } else { |
| 612 | num += drm_edid_connector_add_modes(connector); |
| 613 | } |
| 614 | } |
| 615 | |
| 616 | pm_runtime_mark_last_busy(dev: panel->dev); |
| 617 | pm_runtime_put_autosuspend(dev: panel->dev); |
| 618 | } |
| 619 | |
| 620 | if (has_hard_coded_modes) |
| 621 | num += panel_edp_get_non_edid_modes(panel: p, connector); |
| 622 | else if (!num) |
| 623 | dev_warn(p->base.dev, "No display modes\n" ); |
| 624 | |
| 625 | /* |
| 626 | * TODO: Remove once all drm drivers call |
| 627 | * drm_connector_set_orientation_from_panel() |
| 628 | */ |
| 629 | drm_connector_set_panel_orientation(connector, panel_orientation: p->orientation); |
| 630 | |
| 631 | return num; |
| 632 | } |
| 633 | |
| 634 | static int panel_edp_get_timings(struct drm_panel *panel, |
| 635 | unsigned int num_timings, |
| 636 | struct display_timing *timings) |
| 637 | { |
| 638 | struct panel_edp *p = to_panel_edp(panel); |
| 639 | unsigned int i; |
| 640 | |
| 641 | if (p->desc->num_timings < num_timings) |
| 642 | num_timings = p->desc->num_timings; |
| 643 | |
| 644 | if (timings) |
| 645 | for (i = 0; i < num_timings; i++) |
| 646 | timings[i] = p->desc->timings[i]; |
| 647 | |
| 648 | return p->desc->num_timings; |
| 649 | } |
| 650 | |
| 651 | static enum drm_panel_orientation panel_edp_get_orientation(struct drm_panel *panel) |
| 652 | { |
| 653 | struct panel_edp *p = to_panel_edp(panel); |
| 654 | |
| 655 | return p->orientation; |
| 656 | } |
| 657 | |
| 658 | static int detected_panel_show(struct seq_file *s, void *data) |
| 659 | { |
| 660 | struct drm_panel *panel = s->private; |
| 661 | struct panel_edp *p = to_panel_edp(panel); |
| 662 | |
| 663 | if (IS_ERR(ptr: p->detected_panel)) |
| 664 | seq_puts(m: s, s: "UNKNOWN\n" ); |
| 665 | else if (!p->detected_panel) |
| 666 | seq_puts(m: s, s: "HARDCODED\n" ); |
| 667 | else |
| 668 | seq_printf(m: s, fmt: "%s\n" , p->detected_panel->ident.name); |
| 669 | |
| 670 | return 0; |
| 671 | } |
| 672 | |
| 673 | DEFINE_SHOW_ATTRIBUTE(detected_panel); |
| 674 | |
| 675 | static void panel_edp_debugfs_init(struct drm_panel *panel, struct dentry *root) |
| 676 | { |
| 677 | debugfs_create_file("detected_panel" , 0600, root, panel, &detected_panel_fops); |
| 678 | } |
| 679 | |
| 680 | static const struct drm_panel_funcs panel_edp_funcs = { |
| 681 | .disable = panel_edp_disable, |
| 682 | .unprepare = panel_edp_unprepare, |
| 683 | .prepare = panel_edp_prepare, |
| 684 | .enable = panel_edp_enable, |
| 685 | .get_modes = panel_edp_get_modes, |
| 686 | .get_orientation = panel_edp_get_orientation, |
| 687 | .get_timings = panel_edp_get_timings, |
| 688 | .debugfs_init = panel_edp_debugfs_init, |
| 689 | }; |
| 690 | |
| 691 | #define PANEL_EDP_BOUNDS_CHECK(to_check, bounds, field) \ |
| 692 | (to_check->field.typ >= bounds->field.min && \ |
| 693 | to_check->field.typ <= bounds->field.max) |
| 694 | static void panel_edp_parse_panel_timing_node(struct device *dev, |
| 695 | struct panel_edp *panel, |
| 696 | const struct display_timing *ot) |
| 697 | { |
| 698 | const struct panel_desc *desc = panel->desc; |
| 699 | struct videomode vm; |
| 700 | unsigned int i; |
| 701 | |
| 702 | if (WARN_ON(desc->num_modes)) { |
| 703 | dev_err(dev, "Reject override mode: panel has a fixed mode\n" ); |
| 704 | return; |
| 705 | } |
| 706 | if (WARN_ON(!desc->num_timings)) { |
| 707 | dev_err(dev, "Reject override mode: no timings specified\n" ); |
| 708 | return; |
| 709 | } |
| 710 | |
| 711 | for (i = 0; i < panel->desc->num_timings; i++) { |
| 712 | const struct display_timing *dt = &panel->desc->timings[i]; |
| 713 | |
| 714 | if (!PANEL_EDP_BOUNDS_CHECK(ot, dt, hactive) || |
| 715 | !PANEL_EDP_BOUNDS_CHECK(ot, dt, hfront_porch) || |
| 716 | !PANEL_EDP_BOUNDS_CHECK(ot, dt, hback_porch) || |
| 717 | !PANEL_EDP_BOUNDS_CHECK(ot, dt, hsync_len) || |
| 718 | !PANEL_EDP_BOUNDS_CHECK(ot, dt, vactive) || |
| 719 | !PANEL_EDP_BOUNDS_CHECK(ot, dt, vfront_porch) || |
| 720 | !PANEL_EDP_BOUNDS_CHECK(ot, dt, vback_porch) || |
| 721 | !PANEL_EDP_BOUNDS_CHECK(ot, dt, vsync_len)) |
| 722 | continue; |
| 723 | |
| 724 | if (ot->flags != dt->flags) |
| 725 | continue; |
| 726 | |
| 727 | videomode_from_timing(dt: ot, vm: &vm); |
| 728 | drm_display_mode_from_videomode(vm: &vm, dmode: &panel->override_mode); |
| 729 | panel->override_mode.type |= DRM_MODE_TYPE_DRIVER | |
| 730 | DRM_MODE_TYPE_PREFERRED; |
| 731 | break; |
| 732 | } |
| 733 | |
| 734 | if (WARN_ON(!panel->override_mode.type)) |
| 735 | dev_err(dev, "Reject override mode: No display_timing found\n" ); |
| 736 | } |
| 737 | |
| 738 | static const struct edp_panel_entry *find_edp_panel(u32 panel_id, const struct drm_edid *edid); |
| 739 | |
| 740 | static void panel_edp_set_conservative_timings(struct panel_edp *panel, struct panel_desc *desc) |
| 741 | { |
| 742 | /* |
| 743 | * It's highly likely that the panel will work if we use very |
| 744 | * conservative timings, so let's do that. |
| 745 | * |
| 746 | * Nearly all panels have a "unprepare" delay of 500 ms though |
| 747 | * there are a few with 1000. Let's stick 2000 in just to be |
| 748 | * super conservative. |
| 749 | * |
| 750 | * An "enable" delay of 80 ms seems the most common, but we'll |
| 751 | * throw in 200 ms to be safe. |
| 752 | */ |
| 753 | desc->delay.unprepare = 2000; |
| 754 | desc->delay.enable = 200; |
| 755 | |
| 756 | panel->detected_panel = ERR_PTR(error: -EINVAL); |
| 757 | } |
| 758 | |
| 759 | static int generic_edp_panel_probe(struct device *dev, struct panel_edp *panel) |
| 760 | { |
| 761 | struct panel_desc *desc; |
| 762 | const struct drm_edid *base_block; |
| 763 | u32 panel_id; |
| 764 | char vend[4]; |
| 765 | u16 product_id; |
| 766 | u32 reliable_ms = 0; |
| 767 | u32 absent_ms = 0; |
| 768 | int ret; |
| 769 | |
| 770 | desc = devm_kzalloc(dev, size: sizeof(*desc), GFP_KERNEL); |
| 771 | if (!desc) |
| 772 | return -ENOMEM; |
| 773 | panel->desc = desc; |
| 774 | |
| 775 | /* |
| 776 | * Read the dts properties for the initial probe. These are used by |
| 777 | * the runtime resume code which will get called by the |
| 778 | * pm_runtime_get_sync() call below. |
| 779 | */ |
| 780 | of_property_read_u32(np: dev->of_node, propname: "hpd-reliable-delay-ms" , out_value: &reliable_ms); |
| 781 | desc->delay.hpd_reliable = reliable_ms; |
| 782 | of_property_read_u32(np: dev->of_node, propname: "hpd-absent-delay-ms" , out_value: &absent_ms); |
| 783 | desc->delay.hpd_absent = absent_ms; |
| 784 | |
| 785 | /* Power the panel on so we can read the EDID */ |
| 786 | ret = pm_runtime_get_sync(dev); |
| 787 | if (ret < 0) { |
| 788 | dev_err(dev, |
| 789 | "Couldn't power on panel to ID it; using conservative timings: %d\n" , |
| 790 | ret); |
| 791 | panel_edp_set_conservative_timings(panel, desc); |
| 792 | goto exit; |
| 793 | } |
| 794 | |
| 795 | base_block = drm_edid_read_base_block(adapter: panel->ddc); |
| 796 | if (base_block) { |
| 797 | panel_id = drm_edid_get_panel_id(drm_edid: base_block); |
| 798 | } else { |
| 799 | dev_err(dev, "Couldn't read EDID for ID; using conservative timings\n" ); |
| 800 | panel_edp_set_conservative_timings(panel, desc); |
| 801 | goto exit; |
| 802 | } |
| 803 | drm_edid_decode_panel_id(panel_id, vend, product_id: &product_id); |
| 804 | |
| 805 | panel->detected_panel = find_edp_panel(panel_id, edid: base_block); |
| 806 | |
| 807 | drm_edid_free(drm_edid: base_block); |
| 808 | |
| 809 | /* |
| 810 | * We're using non-optimized timings and want it really obvious that |
| 811 | * someone needs to add an entry to the table, so we'll do a WARN_ON |
| 812 | * splat. |
| 813 | */ |
| 814 | if (WARN_ON(!panel->detected_panel)) { |
| 815 | dev_warn(dev, |
| 816 | "Unknown panel %s %#06x, using conservative timings\n" , |
| 817 | vend, product_id); |
| 818 | panel_edp_set_conservative_timings(panel, desc); |
| 819 | } else { |
| 820 | dev_info(dev, "Detected %s %s (%#06x)\n" , |
| 821 | vend, panel->detected_panel->ident.name, product_id); |
| 822 | |
| 823 | /* Update the delay; everything else comes from EDID */ |
| 824 | desc->delay = *panel->detected_panel->delay; |
| 825 | } |
| 826 | |
| 827 | exit: |
| 828 | pm_runtime_mark_last_busy(dev); |
| 829 | pm_runtime_put_autosuspend(dev); |
| 830 | |
| 831 | return 0; |
| 832 | } |
| 833 | |
| 834 | static int panel_edp_probe(struct device *dev, const struct panel_desc *desc, |
| 835 | struct drm_dp_aux *aux) |
| 836 | { |
| 837 | struct panel_edp *panel; |
| 838 | struct display_timing dt; |
| 839 | struct device_node *ddc; |
| 840 | int err; |
| 841 | |
| 842 | panel = devm_drm_panel_alloc(dev, struct panel_edp, base, |
| 843 | &panel_edp_funcs, DRM_MODE_CONNECTOR_eDP); |
| 844 | if (IS_ERR(ptr: panel)) |
| 845 | return PTR_ERR(ptr: panel); |
| 846 | |
| 847 | panel->prepared_time = 0; |
| 848 | panel->desc = desc; |
| 849 | panel->aux = aux; |
| 850 | |
| 851 | panel->no_hpd = of_property_read_bool(np: dev->of_node, propname: "no-hpd" ); |
| 852 | if (!panel->no_hpd) { |
| 853 | err = panel_edp_get_hpd_gpio(dev, p: panel); |
| 854 | if (err) |
| 855 | return err; |
| 856 | } |
| 857 | |
| 858 | panel->supply = devm_regulator_get(dev, id: "power" ); |
| 859 | if (IS_ERR(ptr: panel->supply)) |
| 860 | return PTR_ERR(ptr: panel->supply); |
| 861 | |
| 862 | panel->enable_gpio = devm_gpiod_get_optional(dev, con_id: "enable" , |
| 863 | flags: GPIOD_OUT_LOW); |
| 864 | if (IS_ERR(ptr: panel->enable_gpio)) |
| 865 | return dev_err_probe(dev, err: PTR_ERR(ptr: panel->enable_gpio), |
| 866 | fmt: "failed to request GPIO\n" ); |
| 867 | |
| 868 | err = of_drm_get_panel_orientation(np: dev->of_node, orientation: &panel->orientation); |
| 869 | if (err) { |
| 870 | dev_err(dev, "%pOF: failed to get orientation %d\n" , dev->of_node, err); |
| 871 | return err; |
| 872 | } |
| 873 | |
| 874 | ddc = of_parse_phandle(np: dev->of_node, phandle_name: "ddc-i2c-bus" , index: 0); |
| 875 | if (ddc) { |
| 876 | panel->ddc = of_find_i2c_adapter_by_node(node: ddc); |
| 877 | of_node_put(node: ddc); |
| 878 | |
| 879 | if (!panel->ddc) |
| 880 | return -EPROBE_DEFER; |
| 881 | } else if (aux) { |
| 882 | panel->ddc = &aux->ddc; |
| 883 | } |
| 884 | |
| 885 | if (!of_get_display_timing(np: dev->of_node, name: "panel-timing" , dt: &dt)) |
| 886 | panel_edp_parse_panel_timing_node(dev, panel, ot: &dt); |
| 887 | |
| 888 | dev_set_drvdata(dev, data: panel); |
| 889 | |
| 890 | err = drm_panel_of_backlight(panel: &panel->base); |
| 891 | if (err) |
| 892 | goto err_finished_ddc_init; |
| 893 | |
| 894 | /* |
| 895 | * We use runtime PM for prepare / unprepare since those power the panel |
| 896 | * on and off and those can be very slow operations. This is important |
| 897 | * to optimize powering the panel on briefly to read the EDID before |
| 898 | * fully enabling the panel. |
| 899 | */ |
| 900 | pm_runtime_enable(dev); |
| 901 | pm_runtime_set_autosuspend_delay(dev, delay: 1000); |
| 902 | pm_runtime_use_autosuspend(dev); |
| 903 | |
| 904 | if (of_device_is_compatible(device: dev->of_node, "edp-panel" )) { |
| 905 | err = generic_edp_panel_probe(dev, panel); |
| 906 | if (err) { |
| 907 | dev_err_probe(dev, err, |
| 908 | fmt: "Couldn't detect panel nor find a fallback\n" ); |
| 909 | goto err_finished_pm_runtime; |
| 910 | } |
| 911 | /* generic_edp_panel_probe() replaces desc in the panel */ |
| 912 | desc = panel->desc; |
| 913 | } else if (desc->bpc != 6 && desc->bpc != 8 && desc->bpc != 10) { |
| 914 | dev_warn(dev, "Expected bpc in {6,8,10} but got: %u\n" , desc->bpc); |
| 915 | } |
| 916 | |
| 917 | if (!panel->base.backlight && panel->aux) { |
| 918 | pm_runtime_get_sync(dev); |
| 919 | err = drm_panel_dp_aux_backlight(panel: &panel->base, aux: panel->aux); |
| 920 | pm_runtime_mark_last_busy(dev); |
| 921 | pm_runtime_put_autosuspend(dev); |
| 922 | |
| 923 | /* |
| 924 | * Warn if we get an error, but don't consider it fatal. Having |
| 925 | * a panel where we can't control the backlight is better than |
| 926 | * no panel. |
| 927 | */ |
| 928 | if (err) |
| 929 | dev_warn(dev, "failed to register dp aux backlight: %d\n" , err); |
| 930 | } |
| 931 | |
| 932 | drm_panel_add(panel: &panel->base); |
| 933 | |
| 934 | return 0; |
| 935 | |
| 936 | err_finished_pm_runtime: |
| 937 | pm_runtime_dont_use_autosuspend(dev); |
| 938 | pm_runtime_disable(dev); |
| 939 | err_finished_ddc_init: |
| 940 | if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc)) |
| 941 | put_device(dev: &panel->ddc->dev); |
| 942 | |
| 943 | return err; |
| 944 | } |
| 945 | |
| 946 | static void panel_edp_shutdown(struct device *dev) |
| 947 | { |
| 948 | struct panel_edp *panel = dev_get_drvdata(dev); |
| 949 | |
| 950 | /* |
| 951 | * NOTE: the following two calls don't really belong here. It is the |
| 952 | * responsibility of a correctly written DRM modeset driver to call |
| 953 | * drm_atomic_helper_shutdown() at shutdown time and that should |
| 954 | * cause the panel to be disabled / unprepared if needed. For now, |
| 955 | * however, we'll keep these calls due to the sheer number of |
| 956 | * different DRM modeset drivers used with panel-edp. Once we've |
| 957 | * confirmed that all DRM modeset drivers using this panel properly |
| 958 | * call drm_atomic_helper_shutdown() we can simply delete the two |
| 959 | * calls below. |
| 960 | * |
| 961 | * TO BE EXPLICIT: THE CALLS BELOW SHOULDN'T BE COPIED TO ANY NEW |
| 962 | * PANEL DRIVERS. |
| 963 | * |
| 964 | * FIXME: If we're still haven't figured out if all DRM modeset |
| 965 | * drivers properly call drm_atomic_helper_shutdown() but we _have_ |
| 966 | * managed to make sure that DRM modeset drivers get their shutdown() |
| 967 | * callback before the panel's shutdown() callback (perhaps using |
| 968 | * device link), we could add a WARN_ON here to help move forward. |
| 969 | */ |
| 970 | if (panel->base.enabled) |
| 971 | drm_panel_disable(panel: &panel->base); |
| 972 | if (panel->base.prepared) |
| 973 | drm_panel_unprepare(panel: &panel->base); |
| 974 | } |
| 975 | |
| 976 | static void panel_edp_remove(struct device *dev) |
| 977 | { |
| 978 | struct panel_edp *panel = dev_get_drvdata(dev); |
| 979 | |
| 980 | drm_panel_remove(panel: &panel->base); |
| 981 | panel_edp_shutdown(dev); |
| 982 | |
| 983 | pm_runtime_dont_use_autosuspend(dev); |
| 984 | pm_runtime_disable(dev); |
| 985 | if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc)) |
| 986 | put_device(dev: &panel->ddc->dev); |
| 987 | |
| 988 | drm_edid_free(drm_edid: panel->drm_edid); |
| 989 | panel->drm_edid = NULL; |
| 990 | } |
| 991 | |
| 992 | static const struct display_timing auo_b101ean01_timing = { |
| 993 | .pixelclock = { 65300000, 72500000, 75000000 }, |
| 994 | .hactive = { 1280, 1280, 1280 }, |
| 995 | .hfront_porch = { 18, 119, 119 }, |
| 996 | .hback_porch = { 21, 21, 21 }, |
| 997 | .hsync_len = { 32, 32, 32 }, |
| 998 | .vactive = { 800, 800, 800 }, |
| 999 | .vfront_porch = { 4, 4, 4 }, |
| 1000 | .vback_porch = { 8, 8, 8 }, |
| 1001 | .vsync_len = { 18, 20, 20 }, |
| 1002 | }; |
| 1003 | |
| 1004 | static const struct panel_desc auo_b101ean01 = { |
| 1005 | .timings = &auo_b101ean01_timing, |
| 1006 | .num_timings = 1, |
| 1007 | .bpc = 6, |
| 1008 | .size = { |
| 1009 | .width = 217, |
| 1010 | .height = 136, |
| 1011 | }, |
| 1012 | }; |
| 1013 | |
| 1014 | static const struct drm_display_mode auo_b116xa3_mode = { |
| 1015 | .clock = 70589, |
| 1016 | .hdisplay = 1366, |
| 1017 | .hsync_start = 1366 + 40, |
| 1018 | .hsync_end = 1366 + 40 + 40, |
| 1019 | .htotal = 1366 + 40 + 40 + 32, |
| 1020 | .vdisplay = 768, |
| 1021 | .vsync_start = 768 + 10, |
| 1022 | .vsync_end = 768 + 10 + 12, |
| 1023 | .vtotal = 768 + 10 + 12 + 6, |
| 1024 | .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, |
| 1025 | }; |
| 1026 | |
| 1027 | static const struct drm_display_mode auo_b116xak01_mode = { |
| 1028 | .clock = 69300, |
| 1029 | .hdisplay = 1366, |
| 1030 | .hsync_start = 1366 + 48, |
| 1031 | .hsync_end = 1366 + 48 + 32, |
| 1032 | .htotal = 1366 + 48 + 32 + 10, |
| 1033 | .vdisplay = 768, |
| 1034 | .vsync_start = 768 + 4, |
| 1035 | .vsync_end = 768 + 4 + 6, |
| 1036 | .vtotal = 768 + 4 + 6 + 15, |
| 1037 | .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, |
| 1038 | }; |
| 1039 | |
| 1040 | static const struct panel_desc auo_b116xak01 = { |
| 1041 | .modes = &auo_b116xak01_mode, |
| 1042 | .num_modes = 1, |
| 1043 | .bpc = 6, |
| 1044 | .size = { |
| 1045 | .width = 256, |
| 1046 | .height = 144, |
| 1047 | }, |
| 1048 | .delay = { |
| 1049 | .hpd_absent = 200, |
| 1050 | .unprepare = 500, |
| 1051 | .enable = 50, |
| 1052 | }, |
| 1053 | }; |
| 1054 | |
| 1055 | static const struct drm_display_mode auo_b133htn01_mode = { |
| 1056 | .clock = 150660, |
| 1057 | .hdisplay = 1920, |
| 1058 | .hsync_start = 1920 + 172, |
| 1059 | .hsync_end = 1920 + 172 + 80, |
| 1060 | .htotal = 1920 + 172 + 80 + 60, |
| 1061 | .vdisplay = 1080, |
| 1062 | .vsync_start = 1080 + 25, |
| 1063 | .vsync_end = 1080 + 25 + 10, |
| 1064 | .vtotal = 1080 + 25 + 10 + 10, |
| 1065 | }; |
| 1066 | |
| 1067 | static const struct panel_desc auo_b133htn01 = { |
| 1068 | .modes = &auo_b133htn01_mode, |
| 1069 | .num_modes = 1, |
| 1070 | .bpc = 6, |
| 1071 | .size = { |
| 1072 | .width = 293, |
| 1073 | .height = 165, |
| 1074 | }, |
| 1075 | .delay = { |
| 1076 | .hpd_reliable = 105, |
| 1077 | .enable = 20, |
| 1078 | .unprepare = 50, |
| 1079 | }, |
| 1080 | }; |
| 1081 | |
| 1082 | static const struct drm_display_mode auo_b133xtn01_mode = { |
| 1083 | .clock = 69500, |
| 1084 | .hdisplay = 1366, |
| 1085 | .hsync_start = 1366 + 48, |
| 1086 | .hsync_end = 1366 + 48 + 32, |
| 1087 | .htotal = 1366 + 48 + 32 + 20, |
| 1088 | .vdisplay = 768, |
| 1089 | .vsync_start = 768 + 3, |
| 1090 | .vsync_end = 768 + 3 + 6, |
| 1091 | .vtotal = 768 + 3 + 6 + 13, |
| 1092 | }; |
| 1093 | |
| 1094 | static const struct panel_desc auo_b133xtn01 = { |
| 1095 | .modes = &auo_b133xtn01_mode, |
| 1096 | .num_modes = 1, |
| 1097 | .bpc = 6, |
| 1098 | .size = { |
| 1099 | .width = 293, |
| 1100 | .height = 165, |
| 1101 | }, |
| 1102 | }; |
| 1103 | |
| 1104 | static const struct drm_display_mode boe_nv101wxmn51_modes[] = { |
| 1105 | { |
| 1106 | .clock = 71900, |
| 1107 | .hdisplay = 1280, |
| 1108 | .hsync_start = 1280 + 48, |
| 1109 | .hsync_end = 1280 + 48 + 32, |
| 1110 | .htotal = 1280 + 48 + 32 + 80, |
| 1111 | .vdisplay = 800, |
| 1112 | .vsync_start = 800 + 3, |
| 1113 | .vsync_end = 800 + 3 + 5, |
| 1114 | .vtotal = 800 + 3 + 5 + 24, |
| 1115 | }, |
| 1116 | { |
| 1117 | .clock = 57500, |
| 1118 | .hdisplay = 1280, |
| 1119 | .hsync_start = 1280 + 48, |
| 1120 | .hsync_end = 1280 + 48 + 32, |
| 1121 | .htotal = 1280 + 48 + 32 + 80, |
| 1122 | .vdisplay = 800, |
| 1123 | .vsync_start = 800 + 3, |
| 1124 | .vsync_end = 800 + 3 + 5, |
| 1125 | .vtotal = 800 + 3 + 5 + 24, |
| 1126 | }, |
| 1127 | }; |
| 1128 | |
| 1129 | static const struct panel_desc boe_nv101wxmn51 = { |
| 1130 | .modes = boe_nv101wxmn51_modes, |
| 1131 | .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes), |
| 1132 | .bpc = 8, |
| 1133 | .size = { |
| 1134 | .width = 217, |
| 1135 | .height = 136, |
| 1136 | }, |
| 1137 | .delay = { |
| 1138 | /* TODO: should be hpd-absent and no-hpd should be set? */ |
| 1139 | .hpd_reliable = 210, |
| 1140 | .enable = 50, |
| 1141 | .unprepare = 160, |
| 1142 | }, |
| 1143 | }; |
| 1144 | |
| 1145 | static const struct drm_display_mode boe_nv110wtm_n61_modes[] = { |
| 1146 | { |
| 1147 | .clock = 207800, |
| 1148 | .hdisplay = 2160, |
| 1149 | .hsync_start = 2160 + 48, |
| 1150 | .hsync_end = 2160 + 48 + 32, |
| 1151 | .htotal = 2160 + 48 + 32 + 100, |
| 1152 | .vdisplay = 1440, |
| 1153 | .vsync_start = 1440 + 3, |
| 1154 | .vsync_end = 1440 + 3 + 6, |
| 1155 | .vtotal = 1440 + 3 + 6 + 31, |
| 1156 | .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, |
| 1157 | }, |
| 1158 | { |
| 1159 | .clock = 138500, |
| 1160 | .hdisplay = 2160, |
| 1161 | .hsync_start = 2160 + 48, |
| 1162 | .hsync_end = 2160 + 48 + 32, |
| 1163 | .htotal = 2160 + 48 + 32 + 100, |
| 1164 | .vdisplay = 1440, |
| 1165 | .vsync_start = 1440 + 3, |
| 1166 | .vsync_end = 1440 + 3 + 6, |
| 1167 | .vtotal = 1440 + 3 + 6 + 31, |
| 1168 | .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, |
| 1169 | }, |
| 1170 | }; |
| 1171 | |
| 1172 | static const struct panel_desc boe_nv110wtm_n61 = { |
| 1173 | .modes = boe_nv110wtm_n61_modes, |
| 1174 | .num_modes = ARRAY_SIZE(boe_nv110wtm_n61_modes), |
| 1175 | .bpc = 8, |
| 1176 | .size = { |
| 1177 | .width = 233, |
| 1178 | .height = 155, |
| 1179 | }, |
| 1180 | .delay = { |
| 1181 | .hpd_absent = 200, |
| 1182 | .prepare_to_enable = 80, |
| 1183 | .enable = 50, |
| 1184 | .unprepare = 500, |
| 1185 | }, |
| 1186 | }; |
| 1187 | |
| 1188 | /* Also used for boe_nv133fhm_n62 */ |
| 1189 | static const struct drm_display_mode boe_nv133fhm_n61_modes = { |
| 1190 | .clock = 147840, |
| 1191 | .hdisplay = 1920, |
| 1192 | .hsync_start = 1920 + 48, |
| 1193 | .hsync_end = 1920 + 48 + 32, |
| 1194 | .htotal = 1920 + 48 + 32 + 200, |
| 1195 | .vdisplay = 1080, |
| 1196 | .vsync_start = 1080 + 3, |
| 1197 | .vsync_end = 1080 + 3 + 6, |
| 1198 | .vtotal = 1080 + 3 + 6 + 31, |
| 1199 | .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, |
| 1200 | }; |
| 1201 | |
| 1202 | /* Also used for boe_nv133fhm_n62 */ |
| 1203 | static const struct panel_desc boe_nv133fhm_n61 = { |
| 1204 | .modes = &boe_nv133fhm_n61_modes, |
| 1205 | .num_modes = 1, |
| 1206 | .bpc = 6, |
| 1207 | .size = { |
| 1208 | .width = 294, |
| 1209 | .height = 165, |
| 1210 | }, |
| 1211 | .delay = { |
| 1212 | /* |
| 1213 | * When power is first given to the panel there's a short |
| 1214 | * spike on the HPD line. It was explained that this spike |
| 1215 | * was until the TCON data download was complete. On |
| 1216 | * one system this was measured at 8 ms. We'll put 15 ms |
| 1217 | * in the prepare delay just to be safe. That means: |
| 1218 | * - If HPD isn't hooked up you still have 200 ms delay. |
| 1219 | * - If HPD is hooked up we won't try to look at it for the |
| 1220 | * first 15 ms. |
| 1221 | */ |
| 1222 | .hpd_reliable = 15, |
| 1223 | .hpd_absent = 200, |
| 1224 | |
| 1225 | .unprepare = 500, |
| 1226 | }, |
| 1227 | }; |
| 1228 | |
| 1229 | static const struct drm_display_mode boe_nv140fhmn49_modes[] = { |
| 1230 | { |
| 1231 | .clock = 148500, |
| 1232 | .hdisplay = 1920, |
| 1233 | .hsync_start = 1920 + 48, |
| 1234 | .hsync_end = 1920 + 48 + 32, |
| 1235 | .htotal = 2200, |
| 1236 | .vdisplay = 1080, |
| 1237 | .vsync_start = 1080 + 3, |
| 1238 | .vsync_end = 1080 + 3 + 5, |
| 1239 | .vtotal = 1125, |
| 1240 | }, |
| 1241 | }; |
| 1242 | |
| 1243 | static const struct panel_desc boe_nv140fhmn49 = { |
| 1244 | .modes = boe_nv140fhmn49_modes, |
| 1245 | .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes), |
| 1246 | .bpc = 6, |
| 1247 | .size = { |
| 1248 | .width = 309, |
| 1249 | .height = 174, |
| 1250 | }, |
| 1251 | .delay = { |
| 1252 | /* TODO: should be hpd-absent and no-hpd should be set? */ |
| 1253 | .hpd_reliable = 210, |
| 1254 | .enable = 50, |
| 1255 | .unprepare = 160, |
| 1256 | }, |
| 1257 | }; |
| 1258 | |
| 1259 | static const struct drm_display_mode innolux_n116bca_ea1_mode = { |
| 1260 | .clock = 76420, |
| 1261 | .hdisplay = 1366, |
| 1262 | .hsync_start = 1366 + 136, |
| 1263 | .hsync_end = 1366 + 136 + 30, |
| 1264 | .htotal = 1366 + 136 + 30 + 60, |
| 1265 | .vdisplay = 768, |
| 1266 | .vsync_start = 768 + 8, |
| 1267 | .vsync_end = 768 + 8 + 12, |
| 1268 | .vtotal = 768 + 8 + 12 + 12, |
| 1269 | .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, |
| 1270 | }; |
| 1271 | |
| 1272 | static const struct panel_desc innolux_n116bca_ea1 = { |
| 1273 | .modes = &innolux_n116bca_ea1_mode, |
| 1274 | .num_modes = 1, |
| 1275 | .bpc = 6, |
| 1276 | .size = { |
| 1277 | .width = 256, |
| 1278 | .height = 144, |
| 1279 | }, |
| 1280 | .delay = { |
| 1281 | .hpd_absent = 200, |
| 1282 | .enable = 80, |
| 1283 | .disable = 50, |
| 1284 | .unprepare = 500, |
| 1285 | }, |
| 1286 | }; |
| 1287 | |
| 1288 | /* |
| 1289 | * Datasheet specifies that at 60 Hz refresh rate: |
| 1290 | * - total horizontal time: { 1506, 1592, 1716 } |
| 1291 | * - total vertical time: { 788, 800, 868 } |
| 1292 | * |
| 1293 | * ...but doesn't go into exactly how that should be split into a front |
| 1294 | * porch, back porch, or sync length. For now we'll leave a single setting |
| 1295 | * here which allows a bit of tweaking of the pixel clock at the expense of |
| 1296 | * refresh rate. |
| 1297 | */ |
| 1298 | static const struct display_timing innolux_n116bge_timing = { |
| 1299 | .pixelclock = { 72600000, 76420000, 80240000 }, |
| 1300 | .hactive = { 1366, 1366, 1366 }, |
| 1301 | .hfront_porch = { 136, 136, 136 }, |
| 1302 | .hback_porch = { 60, 60, 60 }, |
| 1303 | .hsync_len = { 30, 30, 30 }, |
| 1304 | .vactive = { 768, 768, 768 }, |
| 1305 | .vfront_porch = { 8, 8, 8 }, |
| 1306 | .vback_porch = { 12, 12, 12 }, |
| 1307 | .vsync_len = { 12, 12, 12 }, |
| 1308 | .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, |
| 1309 | }; |
| 1310 | |
| 1311 | static const struct panel_desc innolux_n116bge = { |
| 1312 | .timings = &innolux_n116bge_timing, |
| 1313 | .num_timings = 1, |
| 1314 | .bpc = 6, |
| 1315 | .size = { |
| 1316 | .width = 256, |
| 1317 | .height = 144, |
| 1318 | }, |
| 1319 | }; |
| 1320 | |
| 1321 | static const struct drm_display_mode innolux_n125hce_gn1_mode = { |
| 1322 | .clock = 162000, |
| 1323 | .hdisplay = 1920, |
| 1324 | .hsync_start = 1920 + 40, |
| 1325 | .hsync_end = 1920 + 40 + 40, |
| 1326 | .htotal = 1920 + 40 + 40 + 80, |
| 1327 | .vdisplay = 1080, |
| 1328 | .vsync_start = 1080 + 4, |
| 1329 | .vsync_end = 1080 + 4 + 4, |
| 1330 | .vtotal = 1080 + 4 + 4 + 24, |
| 1331 | }; |
| 1332 | |
| 1333 | static const struct panel_desc innolux_n125hce_gn1 = { |
| 1334 | .modes = &innolux_n125hce_gn1_mode, |
| 1335 | .num_modes = 1, |
| 1336 | .bpc = 8, |
| 1337 | .size = { |
| 1338 | .width = 276, |
| 1339 | .height = 155, |
| 1340 | }, |
| 1341 | }; |
| 1342 | |
| 1343 | static const struct drm_display_mode innolux_p120zdg_bf1_mode = { |
| 1344 | .clock = 206016, |
| 1345 | .hdisplay = 2160, |
| 1346 | .hsync_start = 2160 + 48, |
| 1347 | .hsync_end = 2160 + 48 + 32, |
| 1348 | .htotal = 2160 + 48 + 32 + 80, |
| 1349 | .vdisplay = 1440, |
| 1350 | .vsync_start = 1440 + 3, |
| 1351 | .vsync_end = 1440 + 3 + 10, |
| 1352 | .vtotal = 1440 + 3 + 10 + 27, |
| 1353 | .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, |
| 1354 | }; |
| 1355 | |
| 1356 | static const struct panel_desc innolux_p120zdg_bf1 = { |
| 1357 | .modes = &innolux_p120zdg_bf1_mode, |
| 1358 | .num_modes = 1, |
| 1359 | .bpc = 8, |
| 1360 | .size = { |
| 1361 | .width = 254, |
| 1362 | .height = 169, |
| 1363 | }, |
| 1364 | .delay = { |
| 1365 | .hpd_absent = 200, |
| 1366 | .unprepare = 500, |
| 1367 | }, |
| 1368 | }; |
| 1369 | |
| 1370 | static const struct drm_display_mode kingdisplay_kd116n21_30nv_a010_mode = { |
| 1371 | .clock = 81000, |
| 1372 | .hdisplay = 1366, |
| 1373 | .hsync_start = 1366 + 40, |
| 1374 | .hsync_end = 1366 + 40 + 32, |
| 1375 | .htotal = 1366 + 40 + 32 + 62, |
| 1376 | .vdisplay = 768, |
| 1377 | .vsync_start = 768 + 5, |
| 1378 | .vsync_end = 768 + 5 + 5, |
| 1379 | .vtotal = 768 + 5 + 5 + 122, |
| 1380 | .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, |
| 1381 | }; |
| 1382 | |
| 1383 | static const struct panel_desc kingdisplay_kd116n21_30nv_a010 = { |
| 1384 | .modes = &kingdisplay_kd116n21_30nv_a010_mode, |
| 1385 | .num_modes = 1, |
| 1386 | .bpc = 6, |
| 1387 | .size = { |
| 1388 | .width = 256, |
| 1389 | .height = 144, |
| 1390 | }, |
| 1391 | .delay = { |
| 1392 | .hpd_absent = 200, |
| 1393 | }, |
| 1394 | }; |
| 1395 | |
| 1396 | static const struct drm_display_mode lg_lp079qx1_sp0v_mode = { |
| 1397 | .clock = 200000, |
| 1398 | .hdisplay = 1536, |
| 1399 | .hsync_start = 1536 + 12, |
| 1400 | .hsync_end = 1536 + 12 + 16, |
| 1401 | .htotal = 1536 + 12 + 16 + 48, |
| 1402 | .vdisplay = 2048, |
| 1403 | .vsync_start = 2048 + 8, |
| 1404 | .vsync_end = 2048 + 8 + 4, |
| 1405 | .vtotal = 2048 + 8 + 4 + 8, |
| 1406 | .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, |
| 1407 | }; |
| 1408 | |
| 1409 | static const struct panel_desc lg_lp079qx1_sp0v = { |
| 1410 | .modes = &lg_lp079qx1_sp0v_mode, |
| 1411 | .num_modes = 1, |
| 1412 | .size = { |
| 1413 | .width = 129, |
| 1414 | .height = 171, |
| 1415 | }, |
| 1416 | }; |
| 1417 | |
| 1418 | static const struct drm_display_mode lg_lp097qx1_spa1_mode = { |
| 1419 | .clock = 205210, |
| 1420 | .hdisplay = 2048, |
| 1421 | .hsync_start = 2048 + 150, |
| 1422 | .hsync_end = 2048 + 150 + 5, |
| 1423 | .htotal = 2048 + 150 + 5 + 5, |
| 1424 | .vdisplay = 1536, |
| 1425 | .vsync_start = 1536 + 3, |
| 1426 | .vsync_end = 1536 + 3 + 1, |
| 1427 | .vtotal = 1536 + 3 + 1 + 9, |
| 1428 | }; |
| 1429 | |
| 1430 | static const struct panel_desc lg_lp097qx1_spa1 = { |
| 1431 | .modes = &lg_lp097qx1_spa1_mode, |
| 1432 | .num_modes = 1, |
| 1433 | .size = { |
| 1434 | .width = 208, |
| 1435 | .height = 147, |
| 1436 | }, |
| 1437 | }; |
| 1438 | |
| 1439 | static const struct drm_display_mode lg_lp120up1_mode = { |
| 1440 | .clock = 162300, |
| 1441 | .hdisplay = 1920, |
| 1442 | .hsync_start = 1920 + 40, |
| 1443 | .hsync_end = 1920 + 40 + 40, |
| 1444 | .htotal = 1920 + 40 + 40 + 80, |
| 1445 | .vdisplay = 1280, |
| 1446 | .vsync_start = 1280 + 4, |
| 1447 | .vsync_end = 1280 + 4 + 4, |
| 1448 | .vtotal = 1280 + 4 + 4 + 12, |
| 1449 | }; |
| 1450 | |
| 1451 | static const struct panel_desc lg_lp120up1 = { |
| 1452 | .modes = &lg_lp120up1_mode, |
| 1453 | .num_modes = 1, |
| 1454 | .bpc = 8, |
| 1455 | .size = { |
| 1456 | .width = 267, |
| 1457 | .height = 183, |
| 1458 | }, |
| 1459 | }; |
| 1460 | |
| 1461 | static const struct drm_display_mode lg_lp129qe_mode = { |
| 1462 | .clock = 285250, |
| 1463 | .hdisplay = 2560, |
| 1464 | .hsync_start = 2560 + 48, |
| 1465 | .hsync_end = 2560 + 48 + 32, |
| 1466 | .htotal = 2560 + 48 + 32 + 80, |
| 1467 | .vdisplay = 1700, |
| 1468 | .vsync_start = 1700 + 3, |
| 1469 | .vsync_end = 1700 + 3 + 10, |
| 1470 | .vtotal = 1700 + 3 + 10 + 36, |
| 1471 | }; |
| 1472 | |
| 1473 | static const struct panel_desc lg_lp129qe = { |
| 1474 | .modes = &lg_lp129qe_mode, |
| 1475 | .num_modes = 1, |
| 1476 | .bpc = 8, |
| 1477 | .size = { |
| 1478 | .width = 272, |
| 1479 | .height = 181, |
| 1480 | }, |
| 1481 | }; |
| 1482 | |
| 1483 | static const struct drm_display_mode neweast_wjfh116008a_modes[] = { |
| 1484 | { |
| 1485 | .clock = 138500, |
| 1486 | .hdisplay = 1920, |
| 1487 | .hsync_start = 1920 + 48, |
| 1488 | .hsync_end = 1920 + 48 + 32, |
| 1489 | .htotal = 1920 + 48 + 32 + 80, |
| 1490 | .vdisplay = 1080, |
| 1491 | .vsync_start = 1080 + 3, |
| 1492 | .vsync_end = 1080 + 3 + 5, |
| 1493 | .vtotal = 1080 + 3 + 5 + 23, |
| 1494 | .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, |
| 1495 | }, { |
| 1496 | .clock = 110920, |
| 1497 | .hdisplay = 1920, |
| 1498 | .hsync_start = 1920 + 48, |
| 1499 | .hsync_end = 1920 + 48 + 32, |
| 1500 | .htotal = 1920 + 48 + 32 + 80, |
| 1501 | .vdisplay = 1080, |
| 1502 | .vsync_start = 1080 + 3, |
| 1503 | .vsync_end = 1080 + 3 + 5, |
| 1504 | .vtotal = 1080 + 3 + 5 + 23, |
| 1505 | .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, |
| 1506 | } |
| 1507 | }; |
| 1508 | |
| 1509 | static const struct panel_desc neweast_wjfh116008a = { |
| 1510 | .modes = neweast_wjfh116008a_modes, |
| 1511 | .num_modes = 2, |
| 1512 | .bpc = 6, |
| 1513 | .size = { |
| 1514 | .width = 260, |
| 1515 | .height = 150, |
| 1516 | }, |
| 1517 | .delay = { |
| 1518 | .hpd_reliable = 110, |
| 1519 | .enable = 20, |
| 1520 | .unprepare = 500, |
| 1521 | }, |
| 1522 | }; |
| 1523 | |
| 1524 | static const struct drm_display_mode samsung_lsn122dl01_c01_mode = { |
| 1525 | .clock = 271560, |
| 1526 | .hdisplay = 2560, |
| 1527 | .hsync_start = 2560 + 48, |
| 1528 | .hsync_end = 2560 + 48 + 32, |
| 1529 | .htotal = 2560 + 48 + 32 + 80, |
| 1530 | .vdisplay = 1600, |
| 1531 | .vsync_start = 1600 + 2, |
| 1532 | .vsync_end = 1600 + 2 + 5, |
| 1533 | .vtotal = 1600 + 2 + 5 + 57, |
| 1534 | }; |
| 1535 | |
| 1536 | static const struct panel_desc samsung_lsn122dl01_c01 = { |
| 1537 | .modes = &samsung_lsn122dl01_c01_mode, |
| 1538 | .num_modes = 1, |
| 1539 | .size = { |
| 1540 | .width = 263, |
| 1541 | .height = 164, |
| 1542 | }, |
| 1543 | }; |
| 1544 | |
| 1545 | static const struct drm_display_mode samsung_ltn140at29_301_mode = { |
| 1546 | .clock = 76300, |
| 1547 | .hdisplay = 1366, |
| 1548 | .hsync_start = 1366 + 64, |
| 1549 | .hsync_end = 1366 + 64 + 48, |
| 1550 | .htotal = 1366 + 64 + 48 + 128, |
| 1551 | .vdisplay = 768, |
| 1552 | .vsync_start = 768 + 2, |
| 1553 | .vsync_end = 768 + 2 + 5, |
| 1554 | .vtotal = 768 + 2 + 5 + 17, |
| 1555 | }; |
| 1556 | |
| 1557 | static const struct panel_desc samsung_ltn140at29_301 = { |
| 1558 | .modes = &samsung_ltn140at29_301_mode, |
| 1559 | .num_modes = 1, |
| 1560 | .bpc = 6, |
| 1561 | .size = { |
| 1562 | .width = 320, |
| 1563 | .height = 187, |
| 1564 | }, |
| 1565 | }; |
| 1566 | |
| 1567 | static const struct drm_display_mode sharp_ld_d5116z01b_mode = { |
| 1568 | .clock = 168480, |
| 1569 | .hdisplay = 1920, |
| 1570 | .hsync_start = 1920 + 48, |
| 1571 | .hsync_end = 1920 + 48 + 32, |
| 1572 | .htotal = 1920 + 48 + 32 + 80, |
| 1573 | .vdisplay = 1280, |
| 1574 | .vsync_start = 1280 + 3, |
| 1575 | .vsync_end = 1280 + 3 + 10, |
| 1576 | .vtotal = 1280 + 3 + 10 + 57, |
| 1577 | .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, |
| 1578 | }; |
| 1579 | |
| 1580 | static const struct panel_desc sharp_ld_d5116z01b = { |
| 1581 | .modes = &sharp_ld_d5116z01b_mode, |
| 1582 | .num_modes = 1, |
| 1583 | .bpc = 8, |
| 1584 | .size = { |
| 1585 | .width = 260, |
| 1586 | .height = 120, |
| 1587 | }, |
| 1588 | }; |
| 1589 | |
| 1590 | static const struct display_timing sharp_lq123p1jx31_timing = { |
| 1591 | .pixelclock = { 252750000, 252750000, 266604720 }, |
| 1592 | .hactive = { 2400, 2400, 2400 }, |
| 1593 | .hfront_porch = { 48, 48, 48 }, |
| 1594 | .hback_porch = { 80, 80, 84 }, |
| 1595 | .hsync_len = { 32, 32, 32 }, |
| 1596 | .vactive = { 1600, 1600, 1600 }, |
| 1597 | .vfront_porch = { 3, 3, 3 }, |
| 1598 | .vback_porch = { 33, 33, 120 }, |
| 1599 | .vsync_len = { 10, 10, 10 }, |
| 1600 | .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, |
| 1601 | }; |
| 1602 | |
| 1603 | static const struct panel_desc sharp_lq123p1jx31 = { |
| 1604 | .timings = &sharp_lq123p1jx31_timing, |
| 1605 | .num_timings = 1, |
| 1606 | .bpc = 8, |
| 1607 | .size = { |
| 1608 | .width = 259, |
| 1609 | .height = 173, |
| 1610 | }, |
| 1611 | .delay = { |
| 1612 | .hpd_reliable = 110, |
| 1613 | .enable = 50, |
| 1614 | .unprepare = 550, |
| 1615 | }, |
| 1616 | }; |
| 1617 | |
| 1618 | static const struct of_device_id platform_of_match[] = { |
| 1619 | { |
| 1620 | /* Must be first */ |
| 1621 | .compatible = "edp-panel" , |
| 1622 | }, |
| 1623 | /* |
| 1624 | * Do not add panels to the list below unless they cannot be handled by |
| 1625 | * the generic edp-panel compatible. |
| 1626 | * |
| 1627 | * The only two valid reasons are: |
| 1628 | * - Because of the panel issues (e.g. broken EDID or broken |
| 1629 | * identification). |
| 1630 | * - Because the eDP drivers didn't wire up the AUX bus properly. |
| 1631 | * NOTE that, though this is a marginally valid reason, |
| 1632 | * some justification needs to be made for why the platform can't |
| 1633 | * wire up the AUX bus properly. |
| 1634 | * |
| 1635 | * In all other cases the platform should use the aux-bus and declare |
| 1636 | * the panel using the 'edp-panel' compatible as a device on the AUX |
| 1637 | * bus. |
| 1638 | */ |
| 1639 | { |
| 1640 | .compatible = "auo,b101ean01" , |
| 1641 | .data = &auo_b101ean01, |
| 1642 | }, { |
| 1643 | .compatible = "auo,b116xa01" , |
| 1644 | .data = &auo_b116xak01, |
| 1645 | }, { |
| 1646 | .compatible = "auo,b133htn01" , |
| 1647 | .data = &auo_b133htn01, |
| 1648 | }, { |
| 1649 | .compatible = "auo,b133xtn01" , |
| 1650 | .data = &auo_b133xtn01, |
| 1651 | }, { |
| 1652 | .compatible = "boe,nv101wxmn51" , |
| 1653 | .data = &boe_nv101wxmn51, |
| 1654 | }, { |
| 1655 | .compatible = "boe,nv110wtm-n61" , |
| 1656 | .data = &boe_nv110wtm_n61, |
| 1657 | }, { |
| 1658 | .compatible = "boe,nv133fhm-n61" , |
| 1659 | .data = &boe_nv133fhm_n61, |
| 1660 | }, { |
| 1661 | .compatible = "boe,nv133fhm-n62" , |
| 1662 | .data = &boe_nv133fhm_n61, |
| 1663 | }, { |
| 1664 | .compatible = "boe,nv140fhmn49" , |
| 1665 | .data = &boe_nv140fhmn49, |
| 1666 | }, { |
| 1667 | .compatible = "innolux,n116bca-ea1" , |
| 1668 | .data = &innolux_n116bca_ea1, |
| 1669 | }, { |
| 1670 | .compatible = "innolux,n116bge" , |
| 1671 | .data = &innolux_n116bge, |
| 1672 | }, { |
| 1673 | .compatible = "innolux,n125hce-gn1" , |
| 1674 | .data = &innolux_n125hce_gn1, |
| 1675 | }, { |
| 1676 | .compatible = "innolux,p120zdg-bf1" , |
| 1677 | .data = &innolux_p120zdg_bf1, |
| 1678 | }, { |
| 1679 | .compatible = "kingdisplay,kd116n21-30nv-a010" , |
| 1680 | .data = &kingdisplay_kd116n21_30nv_a010, |
| 1681 | }, { |
| 1682 | .compatible = "lg,lp079qx1-sp0v" , |
| 1683 | .data = &lg_lp079qx1_sp0v, |
| 1684 | }, { |
| 1685 | .compatible = "lg,lp097qx1-spa1" , |
| 1686 | .data = &lg_lp097qx1_spa1, |
| 1687 | }, { |
| 1688 | .compatible = "lg,lp120up1" , |
| 1689 | .data = &lg_lp120up1, |
| 1690 | }, { |
| 1691 | .compatible = "lg,lp129qe" , |
| 1692 | .data = &lg_lp129qe, |
| 1693 | }, { |
| 1694 | .compatible = "neweast,wjfh116008a" , |
| 1695 | .data = &neweast_wjfh116008a, |
| 1696 | }, { |
| 1697 | .compatible = "samsung,lsn122dl01-c01" , |
| 1698 | .data = &samsung_lsn122dl01_c01, |
| 1699 | }, { |
| 1700 | .compatible = "samsung,ltn140at29-301" , |
| 1701 | .data = &samsung_ltn140at29_301, |
| 1702 | }, { |
| 1703 | .compatible = "sharp,ld-d5116z01b" , |
| 1704 | .data = &sharp_ld_d5116z01b, |
| 1705 | }, { |
| 1706 | .compatible = "sharp,lq123p1jx31" , |
| 1707 | .data = &sharp_lq123p1jx31, |
| 1708 | }, { |
| 1709 | /* sentinel */ |
| 1710 | } |
| 1711 | }; |
| 1712 | MODULE_DEVICE_TABLE(of, platform_of_match); |
| 1713 | |
| 1714 | static const struct panel_delay delay_200_500_p2e80 = { |
| 1715 | .hpd_absent = 200, |
| 1716 | .unprepare = 500, |
| 1717 | .prepare_to_enable = 80, |
| 1718 | }; |
| 1719 | |
| 1720 | static const struct panel_delay delay_200_500_e50_p2e80 = { |
| 1721 | .hpd_absent = 200, |
| 1722 | .unprepare = 500, |
| 1723 | .enable = 50, |
| 1724 | .prepare_to_enable = 80, |
| 1725 | }; |
| 1726 | |
| 1727 | static const struct panel_delay delay_200_500_p2e100 = { |
| 1728 | .hpd_absent = 200, |
| 1729 | .unprepare = 500, |
| 1730 | .prepare_to_enable = 100, |
| 1731 | }; |
| 1732 | |
| 1733 | static const struct panel_delay delay_200_500_e50 = { |
| 1734 | .hpd_absent = 200, |
| 1735 | .unprepare = 500, |
| 1736 | .enable = 50, |
| 1737 | }; |
| 1738 | |
| 1739 | static const struct panel_delay delay_200_500_e50_p2e200 = { |
| 1740 | .hpd_absent = 200, |
| 1741 | .unprepare = 500, |
| 1742 | .enable = 50, |
| 1743 | .prepare_to_enable = 200, |
| 1744 | }; |
| 1745 | |
| 1746 | static const struct panel_delay delay_200_500_e80 = { |
| 1747 | .hpd_absent = 200, |
| 1748 | .unprepare = 500, |
| 1749 | .enable = 80, |
| 1750 | }; |
| 1751 | |
| 1752 | static const struct panel_delay delay_200_500_e80_d50 = { |
| 1753 | .hpd_absent = 200, |
| 1754 | .unprepare = 500, |
| 1755 | .enable = 80, |
| 1756 | .disable = 50, |
| 1757 | }; |
| 1758 | |
| 1759 | static const struct panel_delay delay_80_500_e50 = { |
| 1760 | .hpd_absent = 80, |
| 1761 | .unprepare = 500, |
| 1762 | .enable = 50, |
| 1763 | }; |
| 1764 | |
| 1765 | static const struct panel_delay delay_80_500_e80_p2e200 = { |
| 1766 | .hpd_absent = 80, |
| 1767 | .unprepare = 500, |
| 1768 | .enable = 80, |
| 1769 | .prepare_to_enable = 200, |
| 1770 | }; |
| 1771 | |
| 1772 | static const struct panel_delay delay_100_500_e200 = { |
| 1773 | .hpd_absent = 100, |
| 1774 | .unprepare = 500, |
| 1775 | .enable = 200, |
| 1776 | }; |
| 1777 | |
| 1778 | static const struct panel_delay delay_200_500_e200 = { |
| 1779 | .hpd_absent = 200, |
| 1780 | .unprepare = 500, |
| 1781 | .enable = 200, |
| 1782 | }; |
| 1783 | |
| 1784 | static const struct panel_delay delay_200_500_e200_d200 = { |
| 1785 | .hpd_absent = 200, |
| 1786 | .unprepare = 500, |
| 1787 | .enable = 200, |
| 1788 | .disable = 200, |
| 1789 | }; |
| 1790 | |
| 1791 | static const struct panel_delay delay_200_500_e200_d10 = { |
| 1792 | .hpd_absent = 200, |
| 1793 | .unprepare = 500, |
| 1794 | .enable = 200, |
| 1795 | .disable = 10, |
| 1796 | }; |
| 1797 | |
| 1798 | static const struct panel_delay delay_200_150_e200 = { |
| 1799 | .hpd_absent = 200, |
| 1800 | .unprepare = 150, |
| 1801 | .enable = 200, |
| 1802 | }; |
| 1803 | |
| 1804 | static const struct panel_delay delay_200_500_e50_po2e200 = { |
| 1805 | .hpd_absent = 200, |
| 1806 | .unprepare = 500, |
| 1807 | .enable = 50, |
| 1808 | .powered_on_to_enable = 200, |
| 1809 | }; |
| 1810 | |
| 1811 | static const struct panel_delay delay_200_150_e50 = { |
| 1812 | .hpd_absent = 200, |
| 1813 | .unprepare = 150, |
| 1814 | .enable = 50, |
| 1815 | }; |
| 1816 | |
| 1817 | static const struct panel_delay delay_200_500_e250 = { |
| 1818 | .hpd_absent = 200, |
| 1819 | .unprepare = 500, |
| 1820 | .enable = 250, |
| 1821 | }; |
| 1822 | |
| 1823 | static const struct panel_delay delay_50_500_e200_d200_po2e335 = { |
| 1824 | .hpd_absent = 50, |
| 1825 | .unprepare = 500, |
| 1826 | .enable = 200, |
| 1827 | .disable = 200, |
| 1828 | .powered_on_to_enable = 335, |
| 1829 | }; |
| 1830 | |
| 1831 | #define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \ |
| 1832 | { \ |
| 1833 | .ident = { \ |
| 1834 | .name = _name, \ |
| 1835 | .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \ |
| 1836 | product_id), \ |
| 1837 | }, \ |
| 1838 | .delay = _delay \ |
| 1839 | } |
| 1840 | |
| 1841 | #define EDP_PANEL_ENTRY2(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name, _mode) \ |
| 1842 | { \ |
| 1843 | .ident = { \ |
| 1844 | .name = _name, \ |
| 1845 | .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \ |
| 1846 | product_id), \ |
| 1847 | }, \ |
| 1848 | .delay = _delay, \ |
| 1849 | .override_edid_mode = _mode \ |
| 1850 | } |
| 1851 | |
| 1852 | /* |
| 1853 | * This table is used to figure out power sequencing delays for panels that |
| 1854 | * are detected by EDID. Entries here may point to entries in the |
| 1855 | * platform_of_match table (if a panel is listed in both places). |
| 1856 | * |
| 1857 | * Sort first by vendor, then by product ID. |
| 1858 | */ |
| 1859 | static const struct edp_panel_entry edp_panels[] = { |
| 1860 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x105c, &delay_200_500_e50, "B116XTN01.0" ), |
| 1861 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x1062, &delay_200_500_e50, "B120XAN01.0" ), |
| 1862 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x125c, &delay_200_500_e50, "Unknown" ), |
| 1863 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x145c, &delay_200_500_e50, "B116XAB01.4" ), |
| 1864 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x1999, &delay_200_500_e50, "Unknown" ), |
| 1865 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x1e9b, &delay_200_500_e50, "B133UAN02.1" ), |
| 1866 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x1ea5, &delay_200_500_e50, "B116XAK01.6" ), |
| 1867 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x203d, &delay_200_500_e50, "B140HTN02.0" ), |
| 1868 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x208d, &delay_200_500_e50, "B140HTN02.1" ), |
| 1869 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x235c, &delay_200_500_e50, "B116XTN02.3" ), |
| 1870 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x239b, &delay_200_500_e50, "B116XAN06.1" ), |
| 1871 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x255c, &delay_200_500_e50, "B116XTN02.5" ), |
| 1872 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x403d, &delay_200_500_e50, "B140HAN04.0" ), |
| 1873 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAN04.0" ), |
| 1874 | EDP_PANEL_ENTRY2('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAK01.0" , |
| 1875 | &auo_b116xa3_mode), |
| 1876 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x435c, &delay_200_500_e50, "Unknown" ), |
| 1877 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x582d, &delay_200_500_e50, "B133UAN01.0" ), |
| 1878 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1" ), |
| 1879 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x635c, &delay_200_500_e50, "B116XAN06.3" ), |
| 1880 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x639c, &delay_200_500_e50, "B140HAK02.7" ), |
| 1881 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x723c, &delay_200_500_e50, "B140XTN07.2" ), |
| 1882 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x73aa, &delay_200_500_e50, "B116XTN02.3" ), |
| 1883 | EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0" ), |
| 1884 | EDP_PANEL_ENTRY('A', 'U', 'O', 0xa199, &delay_200_500_e50, "B116XAN06.1" ), |
| 1885 | EDP_PANEL_ENTRY('A', 'U', 'O', 0xa7b3, &delay_200_500_e50, "B140UAN04.4" ), |
| 1886 | EDP_PANEL_ENTRY('A', 'U', 'O', 0xc4b4, &delay_200_500_e50, "B116XAT04.1" ), |
| 1887 | EDP_PANEL_ENTRY('A', 'U', 'O', 0xc9a8, &delay_200_500_e50, "B140QAN08.H" ), |
| 1888 | EDP_PANEL_ENTRY('A', 'U', 'O', 0xd497, &delay_200_500_e50, "B120XAN01.0" ), |
| 1889 | EDP_PANEL_ENTRY('A', 'U', 'O', 0xf390, &delay_200_500_e50, "B140XTN07.7" ), |
| 1890 | |
| 1891 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0607, &delay_200_500_e200, "Unknown" ), |
| 1892 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0608, &delay_200_500_e50, "NT116WHM-N11" ), |
| 1893 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0609, &delay_200_500_e50_po2e200, "NT116WHM-N21 V4.1" ), |
| 1894 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0623, &delay_200_500_e200, "NT116WHM-N21 V4.0" ), |
| 1895 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0668, &delay_200_500_e200, "Unknown" ), |
| 1896 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x068f, &delay_200_500_e200, "Unknown" ), |
| 1897 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x06e5, &delay_200_500_e200, "Unknown" ), |
| 1898 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0705, &delay_200_500_e200, "Unknown" ), |
| 1899 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0715, &delay_200_150_e200, "NT116WHM-N21" ), |
| 1900 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0717, &delay_200_500_e50_po2e200, "NV133FHM-N42" ), |
| 1901 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0731, &delay_200_500_e80, "NT116WHM-N42" ), |
| 1902 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0741, &delay_200_500_e200, "NT116WHM-N44" ), |
| 1903 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0744, &delay_200_500_e200, "Unknown" ), |
| 1904 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x074c, &delay_200_500_e200, "Unknown" ), |
| 1905 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0751, &delay_200_500_e200, "Unknown" ), |
| 1906 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0754, &delay_200_500_e50_po2e200, "NV116WHM-N45" ), |
| 1907 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0771, &delay_200_500_e200, "Unknown" ), |
| 1908 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T01" ), |
| 1909 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0797, &delay_200_500_e200, "Unknown" ), |
| 1910 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x07a8, &delay_200_500_e50_po2e200, "NT116WHM-N21" ), |
| 1911 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM-N61" ), |
| 1912 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d3, &delay_200_500_e200, "Unknown" ), |
| 1913 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f6, &delay_200_500_e200, "NT140FHM-N44" ), |
| 1914 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f8, &delay_200_500_e200, "Unknown" ), |
| 1915 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0813, &delay_200_500_e200, "Unknown" ), |
| 1916 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0827, &delay_200_500_e50_p2e80, "NT140WHM-N44 V8.0" ), |
| 1917 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM-N62" ), |
| 1918 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0843, &delay_200_500_e200, "Unknown" ), |
| 1919 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x08b2, &delay_200_500_e200, "NT140WHM-N49" ), |
| 1920 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0848, &delay_200_500_e200, "Unknown" ), |
| 1921 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0849, &delay_200_500_e200, "Unknown" ), |
| 1922 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x09c3, &delay_200_500_e50, "NT116WHM-N21,836X2" ), |
| 1923 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x094b, &delay_200_500_e50, "NT116WHM-N21" ), |
| 1924 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0951, &delay_200_500_e80, "NV116WHM-N47" ), |
| 1925 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x095f, &delay_200_500_e50, "NE135FBM-N41 v8.1" ), |
| 1926 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x096e, &delay_200_500_e50_po2e200, "NV116WHM-T07 V8.0" ), |
| 1927 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0979, &delay_200_500_e50, "NV116WHM-N49 V8.0" ), |
| 1928 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x098d, &boe_nv110wtm_n61.delay, "NV110WTM-N61" ), |
| 1929 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0993, &delay_200_500_e80, "NV116WHM-T14 V8.0" ), |
| 1930 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ad, &delay_200_500_e80, "NV116WHM-N47" ), |
| 1931 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ae, &delay_200_500_e200, "NT140FHM-N45" ), |
| 1932 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x09dd, &delay_200_500_e50, "NT116WHM-N21" ), |
| 1933 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a1b, &delay_200_500_e50, "NV133WUM-N63" ), |
| 1934 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a36, &delay_200_500_e200, "Unknown" ), |
| 1935 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a3e, &delay_200_500_e80, "NV116WHM-N49" ), |
| 1936 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a5d, &delay_200_500_e50, "NV116WHM-N45" ), |
| 1937 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ac5, &delay_200_500_e50, "NV116WHM-N4C" ), |
| 1938 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ae8, &delay_200_500_e50_p2e80, "NV140WUM-N41" ), |
| 1939 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b09, &delay_200_500_e50_po2e200, "NV140FHM-NZ" ), |
| 1940 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b34, &delay_200_500_e80, "NV122WUM-N41" ), |
| 1941 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b43, &delay_200_500_e200, "NV140FHM-T09" ), |
| 1942 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b56, &delay_200_500_e80, "NT140FHM-N47" ), |
| 1943 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b66, &delay_200_500_e80, "NE140WUM-N6G" ), |
| 1944 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c20, &delay_200_500_e80, "NT140FHM-N47" ), |
| 1945 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c93, &delay_200_500_e200, "Unknown" ), |
| 1946 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cb6, &delay_200_500_e200, "NT116WHM-N44" ), |
| 1947 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cfa, &delay_200_500_e50, "NV116WHM-A4D" ), |
| 1948 | EDP_PANEL_ENTRY('B', 'O', 'E', 0x0d73, &delay_200_500_e80, "NE140WUM-N6S" ), |
| 1949 | |
| 1950 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x1130, &delay_200_500_e50, "N116BGE-EB2" ), |
| 1951 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x1132, &delay_200_500_e80_d50, "N116BGE-EA2" ), |
| 1952 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x1138, &innolux_n116bca_ea1.delay, "N116BCA-EA1-RC4" ), |
| 1953 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x1139, &delay_200_500_e80_d50, "N116BGE-EA2" ), |
| 1954 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x1141, &delay_200_500_e80_d50, "Unknown" ), |
| 1955 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x1145, &delay_200_500_e80_d50, "N116BCN-EB1" ), |
| 1956 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x114a, &delay_200_500_e80_d50, "Unknown" ), |
| 1957 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x114c, &innolux_n116bca_ea1.delay, "N116BCA-EA1" ), |
| 1958 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x1152, &delay_200_500_e80_d50, "N116BCN-EA1" ), |
| 1959 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x1153, &delay_200_500_e80_d50, "N116BGE-EA2" ), |
| 1960 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x1154, &delay_200_500_e80_d50, "N116BCA-EA2" ), |
| 1961 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x1156, &delay_200_500_e80_d50, "Unknown" ), |
| 1962 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x1157, &delay_200_500_e80_d50, "N116BGE-EA2" ), |
| 1963 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x115b, &delay_200_500_e80_d50, "N116BCN-EB1" ), |
| 1964 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x115d, &delay_200_500_e80_d50, "N116BCA-EA2" ), |
| 1965 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x115e, &delay_200_500_e80_d50, "N116BCA-EA1" ), |
| 1966 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x1160, &delay_200_500_e80_d50, "N116BCJ-EAK" ), |
| 1967 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x1161, &delay_200_500_e80, "N116BCP-EA2" ), |
| 1968 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x1247, &delay_200_500_e80_d50, "N120ACA-EA1" ), |
| 1969 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x142b, &delay_200_500_e80_d50, "N140HCA-EAC" ), |
| 1970 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x142e, &delay_200_500_e80_d50, "N140BGA-EA4" ), |
| 1971 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x144f, &delay_200_500_e80_d50, "N140HGA-EA1" ), |
| 1972 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x1468, &delay_200_500_e80, "N140HGA-EA1" ), |
| 1973 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d4, &delay_200_500_e80_d50, "N140HCA-EAC" ), |
| 1974 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d6, &delay_200_500_e80_d50, "N140BGA-EA4" ), |
| 1975 | EDP_PANEL_ENTRY('C', 'M', 'N', 0x14e5, &delay_200_500_e80_d50, "N140HGA-EA1" ), |
| 1976 | |
| 1977 | EDP_PANEL_ENTRY('C', 'S', 'O', 0x1200, &delay_200_500_e50_p2e200, "MNC207QS1-1" ), |
| 1978 | EDP_PANEL_ENTRY('C', 'S', 'O', 0x1413, &delay_200_500_e50_p2e200, "MNE007JA1-2" ), |
| 1979 | |
| 1980 | EDP_PANEL_ENTRY('C', 'S', 'W', 0x1100, &delay_200_500_e80_d50, "MNB601LS1-1" ), |
| 1981 | EDP_PANEL_ENTRY('C', 'S', 'W', 0x1103, &delay_200_500_e80_d50, "MNB601LS1-3" ), |
| 1982 | EDP_PANEL_ENTRY('C', 'S', 'W', 0x1104, &delay_200_500_e50, "MNB601LS1-4" ), |
| 1983 | EDP_PANEL_ENTRY('C', 'S', 'W', 0x1448, &delay_200_500_e50, "MNE007QS3-7" ), |
| 1984 | EDP_PANEL_ENTRY('C', 'S', 'W', 0x1457, &delay_80_500_e80_p2e200, "MNE007QS3-8" ), |
| 1985 | |
| 1986 | EDP_PANEL_ENTRY('E', 'T', 'C', 0x0000, &delay_50_500_e200_d200_po2e335, "LP079QX1-SP0V" ), |
| 1987 | |
| 1988 | EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d51, &delay_200_500_e200, "Unknown" ), |
| 1989 | EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5b, &delay_200_500_e200, "MB116AN01" ), |
| 1990 | EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5c, &delay_200_500_e200, "MB116AN01-2" ), |
| 1991 | |
| 1992 | EDP_PANEL_ENTRY('I', 'V', 'O', 0x048e, &delay_200_500_e200_d10, "M116NWR6 R5" ), |
| 1993 | EDP_PANEL_ENTRY('I', 'V', 'O', 0x057d, &delay_200_500_e200, "R140NWF5 RH" ), |
| 1994 | EDP_PANEL_ENTRY('I', 'V', 'O', 0x854a, &delay_200_500_p2e100, "M133NW4J" ), |
| 1995 | EDP_PANEL_ENTRY('I', 'V', 'O', 0x854b, &delay_200_500_p2e100, "R133NW4K-R0" ), |
| 1996 | EDP_PANEL_ENTRY('I', 'V', 'O', 0x8c4d, &delay_200_150_e200, "R140NWFM R1" ), |
| 1997 | |
| 1998 | EDP_PANEL_ENTRY('K', 'D', 'B', 0x044f, &delay_200_500_e80_d50, "Unknown" ), |
| 1999 | EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.delay, "116N21-30NV-A010" ), |
| 2000 | EDP_PANEL_ENTRY('K', 'D', 'B', 0x1118, &delay_200_500_e50, "KD116N29-30NK-A005" ), |
| 2001 | EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007" ), |
| 2002 | EDP_PANEL_ENTRY('K', 'D', 'B', 0x1212, &delay_200_500_e50, "KD116N0930A16" ), |
| 2003 | EDP_PANEL_ENTRY('K', 'D', 'B', 0x1707, &delay_200_150_e50, "KD116N2130B12" ), |
| 2004 | |
| 2005 | EDP_PANEL_ENTRY('K', 'D', 'C', 0x044f, &delay_200_500_e50, "KD116N9-30NH-F3" ), |
| 2006 | EDP_PANEL_ENTRY('K', 'D', 'C', 0x05f1, &delay_200_500_e80_d50, "KD116N5-30NV-G7" ), |
| 2007 | EDP_PANEL_ENTRY('K', 'D', 'C', 0x0809, &delay_200_500_e50, "KD116N2930A15" ), |
| 2008 | |
| 2009 | EDP_PANEL_ENTRY('L', 'G', 'D', 0x0000, &delay_200_500_e200_d200, "Unknown" ), |
| 2010 | EDP_PANEL_ENTRY('L', 'G', 'D', 0x048d, &delay_200_500_e200_d200, "Unknown" ), |
| 2011 | EDP_PANEL_ENTRY('L', 'G', 'D', 0x0497, &delay_200_500_e200_d200, "LP116WH7-SPB1" ), |
| 2012 | EDP_PANEL_ENTRY('L', 'G', 'D', 0x052c, &delay_200_500_e200_d200, "LP133WF2-SPL7" ), |
| 2013 | EDP_PANEL_ENTRY('L', 'G', 'D', 0x0537, &delay_200_500_e200_d200, "Unknown" ), |
| 2014 | EDP_PANEL_ENTRY('L', 'G', 'D', 0x054a, &delay_200_500_e200_d200, "LP116WH8-SPC1" ), |
| 2015 | EDP_PANEL_ENTRY('L', 'G', 'D', 0x0567, &delay_200_500_e200_d200, "Unknown" ), |
| 2016 | EDP_PANEL_ENTRY('L', 'G', 'D', 0x05af, &delay_200_500_e200_d200, "Unknown" ), |
| 2017 | EDP_PANEL_ENTRY('L', 'G', 'D', 0x05f1, &delay_200_500_e200_d200, "Unknown" ), |
| 2018 | EDP_PANEL_ENTRY('L', 'G', 'D', 0x0778, &delay_200_500_e200_d200, "134WT1" ), |
| 2019 | |
| 2020 | EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48" ), |
| 2021 | EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &delay_80_500_e50, "LQ140M1JW46" ), |
| 2022 | EDP_PANEL_ENTRY('S', 'H', 'P', 0x153a, &delay_200_500_e50, "LQ140T1JH01" ), |
| 2023 | EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW10" ), |
| 2024 | EDP_PANEL_ENTRY('S', 'H', 'P', 0x1593, &delay_200_500_p2e100, "LQ134N1" ), |
| 2025 | |
| 2026 | EDP_PANEL_ENTRY('S', 'T', 'A', 0x0004, &delay_200_500_e200, "116KHD024006" ), |
| 2027 | EDP_PANEL_ENTRY('S', 'T', 'A', 0x0009, &delay_200_500_e250, "116QHD024002" ), |
| 2028 | EDP_PANEL_ENTRY('S', 'T', 'A', 0x0100, &delay_100_500_e200, "2081116HHD028001-51D" ), |
| 2029 | |
| 2030 | { /* sentinal */ } |
| 2031 | }; |
| 2032 | |
| 2033 | static const struct edp_panel_entry *find_edp_panel(u32 panel_id, const struct drm_edid *edid) |
| 2034 | { |
| 2035 | const struct edp_panel_entry *panel; |
| 2036 | |
| 2037 | if (!panel_id) |
| 2038 | return NULL; |
| 2039 | |
| 2040 | /* |
| 2041 | * Match with identity first. This allows handling the case where |
| 2042 | * vendors incorrectly reused the same panel ID for multiple panels that |
| 2043 | * need different settings. If there's no match, try again with panel |
| 2044 | * ID, which should be unique. |
| 2045 | */ |
| 2046 | for (panel = edp_panels; panel->ident.panel_id; panel++) |
| 2047 | if (drm_edid_match(drm_edid: edid, ident: &panel->ident)) |
| 2048 | return panel; |
| 2049 | |
| 2050 | for (panel = edp_panels; panel->ident.panel_id; panel++) |
| 2051 | if (panel->ident.panel_id == panel_id) |
| 2052 | return panel; |
| 2053 | |
| 2054 | return NULL; |
| 2055 | } |
| 2056 | |
| 2057 | static int panel_edp_platform_probe(struct platform_device *pdev) |
| 2058 | { |
| 2059 | const struct of_device_id *id; |
| 2060 | |
| 2061 | /* Skip one since "edp-panel" is only supported on DP AUX bus */ |
| 2062 | id = of_match_node(matches: platform_of_match + 1, node: pdev->dev.of_node); |
| 2063 | if (!id) |
| 2064 | return -ENODEV; |
| 2065 | |
| 2066 | return panel_edp_probe(dev: &pdev->dev, desc: id->data, NULL); |
| 2067 | } |
| 2068 | |
| 2069 | static void panel_edp_platform_remove(struct platform_device *pdev) |
| 2070 | { |
| 2071 | panel_edp_remove(dev: &pdev->dev); |
| 2072 | } |
| 2073 | |
| 2074 | static void panel_edp_platform_shutdown(struct platform_device *pdev) |
| 2075 | { |
| 2076 | panel_edp_shutdown(dev: &pdev->dev); |
| 2077 | } |
| 2078 | |
| 2079 | static const struct dev_pm_ops panel_edp_pm_ops = { |
| 2080 | SET_RUNTIME_PM_OPS(panel_edp_suspend, panel_edp_resume, NULL) |
| 2081 | SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, |
| 2082 | pm_runtime_force_resume) |
| 2083 | }; |
| 2084 | |
| 2085 | static struct platform_driver panel_edp_platform_driver = { |
| 2086 | .driver = { |
| 2087 | .name = "panel-edp" , |
| 2088 | .of_match_table = platform_of_match, |
| 2089 | .pm = &panel_edp_pm_ops, |
| 2090 | }, |
| 2091 | .probe = panel_edp_platform_probe, |
| 2092 | .remove = panel_edp_platform_remove, |
| 2093 | .shutdown = panel_edp_platform_shutdown, |
| 2094 | }; |
| 2095 | |
| 2096 | static int panel_edp_dp_aux_ep_probe(struct dp_aux_ep_device *aux_ep) |
| 2097 | { |
| 2098 | const struct of_device_id *id; |
| 2099 | |
| 2100 | id = of_match_node(matches: platform_of_match, node: aux_ep->dev.of_node); |
| 2101 | if (!id) |
| 2102 | return -ENODEV; |
| 2103 | |
| 2104 | return panel_edp_probe(dev: &aux_ep->dev, desc: id->data, aux: aux_ep->aux); |
| 2105 | } |
| 2106 | |
| 2107 | static void panel_edp_dp_aux_ep_remove(struct dp_aux_ep_device *aux_ep) |
| 2108 | { |
| 2109 | panel_edp_remove(dev: &aux_ep->dev); |
| 2110 | } |
| 2111 | |
| 2112 | static void panel_edp_dp_aux_ep_shutdown(struct dp_aux_ep_device *aux_ep) |
| 2113 | { |
| 2114 | panel_edp_shutdown(dev: &aux_ep->dev); |
| 2115 | } |
| 2116 | |
| 2117 | static struct dp_aux_ep_driver panel_edp_dp_aux_ep_driver = { |
| 2118 | .driver = { |
| 2119 | .name = "panel-simple-dp-aux" , |
| 2120 | .of_match_table = platform_of_match, /* Same as platform one! */ |
| 2121 | .pm = &panel_edp_pm_ops, |
| 2122 | }, |
| 2123 | .probe = panel_edp_dp_aux_ep_probe, |
| 2124 | .remove = panel_edp_dp_aux_ep_remove, |
| 2125 | .shutdown = panel_edp_dp_aux_ep_shutdown, |
| 2126 | }; |
| 2127 | |
| 2128 | static int __init panel_edp_init(void) |
| 2129 | { |
| 2130 | int err; |
| 2131 | |
| 2132 | err = platform_driver_register(&panel_edp_platform_driver); |
| 2133 | if (err < 0) |
| 2134 | return err; |
| 2135 | |
| 2136 | err = dp_aux_dp_driver_register(&panel_edp_dp_aux_ep_driver); |
| 2137 | if (err < 0) |
| 2138 | goto err_did_platform_register; |
| 2139 | |
| 2140 | return 0; |
| 2141 | |
| 2142 | err_did_platform_register: |
| 2143 | platform_driver_unregister(&panel_edp_platform_driver); |
| 2144 | |
| 2145 | return err; |
| 2146 | } |
| 2147 | module_init(panel_edp_init); |
| 2148 | |
| 2149 | static void __exit panel_edp_exit(void) |
| 2150 | { |
| 2151 | dp_aux_dp_driver_unregister(aux_ep_drv: &panel_edp_dp_aux_ep_driver); |
| 2152 | platform_driver_unregister(&panel_edp_platform_driver); |
| 2153 | } |
| 2154 | module_exit(panel_edp_exit); |
| 2155 | |
| 2156 | MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>" ); |
| 2157 | MODULE_DESCRIPTION("DRM Driver for Simple eDP Panels" ); |
| 2158 | MODULE_LICENSE("GPL and additional rights" ); |
| 2159 | |