1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright 2018 Marty E. Plummer <hanetzer@startmail.com> */
3/* Copyright 2019 Linaro, Ltd, Rob Herring <robh@kernel.org> */
4
5#ifndef __PANFROST_DEVICE_H__
6#define __PANFROST_DEVICE_H__
7
8#include <linux/atomic.h>
9#include <linux/io-pgtable.h>
10#include <linux/pm.h>
11#include <linux/regulator/consumer.h>
12#include <linux/spinlock.h>
13#include <drm/drm_device.h>
14#include <drm/drm_mm.h>
15#include <drm/gpu_scheduler.h>
16
17#include "panfrost_devfreq.h"
18
19struct panfrost_device;
20struct panfrost_mmu;
21struct panfrost_job_slot;
22struct panfrost_job;
23struct panfrost_perfcnt;
24
25#define NUM_JOB_SLOTS 3
26#define MAX_PM_DOMAINS 5
27
28struct panfrost_features {
29 u16 id;
30 u16 revision;
31
32 u64 shader_present;
33 u64 tiler_present;
34 u64 l2_present;
35 u64 stack_present;
36 u32 as_present;
37 u32 js_present;
38
39 u32 l2_features;
40 u32 core_features;
41 u32 tiler_features;
42 u32 mem_features;
43 u32 mmu_features;
44 u32 thread_features;
45 u32 max_threads;
46 u32 thread_max_workgroup_sz;
47 u32 thread_max_barrier_sz;
48 u32 coherency_features;
49 u32 afbc_features;
50 u32 texture_features[4];
51 u32 js_features[16];
52
53 u32 nr_core_groups;
54 u32 thread_tls_alloc;
55
56 unsigned long hw_features[64 / BITS_PER_LONG];
57 unsigned long hw_issues[64 / BITS_PER_LONG];
58};
59
60/*
61 * Features that cannot be automatically detected and need matching using the
62 * compatible string, typically SoC-specific.
63 */
64struct panfrost_compatible {
65 /* Supplies count and names. */
66 int num_supplies;
67 const char * const *supply_names;
68 /*
69 * Number of power domains required, note that values 0 and 1 are
70 * handled identically, as only values > 1 need special handling.
71 */
72 int num_pm_domains;
73 /* Only required if num_pm_domains > 1. */
74 const char * const *pm_domain_names;
75
76 /* Vendor implementation quirks callback */
77 void (*vendor_quirk)(struct panfrost_device *pfdev);
78};
79
80struct panfrost_device {
81 struct device *dev;
82 struct drm_device *ddev;
83 struct platform_device *pdev;
84
85 void __iomem *iomem;
86 struct clk *clock;
87 struct clk *bus_clock;
88 struct regulator_bulk_data *regulators;
89 struct reset_control *rstc;
90 /* pm_domains for devices with more than one. */
91 struct device *pm_domain_devs[MAX_PM_DOMAINS];
92 struct device_link *pm_domain_links[MAX_PM_DOMAINS];
93 bool coherent;
94
95 struct panfrost_features features;
96 const struct panfrost_compatible *comp;
97
98 spinlock_t as_lock;
99 unsigned long as_in_use_mask;
100 unsigned long as_alloc_mask;
101 unsigned long as_faulty_mask;
102 struct list_head as_lru_list;
103
104 struct panfrost_job_slot *js;
105
106 struct panfrost_job *jobs[NUM_JOB_SLOTS][2];
107 struct list_head scheduled_jobs;
108
109 struct panfrost_perfcnt *perfcnt;
110 atomic_t profile_mode;
111
112 struct mutex sched_lock;
113
114 struct {
115 struct workqueue_struct *wq;
116 struct work_struct work;
117 atomic_t pending;
118 } reset;
119
120 struct mutex shrinker_lock;
121 struct list_head shrinker_list;
122 struct shrinker *shrinker;
123
124 struct panfrost_devfreq pfdevfreq;
125
126 struct {
127 atomic_t use_count;
128 spinlock_t lock;
129 } cycle_counter;
130};
131
132struct panfrost_mmu {
133 struct panfrost_device *pfdev;
134 struct kref refcount;
135 struct io_pgtable_cfg pgtbl_cfg;
136 struct io_pgtable_ops *pgtbl_ops;
137 struct drm_mm mm;
138 spinlock_t mm_lock;
139 int as;
140 atomic_t as_count;
141 struct list_head list;
142};
143
144struct panfrost_engine_usage {
145 unsigned long long elapsed_ns[NUM_JOB_SLOTS];
146 unsigned long long cycles[NUM_JOB_SLOTS];
147};
148
149struct panfrost_file_priv {
150 struct panfrost_device *pfdev;
151
152 struct drm_sched_entity sched_entity[NUM_JOB_SLOTS];
153
154 struct panfrost_mmu *mmu;
155
156 struct panfrost_engine_usage engine_usage;
157};
158
159static inline struct panfrost_device *to_panfrost_device(struct drm_device *ddev)
160{
161 return ddev->dev_private;
162}
163
164static inline int panfrost_model_cmp(struct panfrost_device *pfdev, s32 id)
165{
166 s32 match_id = pfdev->features.id;
167
168 if (match_id & 0xf000)
169 match_id &= 0xf00f;
170 return match_id - id;
171}
172
173static inline bool panfrost_model_is_bifrost(struct panfrost_device *pfdev)
174{
175 return panfrost_model_cmp(pfdev, id: 0x1000) >= 0;
176}
177
178static inline bool panfrost_model_eq(struct panfrost_device *pfdev, s32 id)
179{
180 return !panfrost_model_cmp(pfdev, id);
181}
182
183int panfrost_unstable_ioctl_check(void);
184
185int panfrost_device_init(struct panfrost_device *pfdev);
186void panfrost_device_fini(struct panfrost_device *pfdev);
187void panfrost_device_reset(struct panfrost_device *pfdev);
188
189extern const struct dev_pm_ops panfrost_pm_ops;
190
191enum drm_panfrost_exception_type {
192 DRM_PANFROST_EXCEPTION_OK = 0x00,
193 DRM_PANFROST_EXCEPTION_DONE = 0x01,
194 DRM_PANFROST_EXCEPTION_INTERRUPTED = 0x02,
195 DRM_PANFROST_EXCEPTION_STOPPED = 0x03,
196 DRM_PANFROST_EXCEPTION_TERMINATED = 0x04,
197 DRM_PANFROST_EXCEPTION_KABOOM = 0x05,
198 DRM_PANFROST_EXCEPTION_EUREKA = 0x06,
199 DRM_PANFROST_EXCEPTION_ACTIVE = 0x08,
200 DRM_PANFROST_EXCEPTION_MAX_NON_FAULT = 0x3f,
201 DRM_PANFROST_EXCEPTION_JOB_CONFIG_FAULT = 0x40,
202 DRM_PANFROST_EXCEPTION_JOB_POWER_FAULT = 0x41,
203 DRM_PANFROST_EXCEPTION_JOB_READ_FAULT = 0x42,
204 DRM_PANFROST_EXCEPTION_JOB_WRITE_FAULT = 0x43,
205 DRM_PANFROST_EXCEPTION_JOB_AFFINITY_FAULT = 0x44,
206 DRM_PANFROST_EXCEPTION_JOB_BUS_FAULT = 0x48,
207 DRM_PANFROST_EXCEPTION_INSTR_INVALID_PC = 0x50,
208 DRM_PANFROST_EXCEPTION_INSTR_INVALID_ENC = 0x51,
209 DRM_PANFROST_EXCEPTION_INSTR_TYPE_MISMATCH = 0x52,
210 DRM_PANFROST_EXCEPTION_INSTR_OPERAND_FAULT = 0x53,
211 DRM_PANFROST_EXCEPTION_INSTR_TLS_FAULT = 0x54,
212 DRM_PANFROST_EXCEPTION_INSTR_BARRIER_FAULT = 0x55,
213 DRM_PANFROST_EXCEPTION_INSTR_ALIGN_FAULT = 0x56,
214 DRM_PANFROST_EXCEPTION_DATA_INVALID_FAULT = 0x58,
215 DRM_PANFROST_EXCEPTION_TILE_RANGE_FAULT = 0x59,
216 DRM_PANFROST_EXCEPTION_ADDR_RANGE_FAULT = 0x5a,
217 DRM_PANFROST_EXCEPTION_IMPRECISE_FAULT = 0x5b,
218 DRM_PANFROST_EXCEPTION_OOM = 0x60,
219 DRM_PANFROST_EXCEPTION_OOM_AFBC = 0x61,
220 DRM_PANFROST_EXCEPTION_UNKNOWN = 0x7f,
221 DRM_PANFROST_EXCEPTION_DELAYED_BUS_FAULT = 0x80,
222 DRM_PANFROST_EXCEPTION_GPU_SHAREABILITY_FAULT = 0x88,
223 DRM_PANFROST_EXCEPTION_SYS_SHAREABILITY_FAULT = 0x89,
224 DRM_PANFROST_EXCEPTION_GPU_CACHEABILITY_FAULT = 0x8a,
225 DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_0 = 0xc0,
226 DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_1 = 0xc1,
227 DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_2 = 0xc2,
228 DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_3 = 0xc3,
229 DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_4 = 0xc4,
230 DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_IDENTITY = 0xc7,
231 DRM_PANFROST_EXCEPTION_PERM_FAULT_0 = 0xc8,
232 DRM_PANFROST_EXCEPTION_PERM_FAULT_1 = 0xc9,
233 DRM_PANFROST_EXCEPTION_PERM_FAULT_2 = 0xca,
234 DRM_PANFROST_EXCEPTION_PERM_FAULT_3 = 0xcb,
235 DRM_PANFROST_EXCEPTION_TRANSTAB_BUS_FAULT_0 = 0xd0,
236 DRM_PANFROST_EXCEPTION_TRANSTAB_BUS_FAULT_1 = 0xd1,
237 DRM_PANFROST_EXCEPTION_TRANSTAB_BUS_FAULT_2 = 0xd2,
238 DRM_PANFROST_EXCEPTION_TRANSTAB_BUS_FAULT_3 = 0xd3,
239 DRM_PANFROST_EXCEPTION_ACCESS_FLAG_0 = 0xd8,
240 DRM_PANFROST_EXCEPTION_ACCESS_FLAG_1 = 0xd9,
241 DRM_PANFROST_EXCEPTION_ACCESS_FLAG_2 = 0xda,
242 DRM_PANFROST_EXCEPTION_ACCESS_FLAG_3 = 0xdb,
243 DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_IN0 = 0xe0,
244 DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_IN1 = 0xe1,
245 DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_IN2 = 0xe2,
246 DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_IN3 = 0xe3,
247 DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_OUT0 = 0xe4,
248 DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_OUT1 = 0xe5,
249 DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_OUT2 = 0xe6,
250 DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_OUT3 = 0xe7,
251 DRM_PANFROST_EXCEPTION_MEM_ATTR_FAULT_0 = 0xe8,
252 DRM_PANFROST_EXCEPTION_MEM_ATTR_FAULT_1 = 0xe9,
253 DRM_PANFROST_EXCEPTION_MEM_ATTR_FAULT_2 = 0xea,
254 DRM_PANFROST_EXCEPTION_MEM_ATTR_FAULT_3 = 0xeb,
255 DRM_PANFROST_EXCEPTION_MEM_ATTR_NONCACHE_0 = 0xec,
256 DRM_PANFROST_EXCEPTION_MEM_ATTR_NONCACHE_1 = 0xed,
257 DRM_PANFROST_EXCEPTION_MEM_ATTR_NONCACHE_2 = 0xee,
258 DRM_PANFROST_EXCEPTION_MEM_ATTR_NONCACHE_3 = 0xef,
259};
260
261static inline bool
262panfrost_exception_is_fault(u32 exception_code)
263{
264 return exception_code > DRM_PANFROST_EXCEPTION_MAX_NON_FAULT;
265}
266
267const char *panfrost_exception_name(u32 exception_code);
268bool panfrost_exception_needs_reset(const struct panfrost_device *pfdev,
269 u32 exception_code);
270
271static inline void
272panfrost_device_schedule_reset(struct panfrost_device *pfdev)
273{
274 atomic_set(v: &pfdev->reset.pending, i: 1);
275 queue_work(wq: pfdev->reset.wq, work: &pfdev->reset.work);
276}
277
278#endif
279

source code of linux/drivers/gpu/drm/panfrost/panfrost_device.h