1 | /* |
2 | * Copyright 2013 Red Hat Inc. |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), |
6 | * to deal in the Software without restriction, including without limitation |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * Software is furnished to do so, subject to the following conditions: |
10 | * |
11 | * The above copyright notice and this permission notice shall be included in |
12 | * all copies or substantial portions of the Software. |
13 | * |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
20 | * OTHER DEALINGS IN THE SOFTWARE. |
21 | * |
22 | * Authors: Dave Airlie |
23 | * Alon Levy |
24 | */ |
25 | |
26 | /* QXL cmd/ring handling */ |
27 | |
28 | #include <linux/delay.h> |
29 | |
30 | #include <drm/drm_util.h> |
31 | |
32 | #include "qxl_drv.h" |
33 | #include "qxl_object.h" |
34 | |
35 | static int qxl_reap_surface_id(struct qxl_device *qdev, int max_to_reap); |
36 | |
37 | struct ring { |
38 | struct qxl_ring_header ; |
39 | uint8_t elements[]; |
40 | }; |
41 | |
42 | struct qxl_ring { |
43 | struct ring *ring; |
44 | int element_size; |
45 | int n_elements; |
46 | int prod_notify; |
47 | wait_queue_head_t *push_event; |
48 | spinlock_t lock; |
49 | }; |
50 | |
51 | void qxl_ring_free(struct qxl_ring *ring) |
52 | { |
53 | kfree(objp: ring); |
54 | } |
55 | |
56 | struct qxl_ring * |
57 | qxl_ring_create(struct qxl_ring_header *, |
58 | int element_size, |
59 | int n_elements, |
60 | int prod_notify, |
61 | wait_queue_head_t *push_event) |
62 | { |
63 | struct qxl_ring *ring; |
64 | |
65 | ring = kmalloc(size: sizeof(*ring), GFP_KERNEL); |
66 | if (!ring) |
67 | return NULL; |
68 | |
69 | ring->ring = (struct ring *)header; |
70 | ring->element_size = element_size; |
71 | ring->n_elements = n_elements; |
72 | ring->prod_notify = prod_notify; |
73 | ring->push_event = push_event; |
74 | spin_lock_init(&ring->lock); |
75 | return ring; |
76 | } |
77 | |
78 | static int (struct qxl_ring *ring) |
79 | { |
80 | int ret; |
81 | struct qxl_ring_header * = &(ring->ring->header); |
82 | unsigned long flags; |
83 | |
84 | spin_lock_irqsave(&ring->lock, flags); |
85 | ret = header->prod - header->cons < header->num_items; |
86 | if (ret == 0) |
87 | header->notify_on_cons = header->cons + 1; |
88 | spin_unlock_irqrestore(lock: &ring->lock, flags); |
89 | return ret; |
90 | } |
91 | |
92 | int qxl_check_idle(struct qxl_ring *ring) |
93 | { |
94 | int ret; |
95 | struct qxl_ring_header * = &(ring->ring->header); |
96 | unsigned long flags; |
97 | |
98 | spin_lock_irqsave(&ring->lock, flags); |
99 | ret = header->prod == header->cons; |
100 | spin_unlock_irqrestore(lock: &ring->lock, flags); |
101 | return ret; |
102 | } |
103 | |
104 | int qxl_ring_push(struct qxl_ring *ring, |
105 | const void *new_elt, bool interruptible) |
106 | { |
107 | struct qxl_ring_header * = &(ring->ring->header); |
108 | uint8_t *elt; |
109 | int idx, ret; |
110 | unsigned long flags; |
111 | |
112 | spin_lock_irqsave(&ring->lock, flags); |
113 | if (header->prod - header->cons == header->num_items) { |
114 | header->notify_on_cons = header->cons + 1; |
115 | mb(); |
116 | spin_unlock_irqrestore(lock: &ring->lock, flags); |
117 | if (!drm_can_sleep()) { |
118 | while (!qxl_check_header(ring)) |
119 | udelay(1); |
120 | } else { |
121 | if (interruptible) { |
122 | ret = wait_event_interruptible(*ring->push_event, |
123 | qxl_check_header(ring)); |
124 | if (ret) |
125 | return ret; |
126 | } else { |
127 | wait_event(*ring->push_event, |
128 | qxl_check_header(ring)); |
129 | } |
130 | |
131 | } |
132 | spin_lock_irqsave(&ring->lock, flags); |
133 | } |
134 | |
135 | idx = header->prod & (ring->n_elements - 1); |
136 | elt = ring->ring->elements + idx * ring->element_size; |
137 | |
138 | memcpy((void *)elt, new_elt, ring->element_size); |
139 | |
140 | header->prod++; |
141 | |
142 | mb(); |
143 | |
144 | if (header->prod == header->notify_on_prod) |
145 | outb(value: 0, port: ring->prod_notify); |
146 | |
147 | spin_unlock_irqrestore(lock: &ring->lock, flags); |
148 | return 0; |
149 | } |
150 | |
151 | static bool qxl_ring_pop(struct qxl_ring *ring, |
152 | void *element) |
153 | { |
154 | volatile struct qxl_ring_header * = &(ring->ring->header); |
155 | volatile uint8_t *ring_elt; |
156 | int idx; |
157 | unsigned long flags; |
158 | |
159 | spin_lock_irqsave(&ring->lock, flags); |
160 | if (header->cons == header->prod) { |
161 | header->notify_on_prod = header->cons + 1; |
162 | spin_unlock_irqrestore(lock: &ring->lock, flags); |
163 | return false; |
164 | } |
165 | |
166 | idx = header->cons & (ring->n_elements - 1); |
167 | ring_elt = ring->ring->elements + idx * ring->element_size; |
168 | |
169 | memcpy(element, (void *)ring_elt, ring->element_size); |
170 | |
171 | header->cons++; |
172 | |
173 | spin_unlock_irqrestore(lock: &ring->lock, flags); |
174 | return true; |
175 | } |
176 | |
177 | int |
178 | qxl_push_command_ring_release(struct qxl_device *qdev, struct qxl_release *release, |
179 | uint32_t type, bool interruptible) |
180 | { |
181 | struct qxl_command cmd; |
182 | |
183 | cmd.type = type; |
184 | cmd.data = qxl_bo_physical_address(qdev, bo: release->release_bo, offset: release->release_offset); |
185 | |
186 | return qxl_ring_push(ring: qdev->command_ring, new_elt: &cmd, interruptible); |
187 | } |
188 | |
189 | int |
190 | qxl_push_cursor_ring_release(struct qxl_device *qdev, struct qxl_release *release, |
191 | uint32_t type, bool interruptible) |
192 | { |
193 | struct qxl_command cmd; |
194 | |
195 | cmd.type = type; |
196 | cmd.data = qxl_bo_physical_address(qdev, bo: release->release_bo, offset: release->release_offset); |
197 | |
198 | return qxl_ring_push(ring: qdev->cursor_ring, new_elt: &cmd, interruptible); |
199 | } |
200 | |
201 | bool qxl_queue_garbage_collect(struct qxl_device *qdev, bool flush) |
202 | { |
203 | if (!qxl_check_idle(ring: qdev->release_ring)) { |
204 | schedule_work(work: &qdev->gc_work); |
205 | if (flush) |
206 | flush_work(work: &qdev->gc_work); |
207 | return true; |
208 | } |
209 | return false; |
210 | } |
211 | |
212 | int qxl_garbage_collect(struct qxl_device *qdev) |
213 | { |
214 | struct qxl_release *release; |
215 | uint64_t id, next_id; |
216 | int i = 0; |
217 | union qxl_release_info *info; |
218 | |
219 | while (qxl_ring_pop(ring: qdev->release_ring, element: &id)) { |
220 | DRM_DEBUG_DRIVER("popped %lld\n" , id); |
221 | while (id) { |
222 | release = qxl_release_from_id_locked(qdev, id); |
223 | if (release == NULL) |
224 | break; |
225 | |
226 | info = qxl_release_map(qdev, release); |
227 | next_id = info->next; |
228 | qxl_release_unmap(qdev, release, info); |
229 | |
230 | DRM_DEBUG_DRIVER("popped %lld, next %lld\n" , id, |
231 | next_id); |
232 | |
233 | switch (release->type) { |
234 | case QXL_RELEASE_DRAWABLE: |
235 | case QXL_RELEASE_SURFACE_CMD: |
236 | case QXL_RELEASE_CURSOR_CMD: |
237 | break; |
238 | default: |
239 | DRM_ERROR("unexpected release type\n" ); |
240 | break; |
241 | } |
242 | id = next_id; |
243 | |
244 | qxl_release_free(qdev, release); |
245 | ++i; |
246 | } |
247 | } |
248 | |
249 | wake_up_all(&qdev->release_event); |
250 | DRM_DEBUG_DRIVER("%d\n" , i); |
251 | |
252 | return i; |
253 | } |
254 | |
255 | int qxl_alloc_bo_reserved(struct qxl_device *qdev, |
256 | struct qxl_release *release, |
257 | unsigned long size, |
258 | struct qxl_bo **_bo) |
259 | { |
260 | struct qxl_bo *bo; |
261 | int ret; |
262 | |
263 | ret = qxl_bo_create(qdev, size, kernel: false /* not kernel - device */, |
264 | pinned: false, QXL_GEM_DOMAIN_VRAM, priority: 0, NULL, bo_ptr: &bo); |
265 | if (ret) { |
266 | DRM_ERROR("failed to allocate VRAM BO\n" ); |
267 | return ret; |
268 | } |
269 | ret = qxl_release_list_add(release, bo); |
270 | if (ret) |
271 | goto out_unref; |
272 | |
273 | *_bo = bo; |
274 | return 0; |
275 | out_unref: |
276 | qxl_bo_unref(bo: &bo); |
277 | return ret; |
278 | } |
279 | |
280 | static int wait_for_io_cmd_user(struct qxl_device *qdev, uint8_t val, long port, bool intr) |
281 | { |
282 | int irq_num; |
283 | long addr = qdev->io_base + port; |
284 | int ret; |
285 | |
286 | mutex_lock(&qdev->async_io_mutex); |
287 | irq_num = atomic_read(v: &qdev->irq_received_io_cmd); |
288 | if (qdev->last_sent_io_cmd > irq_num) { |
289 | if (intr) |
290 | ret = wait_event_interruptible_timeout(qdev->io_cmd_event, |
291 | atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ); |
292 | else |
293 | ret = wait_event_timeout(qdev->io_cmd_event, |
294 | atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ); |
295 | /* 0 is timeout, just bail the "hw" has gone away */ |
296 | if (ret <= 0) |
297 | goto out; |
298 | irq_num = atomic_read(v: &qdev->irq_received_io_cmd); |
299 | } |
300 | outb(value: val, port: addr); |
301 | qdev->last_sent_io_cmd = irq_num + 1; |
302 | if (intr) |
303 | ret = wait_event_interruptible_timeout(qdev->io_cmd_event, |
304 | atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ); |
305 | else |
306 | ret = wait_event_timeout(qdev->io_cmd_event, |
307 | atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ); |
308 | out: |
309 | if (ret > 0) |
310 | ret = 0; |
311 | mutex_unlock(lock: &qdev->async_io_mutex); |
312 | return ret; |
313 | } |
314 | |
315 | static void wait_for_io_cmd(struct qxl_device *qdev, uint8_t val, long port) |
316 | { |
317 | int ret; |
318 | |
319 | restart: |
320 | ret = wait_for_io_cmd_user(qdev, val, port, intr: false); |
321 | if (ret == -ERESTARTSYS) |
322 | goto restart; |
323 | } |
324 | |
325 | int qxl_io_update_area(struct qxl_device *qdev, struct qxl_bo *surf, |
326 | const struct qxl_rect *area) |
327 | { |
328 | int surface_id; |
329 | uint32_t surface_width, surface_height; |
330 | int ret; |
331 | |
332 | if (!surf->hw_surf_alloc) |
333 | DRM_ERROR("got io update area with no hw surface\n" ); |
334 | |
335 | if (surf->is_primary) |
336 | surface_id = 0; |
337 | else |
338 | surface_id = surf->surface_id; |
339 | surface_width = surf->surf.width; |
340 | surface_height = surf->surf.height; |
341 | |
342 | if (area->left < 0 || area->top < 0 || |
343 | area->right > surface_width || area->bottom > surface_height) |
344 | return -EINVAL; |
345 | |
346 | mutex_lock(&qdev->update_area_mutex); |
347 | qdev->ram_header->update_area = *area; |
348 | qdev->ram_header->update_surface = surface_id; |
349 | ret = wait_for_io_cmd_user(qdev, val: 0, port: QXL_IO_UPDATE_AREA_ASYNC, intr: true); |
350 | mutex_unlock(lock: &qdev->update_area_mutex); |
351 | return ret; |
352 | } |
353 | |
354 | void qxl_io_notify_oom(struct qxl_device *qdev) |
355 | { |
356 | outb(value: 0, port: qdev->io_base + QXL_IO_NOTIFY_OOM); |
357 | } |
358 | |
359 | void qxl_io_flush_release(struct qxl_device *qdev) |
360 | { |
361 | outb(value: 0, port: qdev->io_base + QXL_IO_FLUSH_RELEASE); |
362 | } |
363 | |
364 | void qxl_io_flush_surfaces(struct qxl_device *qdev) |
365 | { |
366 | wait_for_io_cmd(qdev, val: 0, port: QXL_IO_FLUSH_SURFACES_ASYNC); |
367 | } |
368 | |
369 | void qxl_io_destroy_primary(struct qxl_device *qdev) |
370 | { |
371 | wait_for_io_cmd(qdev, val: 0, port: QXL_IO_DESTROY_PRIMARY_ASYNC); |
372 | qdev->primary_bo->is_primary = false; |
373 | drm_gem_object_put(obj: &qdev->primary_bo->tbo.base); |
374 | qdev->primary_bo = NULL; |
375 | } |
376 | |
377 | void qxl_io_create_primary(struct qxl_device *qdev, struct qxl_bo *bo) |
378 | { |
379 | struct qxl_surface_create *create; |
380 | |
381 | if (WARN_ON(qdev->primary_bo)) |
382 | return; |
383 | |
384 | DRM_DEBUG_DRIVER("qdev %p, ram_header %p\n" , qdev, qdev->ram_header); |
385 | create = &qdev->ram_header->create_surface; |
386 | create->format = bo->surf.format; |
387 | create->width = bo->surf.width; |
388 | create->height = bo->surf.height; |
389 | create->stride = bo->surf.stride; |
390 | create->mem = qxl_bo_physical_address(qdev, bo, offset: 0); |
391 | |
392 | DRM_DEBUG_DRIVER("mem = %llx, from %p\n" , create->mem, bo->kptr); |
393 | |
394 | create->flags = QXL_SURF_FLAG_KEEP_DATA; |
395 | create->type = QXL_SURF_TYPE_PRIMARY; |
396 | |
397 | wait_for_io_cmd(qdev, val: 0, port: QXL_IO_CREATE_PRIMARY_ASYNC); |
398 | qdev->primary_bo = bo; |
399 | qdev->primary_bo->is_primary = true; |
400 | drm_gem_object_get(obj: &qdev->primary_bo->tbo.base); |
401 | } |
402 | |
403 | void qxl_io_memslot_add(struct qxl_device *qdev, uint8_t id) |
404 | { |
405 | DRM_DEBUG_DRIVER("qxl_memslot_add %d\n" , id); |
406 | wait_for_io_cmd(qdev, val: id, port: QXL_IO_MEMSLOT_ADD_ASYNC); |
407 | } |
408 | |
409 | void qxl_io_reset(struct qxl_device *qdev) |
410 | { |
411 | outb(value: 0, port: qdev->io_base + QXL_IO_RESET); |
412 | } |
413 | |
414 | void qxl_io_monitors_config(struct qxl_device *qdev) |
415 | { |
416 | wait_for_io_cmd(qdev, val: 0, port: QXL_IO_MONITORS_CONFIG_ASYNC); |
417 | } |
418 | |
419 | int qxl_surface_id_alloc(struct qxl_device *qdev, |
420 | struct qxl_bo *surf) |
421 | { |
422 | uint32_t handle; |
423 | int idr_ret; |
424 | int count = 0; |
425 | again: |
426 | idr_preload(GFP_ATOMIC); |
427 | spin_lock(lock: &qdev->surf_id_idr_lock); |
428 | idr_ret = idr_alloc(&qdev->surf_id_idr, NULL, start: 1, end: 0, GFP_NOWAIT); |
429 | spin_unlock(lock: &qdev->surf_id_idr_lock); |
430 | idr_preload_end(); |
431 | if (idr_ret < 0) |
432 | return idr_ret; |
433 | handle = idr_ret; |
434 | |
435 | if (handle >= qdev->rom->n_surfaces) { |
436 | count++; |
437 | spin_lock(lock: &qdev->surf_id_idr_lock); |
438 | idr_remove(&qdev->surf_id_idr, id: handle); |
439 | spin_unlock(lock: &qdev->surf_id_idr_lock); |
440 | qxl_reap_surface_id(qdev, max_to_reap: 2); |
441 | goto again; |
442 | } |
443 | surf->surface_id = handle; |
444 | |
445 | spin_lock(lock: &qdev->surf_id_idr_lock); |
446 | qdev->last_alloced_surf_id = handle; |
447 | spin_unlock(lock: &qdev->surf_id_idr_lock); |
448 | return 0; |
449 | } |
450 | |
451 | void qxl_surface_id_dealloc(struct qxl_device *qdev, |
452 | uint32_t surface_id) |
453 | { |
454 | spin_lock(lock: &qdev->surf_id_idr_lock); |
455 | idr_remove(&qdev->surf_id_idr, id: surface_id); |
456 | spin_unlock(lock: &qdev->surf_id_idr_lock); |
457 | } |
458 | |
459 | int qxl_hw_surface_alloc(struct qxl_device *qdev, |
460 | struct qxl_bo *surf) |
461 | { |
462 | struct qxl_surface_cmd *cmd; |
463 | struct qxl_release *release; |
464 | int ret; |
465 | |
466 | if (surf->hw_surf_alloc) |
467 | return 0; |
468 | |
469 | ret = qxl_alloc_surface_release_reserved(qdev, surface_cmd_type: QXL_SURFACE_CMD_CREATE, |
470 | NULL, |
471 | release: &release); |
472 | if (ret) |
473 | return ret; |
474 | |
475 | ret = qxl_release_reserve_list(release, no_intr: true); |
476 | if (ret) { |
477 | qxl_release_free(qdev, release); |
478 | return ret; |
479 | } |
480 | cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release); |
481 | cmd->type = QXL_SURFACE_CMD_CREATE; |
482 | cmd->flags = QXL_SURF_FLAG_KEEP_DATA; |
483 | cmd->u.surface_create.format = surf->surf.format; |
484 | cmd->u.surface_create.width = surf->surf.width; |
485 | cmd->u.surface_create.height = surf->surf.height; |
486 | cmd->u.surface_create.stride = surf->surf.stride; |
487 | cmd->u.surface_create.data = qxl_bo_physical_address(qdev, bo: surf, offset: 0); |
488 | cmd->surface_id = surf->surface_id; |
489 | qxl_release_unmap(qdev, release, info: &cmd->release_info); |
490 | |
491 | surf->surf_create = release; |
492 | |
493 | /* no need to add a release to the fence for this surface bo, |
494 | since it is only released when we ask to destroy the surface |
495 | and it would never signal otherwise */ |
496 | qxl_release_fence_buffer_objects(release); |
497 | qxl_push_command_ring_release(qdev, release, type: QXL_CMD_SURFACE, interruptible: false); |
498 | |
499 | surf->hw_surf_alloc = true; |
500 | spin_lock(lock: &qdev->surf_id_idr_lock); |
501 | idr_replace(&qdev->surf_id_idr, surf, id: surf->surface_id); |
502 | spin_unlock(lock: &qdev->surf_id_idr_lock); |
503 | return 0; |
504 | } |
505 | |
506 | int qxl_hw_surface_dealloc(struct qxl_device *qdev, |
507 | struct qxl_bo *surf) |
508 | { |
509 | struct qxl_surface_cmd *cmd; |
510 | struct qxl_release *release; |
511 | int ret; |
512 | int id; |
513 | |
514 | if (!surf->hw_surf_alloc) |
515 | return 0; |
516 | |
517 | ret = qxl_alloc_surface_release_reserved(qdev, surface_cmd_type: QXL_SURFACE_CMD_DESTROY, |
518 | create_rel: surf->surf_create, |
519 | release: &release); |
520 | if (ret) |
521 | return ret; |
522 | |
523 | surf->surf_create = NULL; |
524 | /* remove the surface from the idr, but not the surface id yet */ |
525 | spin_lock(lock: &qdev->surf_id_idr_lock); |
526 | idr_replace(&qdev->surf_id_idr, NULL, id: surf->surface_id); |
527 | spin_unlock(lock: &qdev->surf_id_idr_lock); |
528 | surf->hw_surf_alloc = false; |
529 | |
530 | id = surf->surface_id; |
531 | surf->surface_id = 0; |
532 | |
533 | release->surface_release_id = id; |
534 | cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release); |
535 | cmd->type = QXL_SURFACE_CMD_DESTROY; |
536 | cmd->surface_id = id; |
537 | qxl_release_unmap(qdev, release, info: &cmd->release_info); |
538 | |
539 | qxl_release_fence_buffer_objects(release); |
540 | qxl_push_command_ring_release(qdev, release, type: QXL_CMD_SURFACE, interruptible: false); |
541 | |
542 | return 0; |
543 | } |
544 | |
545 | static int qxl_update_surface(struct qxl_device *qdev, struct qxl_bo *surf) |
546 | { |
547 | struct qxl_rect rect; |
548 | int ret; |
549 | |
550 | /* if we are evicting, we need to make sure the surface is up |
551 | to date */ |
552 | rect.left = 0; |
553 | rect.right = surf->surf.width; |
554 | rect.top = 0; |
555 | rect.bottom = surf->surf.height; |
556 | retry: |
557 | ret = qxl_io_update_area(qdev, surf, area: &rect); |
558 | if (ret == -ERESTARTSYS) |
559 | goto retry; |
560 | return ret; |
561 | } |
562 | |
563 | static void qxl_surface_evict_locked(struct qxl_device *qdev, struct qxl_bo *surf, bool do_update_area) |
564 | { |
565 | /* no need to update area if we are just freeing the surface normally */ |
566 | if (do_update_area) |
567 | qxl_update_surface(qdev, surf); |
568 | |
569 | /* nuke the surface id at the hw */ |
570 | qxl_hw_surface_dealloc(qdev, surf); |
571 | } |
572 | |
573 | void qxl_surface_evict(struct qxl_device *qdev, struct qxl_bo *surf, bool do_update_area) |
574 | { |
575 | mutex_lock(&qdev->surf_evict_mutex); |
576 | qxl_surface_evict_locked(qdev, surf, do_update_area); |
577 | mutex_unlock(lock: &qdev->surf_evict_mutex); |
578 | } |
579 | |
580 | static int qxl_reap_surf(struct qxl_device *qdev, struct qxl_bo *surf, bool stall) |
581 | { |
582 | long ret; |
583 | |
584 | ret = qxl_bo_reserve(bo: surf); |
585 | if (ret) |
586 | return ret; |
587 | |
588 | if (stall) |
589 | mutex_unlock(lock: &qdev->surf_evict_mutex); |
590 | |
591 | if (stall) { |
592 | ret = dma_resv_wait_timeout(obj: surf->tbo.base.resv, |
593 | usage: DMA_RESV_USAGE_BOOKKEEP, intr: true, |
594 | timeout: 15 * HZ); |
595 | if (ret > 0) |
596 | ret = 0; |
597 | else if (ret == 0) |
598 | ret = -EBUSY; |
599 | } else { |
600 | ret = dma_resv_test_signaled(obj: surf->tbo.base.resv, |
601 | usage: DMA_RESV_USAGE_BOOKKEEP); |
602 | ret = ret ? -EBUSY : 0; |
603 | } |
604 | |
605 | if (stall) |
606 | mutex_lock(&qdev->surf_evict_mutex); |
607 | if (ret) { |
608 | qxl_bo_unreserve(bo: surf); |
609 | return ret; |
610 | } |
611 | |
612 | qxl_surface_evict_locked(qdev, surf, do_update_area: true); |
613 | qxl_bo_unreserve(bo: surf); |
614 | return 0; |
615 | } |
616 | |
617 | static int qxl_reap_surface_id(struct qxl_device *qdev, int max_to_reap) |
618 | { |
619 | int num_reaped = 0; |
620 | int i, ret; |
621 | bool stall = false; |
622 | int start = 0; |
623 | |
624 | mutex_lock(&qdev->surf_evict_mutex); |
625 | again: |
626 | |
627 | spin_lock(lock: &qdev->surf_id_idr_lock); |
628 | start = qdev->last_alloced_surf_id + 1; |
629 | spin_unlock(lock: &qdev->surf_id_idr_lock); |
630 | |
631 | for (i = start; i < start + qdev->rom->n_surfaces; i++) { |
632 | void *objptr; |
633 | int surfid = i % qdev->rom->n_surfaces; |
634 | |
635 | /* this avoids the case where the objects is in the |
636 | idr but has been evicted half way - its makes |
637 | the idr lookup atomic with the eviction */ |
638 | spin_lock(lock: &qdev->surf_id_idr_lock); |
639 | objptr = idr_find(&qdev->surf_id_idr, id: surfid); |
640 | spin_unlock(lock: &qdev->surf_id_idr_lock); |
641 | |
642 | if (!objptr) |
643 | continue; |
644 | |
645 | ret = qxl_reap_surf(qdev, surf: objptr, stall); |
646 | if (ret == 0) |
647 | num_reaped++; |
648 | if (num_reaped >= max_to_reap) |
649 | break; |
650 | } |
651 | if (num_reaped == 0 && stall == false) { |
652 | stall = true; |
653 | goto again; |
654 | } |
655 | |
656 | mutex_unlock(lock: &qdev->surf_evict_mutex); |
657 | if (num_reaped) { |
658 | usleep_range(min: 500, max: 1000); |
659 | qxl_queue_garbage_collect(qdev, flush: true); |
660 | } |
661 | |
662 | return 0; |
663 | } |
664 | |