| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * Copyright (C) 2013 NVIDIA Corporation |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef DRM_TEGRA_MIPI_PHY_H |
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| 7 | #define DRM_TEGRA_MIPI_PHY_H |
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| 8 | |
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| 9 | /* |
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| 10 | * D-PHY timing parameters |
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| 11 | * |
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| 12 | * A detailed description of these parameters can be found in the MIPI |
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| 13 | * Alliance Specification for D-PHY, Section 5.9 "Global Operation Timing |
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| 14 | * Parameters". |
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| 15 | * |
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| 16 | * All parameters are specified in nanoseconds. |
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| 17 | */ |
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| 18 | struct mipi_dphy_timing { |
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| 19 | unsigned int clkmiss; |
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| 20 | unsigned int clkpost; |
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| 21 | unsigned int clkpre; |
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| 22 | unsigned int clkprepare; |
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| 23 | unsigned int clksettle; |
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| 24 | unsigned int clktermen; |
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| 25 | unsigned int clktrail; |
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| 26 | unsigned int clkzero; |
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| 27 | unsigned int dtermen; |
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| 28 | unsigned int eot; |
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| 29 | unsigned int hsexit; |
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| 30 | unsigned int hsprepare; |
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| 31 | unsigned int hszero; |
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| 32 | unsigned int hssettle; |
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| 33 | unsigned int hsskip; |
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| 34 | unsigned int hstrail; |
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| 35 | unsigned int init; |
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| 36 | unsigned int lpx; |
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| 37 | unsigned int taget; |
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| 38 | unsigned int tago; |
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| 39 | unsigned int tasure; |
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| 40 | unsigned int wakeup; |
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| 41 | }; |
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| 42 | |
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| 43 | int mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing, |
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| 44 | unsigned long period); |
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| 45 | int mipi_dphy_timing_validate(struct mipi_dphy_timing *timing, |
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| 46 | unsigned long period); |
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| 47 | |
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| 48 | #endif |
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| 49 | |
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