1 | /* SPDX-License-Identifier: GPL-2.0 OR MIT */ |
2 | /* |
3 | * Copyright 2012-2021 VMware, Inc. |
4 | * |
5 | * Permission is hereby granted, free of charge, to any person |
6 | * obtaining a copy of this software and associated documentation |
7 | * files (the "Software"), to deal in the Software without |
8 | * restriction, including without limitation the rights to use, copy, |
9 | * modify, merge, publish, distribute, sublicense, and/or sell copies |
10 | * of the Software, and to permit persons to whom the Software is |
11 | * furnished to do so, subject to the following conditions: |
12 | * |
13 | * The above copyright notice and this permission notice shall be |
14 | * included in all copies or substantial portions of the Software. |
15 | * |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
17 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
19 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
20 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
21 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
23 | * SOFTWARE. |
24 | * |
25 | */ |
26 | |
27 | /* |
28 | * svga3d_dx.h -- |
29 | * |
30 | * SVGA 3d hardware definitions for DX10 support. |
31 | */ |
32 | |
33 | |
34 | |
35 | #ifndef _SVGA3D_DX_H_ |
36 | #define _SVGA3D_DX_H_ |
37 | |
38 | #include "svga_reg.h" |
39 | #include "svga3d_limits.h" |
40 | #include "svga3d_types.h" |
41 | |
42 | #define SVGA3D_INPUT_MIN 0 |
43 | #define SVGA3D_INPUT_PER_VERTEX_DATA 0 |
44 | #define SVGA3D_INPUT_PER_INSTANCE_DATA 1 |
45 | #define SVGA3D_INPUT_MAX 2 |
46 | typedef uint32 SVGA3dInputClassification; |
47 | |
48 | #define SVGA3D_COLOR_WRITE_ENABLE_RED (1 << 0) |
49 | #define SVGA3D_COLOR_WRITE_ENABLE_GREEN (1 << 1) |
50 | #define SVGA3D_COLOR_WRITE_ENABLE_BLUE (1 << 2) |
51 | #define SVGA3D_COLOR_WRITE_ENABLE_ALPHA (1 << 3) |
52 | #define SVGA3D_COLOR_WRITE_ENABLE_ALL \ |
53 | (SVGA3D_COLOR_WRITE_ENABLE_RED | SVGA3D_COLOR_WRITE_ENABLE_GREEN | \ |
54 | SVGA3D_COLOR_WRITE_ENABLE_BLUE | SVGA3D_COLOR_WRITE_ENABLE_ALPHA) |
55 | typedef uint8 SVGA3dColorWriteEnable; |
56 | |
57 | #define SVGA3D_DEPTH_WRITE_MASK_ZERO 0 |
58 | #define SVGA3D_DEPTH_WRITE_MASK_ALL 1 |
59 | typedef uint8 SVGA3dDepthWriteMask; |
60 | |
61 | #define SVGA3D_FILTER_MIP_LINEAR (1 << 0) |
62 | #define SVGA3D_FILTER_MAG_LINEAR (1 << 2) |
63 | #define SVGA3D_FILTER_MIN_LINEAR (1 << 4) |
64 | #define SVGA3D_FILTER_ANISOTROPIC (1 << 6) |
65 | #define SVGA3D_FILTER_COMPARE (1 << 7) |
66 | typedef uint32 SVGA3dFilter; |
67 | |
68 | #define SVGA3D_CULL_INVALID 0 |
69 | #define SVGA3D_CULL_MIN 1 |
70 | #define SVGA3D_CULL_NONE 1 |
71 | #define SVGA3D_CULL_FRONT 2 |
72 | #define SVGA3D_CULL_BACK 3 |
73 | #define SVGA3D_CULL_MAX 4 |
74 | typedef uint8 SVGA3dCullMode; |
75 | |
76 | #define SVGA3D_COMPARISON_INVALID 0 |
77 | #define SVGA3D_COMPARISON_MIN 1 |
78 | #define SVGA3D_COMPARISON_NEVER 1 |
79 | #define SVGA3D_COMPARISON_LESS 2 |
80 | #define SVGA3D_COMPARISON_EQUAL 3 |
81 | #define SVGA3D_COMPARISON_LESS_EQUAL 4 |
82 | #define SVGA3D_COMPARISON_GREATER 5 |
83 | #define SVGA3D_COMPARISON_NOT_EQUAL 6 |
84 | #define SVGA3D_COMPARISON_GREATER_EQUAL 7 |
85 | #define SVGA3D_COMPARISON_ALWAYS 8 |
86 | #define SVGA3D_COMPARISON_MAX 9 |
87 | typedef uint8 SVGA3dComparisonFunc; |
88 | |
89 | #define SVGA3D_MULTISAMPLE_RAST_DISABLE 0 |
90 | #define SVGA3D_MULTISAMPLE_RAST_ENABLE 1 |
91 | #define SVGA3D_MULTISAMPLE_RAST_DX_MAX 1 |
92 | #define SVGA3D_MULTISAMPLE_RAST_DISABLE_LINE 2 |
93 | #define SVGA3D_MULTISAMPLE_RAST_MAX 2 |
94 | typedef uint8 SVGA3dMultisampleRastEnable; |
95 | |
96 | #define SVGA3D_DX_MAX_VERTEXBUFFERS 32 |
97 | #define SVGA3D_DX_MAX_VERTEXINPUTREGISTERS 16 |
98 | #define SVGA3D_DX_SM41_MAX_VERTEXINPUTREGISTERS 32 |
99 | #define SVGA3D_DX_MAX_SOTARGETS 4 |
100 | #define SVGA3D_DX_MAX_SRVIEWS 128 |
101 | #define SVGA3D_DX_MAX_CONSTBUFFERS 16 |
102 | #define SVGA3D_DX_MAX_SAMPLERS 16 |
103 | #define SVGA3D_DX_MAX_CLASS_INSTANCES 253 |
104 | |
105 | #define SVGA3D_DX_MAX_CONSTBUF_BINDING_SIZE (4096 * 4 * (uint32)sizeof(uint32)) |
106 | |
107 | typedef uint32 SVGA3dShaderResourceViewId; |
108 | typedef uint32 SVGA3dRenderTargetViewId; |
109 | typedef uint32 SVGA3dDepthStencilViewId; |
110 | typedef uint32 SVGA3dUAViewId; |
111 | |
112 | typedef uint32 SVGA3dShaderId; |
113 | typedef uint32 SVGA3dElementLayoutId; |
114 | typedef uint32 SVGA3dSamplerId; |
115 | typedef uint32 SVGA3dBlendStateId; |
116 | typedef uint32 SVGA3dDepthStencilStateId; |
117 | typedef uint32 SVGA3dRasterizerStateId; |
118 | typedef uint32 SVGA3dQueryId; |
119 | typedef uint32 SVGA3dStreamOutputId; |
120 | |
121 | typedef union { |
122 | struct { |
123 | uint32 r; |
124 | uint32 g; |
125 | uint32 b; |
126 | uint32 a; |
127 | }; |
128 | |
129 | uint32 value[4]; |
130 | } SVGA3dRGBAUint32; |
131 | |
132 | #pragma pack(push, 1) |
133 | typedef struct { |
134 | uint32 cid; |
135 | SVGAMobId mobid; |
136 | } SVGAOTableDXContextEntry; |
137 | #pragma pack(pop) |
138 | |
139 | #pragma pack(push, 1) |
140 | typedef struct SVGA3dCmdDXDefineContext { |
141 | uint32 cid; |
142 | } SVGA3dCmdDXDefineContext; |
143 | #pragma pack(pop) |
144 | |
145 | #pragma pack(push, 1) |
146 | typedef struct SVGA3dCmdDXDestroyContext { |
147 | uint32 cid; |
148 | } SVGA3dCmdDXDestroyContext; |
149 | #pragma pack(pop) |
150 | |
151 | #pragma pack(push, 1) |
152 | typedef struct SVGA3dCmdDXBindContext { |
153 | uint32 cid; |
154 | SVGAMobId mobid; |
155 | uint32 validContents; |
156 | } SVGA3dCmdDXBindContext; |
157 | #pragma pack(pop) |
158 | |
159 | #pragma pack(push, 1) |
160 | typedef struct SVGA3dCmdDXReadbackContext { |
161 | uint32 cid; |
162 | } SVGA3dCmdDXReadbackContext; |
163 | #pragma pack(pop) |
164 | |
165 | #pragma pack(push, 1) |
166 | typedef struct SVGA3dCmdDXInvalidateContext { |
167 | uint32 cid; |
168 | } SVGA3dCmdDXInvalidateContext; |
169 | #pragma pack(pop) |
170 | |
171 | #pragma pack(push, 1) |
172 | typedef struct SVGA3dCmdDXSetSingleConstantBuffer { |
173 | uint32 slot; |
174 | SVGA3dShaderType type; |
175 | SVGA3dSurfaceId sid; |
176 | uint32 offsetInBytes; |
177 | uint32 sizeInBytes; |
178 | } SVGA3dCmdDXSetSingleConstantBuffer; |
179 | #pragma pack(pop) |
180 | |
181 | #pragma pack(push, 1) |
182 | typedef struct SVGA3dCmdDXSetShaderResources { |
183 | uint32 startView; |
184 | SVGA3dShaderType type; |
185 | |
186 | } SVGA3dCmdDXSetShaderResources; |
187 | #pragma pack(pop) |
188 | |
189 | #pragma pack(push, 1) |
190 | typedef struct SVGA3dCmdDXSetShader { |
191 | SVGA3dShaderId shaderId; |
192 | SVGA3dShaderType type; |
193 | } SVGA3dCmdDXSetShader; |
194 | #pragma pack(pop) |
195 | |
196 | typedef union { |
197 | struct { |
198 | uint32 cbOffset : 12; |
199 | uint32 cbId : 4; |
200 | uint32 baseSamp : 4; |
201 | uint32 baseTex : 7; |
202 | uint32 reserved : 5; |
203 | }; |
204 | uint32 value; |
205 | } SVGA3dIfaceData; |
206 | |
207 | #pragma pack(push, 1) |
208 | typedef struct SVGA3dCmdDXSetShaderIface { |
209 | SVGA3dShaderType type; |
210 | uint32 numClassInstances; |
211 | uint32 index; |
212 | uint32 iface; |
213 | SVGA3dIfaceData data; |
214 | } SVGA3dCmdDXSetShaderIface; |
215 | #pragma pack(pop) |
216 | |
217 | #pragma pack(push, 1) |
218 | typedef struct SVGA3dCmdDXBindShaderIface { |
219 | uint32 cid; |
220 | SVGAMobId mobid; |
221 | uint32 offsetInBytes; |
222 | } SVGA3dCmdDXBindShaderIface; |
223 | #pragma pack(pop) |
224 | |
225 | #pragma pack(push, 1) |
226 | typedef struct SVGA3dCmdDXSetSamplers { |
227 | uint32 startSampler; |
228 | SVGA3dShaderType type; |
229 | |
230 | } SVGA3dCmdDXSetSamplers; |
231 | #pragma pack(pop) |
232 | |
233 | #pragma pack(push, 1) |
234 | typedef struct SVGA3dCmdDXDraw { |
235 | uint32 vertexCount; |
236 | uint32 startVertexLocation; |
237 | } SVGA3dCmdDXDraw; |
238 | #pragma pack(pop) |
239 | |
240 | #pragma pack(push, 1) |
241 | typedef struct SVGA3dCmdDXDrawIndexed { |
242 | uint32 indexCount; |
243 | uint32 startIndexLocation; |
244 | int32 baseVertexLocation; |
245 | } SVGA3dCmdDXDrawIndexed; |
246 | #pragma pack(pop) |
247 | |
248 | #pragma pack(push, 1) |
249 | typedef struct SVGA3dCmdDXDrawInstanced { |
250 | uint32 vertexCountPerInstance; |
251 | uint32 instanceCount; |
252 | uint32 startVertexLocation; |
253 | uint32 startInstanceLocation; |
254 | } SVGA3dCmdDXDrawInstanced; |
255 | #pragma pack(pop) |
256 | |
257 | #pragma pack(push, 1) |
258 | typedef struct SVGA3dCmdDXDrawIndexedInstanced { |
259 | uint32 indexCountPerInstance; |
260 | uint32 instanceCount; |
261 | uint32 startIndexLocation; |
262 | int32 baseVertexLocation; |
263 | uint32 startInstanceLocation; |
264 | } SVGA3dCmdDXDrawIndexedInstanced; |
265 | #pragma pack(pop) |
266 | |
267 | #pragma pack(push, 1) |
268 | typedef struct SVGA3dCmdDXDrawIndexedInstancedIndirect { |
269 | SVGA3dSurfaceId argsBufferSid; |
270 | uint32 byteOffsetForArgs; |
271 | } SVGA3dCmdDXDrawIndexedInstancedIndirect; |
272 | #pragma pack(pop) |
273 | |
274 | #pragma pack(push, 1) |
275 | typedef struct SVGA3dCmdDXDrawInstancedIndirect { |
276 | SVGA3dSurfaceId argsBufferSid; |
277 | uint32 byteOffsetForArgs; |
278 | } SVGA3dCmdDXDrawInstancedIndirect; |
279 | #pragma pack(pop) |
280 | |
281 | #pragma pack(push, 1) |
282 | typedef struct SVGA3dCmdDXDrawAuto { |
283 | uint32 pad0; |
284 | } SVGA3dCmdDXDrawAuto; |
285 | #pragma pack(pop) |
286 | |
287 | #pragma pack(push, 1) |
288 | typedef struct SVGA3dCmdDXDispatch { |
289 | uint32 threadGroupCountX; |
290 | uint32 threadGroupCountY; |
291 | uint32 threadGroupCountZ; |
292 | } SVGA3dCmdDXDispatch; |
293 | #pragma pack(pop) |
294 | |
295 | #pragma pack(push, 1) |
296 | typedef struct SVGA3dCmdDXDispatchIndirect { |
297 | SVGA3dSurfaceId argsBufferSid; |
298 | uint32 byteOffsetForArgs; |
299 | } SVGA3dCmdDXDispatchIndirect; |
300 | #pragma pack(pop) |
301 | |
302 | #pragma pack(push, 1) |
303 | typedef struct SVGA3dCmdDXSetInputLayout { |
304 | SVGA3dElementLayoutId elementLayoutId; |
305 | } SVGA3dCmdDXSetInputLayout; |
306 | #pragma pack(pop) |
307 | |
308 | #pragma pack(push, 1) |
309 | typedef struct SVGA3dVertexBuffer { |
310 | SVGA3dSurfaceId sid; |
311 | uint32 stride; |
312 | uint32 offset; |
313 | } SVGA3dVertexBuffer; |
314 | #pragma pack(pop) |
315 | |
316 | #pragma pack(push, 1) |
317 | typedef struct SVGA3dCmdDXSetVertexBuffers { |
318 | uint32 startBuffer; |
319 | |
320 | } SVGA3dCmdDXSetVertexBuffers; |
321 | #pragma pack(pop) |
322 | |
323 | #pragma pack(push, 1) |
324 | typedef struct SVGA3dVertexBuffer_v2 { |
325 | SVGA3dSurfaceId sid; |
326 | uint32 stride; |
327 | uint32 offset; |
328 | uint32 sizeInBytes; |
329 | } SVGA3dVertexBuffer_v2; |
330 | #pragma pack(pop) |
331 | |
332 | #pragma pack(push, 1) |
333 | typedef struct SVGA3dCmdDXSetVertexBuffers_v2 { |
334 | uint32 startBuffer; |
335 | |
336 | } SVGA3dCmdDXSetVertexBuffers_v2; |
337 | #pragma pack(pop) |
338 | |
339 | #pragma pack(push, 1) |
340 | typedef struct SVGA3dVertexBufferOffsetAndSize { |
341 | uint32 stride; |
342 | uint32 offset; |
343 | uint32 sizeInBytes; |
344 | } SVGA3dVertexBufferOffsetAndSize; |
345 | #pragma pack(pop) |
346 | |
347 | #pragma pack(push, 1) |
348 | typedef struct SVGA3dCmdDXSetVertexBuffersOffsetAndSize { |
349 | uint32 startBuffer; |
350 | |
351 | } SVGA3dCmdDXSetVertexBuffersOffsetAndSize; |
352 | #pragma pack(pop) |
353 | |
354 | #pragma pack(push, 1) |
355 | typedef struct SVGA3dCmdDXSetIndexBuffer { |
356 | SVGA3dSurfaceId sid; |
357 | SVGA3dSurfaceFormat format; |
358 | uint32 offset; |
359 | } SVGA3dCmdDXSetIndexBuffer; |
360 | #pragma pack(pop) |
361 | |
362 | #pragma pack(push, 1) |
363 | typedef struct SVGA3dCmdDXSetIndexBuffer_v2 { |
364 | SVGA3dSurfaceId sid; |
365 | SVGA3dSurfaceFormat format; |
366 | uint32 offset; |
367 | uint32 sizeInBytes; |
368 | } SVGA3dCmdDXSetIndexBuffer_v2; |
369 | #pragma pack(pop) |
370 | |
371 | #pragma pack(push, 1) |
372 | typedef struct SVGA3dCmdDXSetIndexBufferOffsetAndSize { |
373 | SVGA3dSurfaceFormat format; |
374 | uint32 offset; |
375 | uint32 sizeInBytes; |
376 | } SVGA3dCmdDXSetIndexBufferOffsetAndSize; |
377 | #pragma pack(pop) |
378 | |
379 | #pragma pack(push, 1) |
380 | typedef struct SVGA3dCmdDXSetTopology { |
381 | SVGA3dPrimitiveType topology; |
382 | } SVGA3dCmdDXSetTopology; |
383 | #pragma pack(pop) |
384 | |
385 | #pragma pack(push, 1) |
386 | typedef struct SVGA3dCmdDXSetRenderTargets { |
387 | SVGA3dDepthStencilViewId depthStencilViewId; |
388 | |
389 | } SVGA3dCmdDXSetRenderTargets; |
390 | #pragma pack(pop) |
391 | |
392 | #pragma pack(push, 1) |
393 | typedef struct SVGA3dCmdDXSetBlendState { |
394 | SVGA3dBlendStateId blendId; |
395 | float blendFactor[4]; |
396 | uint32 sampleMask; |
397 | } SVGA3dCmdDXSetBlendState; |
398 | #pragma pack(pop) |
399 | |
400 | #pragma pack(push, 1) |
401 | typedef struct SVGA3dCmdDXSetDepthStencilState { |
402 | SVGA3dDepthStencilStateId depthStencilId; |
403 | uint32 stencilRef; |
404 | } SVGA3dCmdDXSetDepthStencilState; |
405 | #pragma pack(pop) |
406 | |
407 | #pragma pack(push, 1) |
408 | typedef struct SVGA3dCmdDXSetRasterizerState { |
409 | SVGA3dRasterizerStateId rasterizerId; |
410 | } SVGA3dCmdDXSetRasterizerState; |
411 | #pragma pack(pop) |
412 | |
413 | #define SVGA3D_DXQUERY_FLAG_PREDICATEHINT (1 << 0) |
414 | typedef uint32 SVGA3dDXQueryFlags; |
415 | |
416 | #define SVGADX_QDSTATE_INVALID ((uint8)-1) |
417 | #define SVGADX_QDSTATE_MIN 0 |
418 | #define SVGADX_QDSTATE_IDLE 0 |
419 | #define SVGADX_QDSTATE_ACTIVE 1 |
420 | #define SVGADX_QDSTATE_PENDING 2 |
421 | #define SVGADX_QDSTATE_FINISHED 3 |
422 | #define SVGADX_QDSTATE_MAX 4 |
423 | typedef uint8 SVGADXQueryDeviceState; |
424 | |
425 | #pragma pack(push, 1) |
426 | typedef struct { |
427 | SVGA3dQueryTypeUint8 type; |
428 | uint16 pad0; |
429 | SVGADXQueryDeviceState state; |
430 | SVGA3dDXQueryFlags flags; |
431 | SVGAMobId mobid; |
432 | uint32 offset; |
433 | } SVGACOTableDXQueryEntry; |
434 | #pragma pack(pop) |
435 | |
436 | #pragma pack(push, 1) |
437 | typedef struct SVGA3dCmdDXDefineQuery { |
438 | SVGA3dQueryId queryId; |
439 | SVGA3dQueryType type; |
440 | SVGA3dDXQueryFlags flags; |
441 | } SVGA3dCmdDXDefineQuery; |
442 | #pragma pack(pop) |
443 | |
444 | #pragma pack(push, 1) |
445 | typedef struct SVGA3dCmdDXDestroyQuery { |
446 | SVGA3dQueryId queryId; |
447 | } SVGA3dCmdDXDestroyQuery; |
448 | #pragma pack(pop) |
449 | |
450 | #pragma pack(push, 1) |
451 | typedef struct SVGA3dCmdDXBindQuery { |
452 | SVGA3dQueryId queryId; |
453 | SVGAMobId mobid; |
454 | } SVGA3dCmdDXBindQuery; |
455 | #pragma pack(pop) |
456 | |
457 | #pragma pack(push, 1) |
458 | typedef struct SVGA3dCmdDXSetQueryOffset { |
459 | SVGA3dQueryId queryId; |
460 | uint32 mobOffset; |
461 | } SVGA3dCmdDXSetQueryOffset; |
462 | #pragma pack(pop) |
463 | |
464 | #pragma pack(push, 1) |
465 | typedef struct SVGA3dCmdDXBeginQuery { |
466 | SVGA3dQueryId queryId; |
467 | } SVGA3dCmdDXBeginQuery; |
468 | #pragma pack(pop) |
469 | |
470 | #pragma pack(push, 1) |
471 | typedef struct SVGA3dCmdDXEndQuery { |
472 | SVGA3dQueryId queryId; |
473 | } SVGA3dCmdDXEndQuery; |
474 | #pragma pack(pop) |
475 | |
476 | #pragma pack(push, 1) |
477 | typedef struct SVGA3dCmdDXReadbackQuery { |
478 | SVGA3dQueryId queryId; |
479 | } SVGA3dCmdDXReadbackQuery; |
480 | #pragma pack(pop) |
481 | |
482 | #pragma pack(push, 1) |
483 | typedef struct SVGA3dCmdDXMoveQuery { |
484 | SVGA3dQueryId queryId; |
485 | SVGAMobId mobid; |
486 | uint32 mobOffset; |
487 | } SVGA3dCmdDXMoveQuery; |
488 | #pragma pack(pop) |
489 | |
490 | #pragma pack(push, 1) |
491 | typedef struct SVGA3dCmdDXBindAllQuery { |
492 | uint32 cid; |
493 | SVGAMobId mobid; |
494 | } SVGA3dCmdDXBindAllQuery; |
495 | #pragma pack(pop) |
496 | |
497 | #pragma pack(push, 1) |
498 | typedef struct SVGA3dCmdDXReadbackAllQuery { |
499 | uint32 cid; |
500 | } SVGA3dCmdDXReadbackAllQuery; |
501 | #pragma pack(pop) |
502 | |
503 | #pragma pack(push, 1) |
504 | typedef struct SVGA3dCmdDXSetPredication { |
505 | SVGA3dQueryId queryId; |
506 | uint32 predicateValue; |
507 | } SVGA3dCmdDXSetPredication; |
508 | #pragma pack(pop) |
509 | |
510 | #pragma pack(push, 1) |
511 | typedef struct SVGA3dDXSOState { |
512 | uint32 offset; |
513 | uint32 intOffset; |
514 | uint32 dead1; |
515 | uint32 dead2; |
516 | } SVGA3dDXSOState; |
517 | #pragma pack(pop) |
518 | |
519 | #define SVGA3D_DX_SO_OFFSET_APPEND ((uint32)~0u) |
520 | |
521 | #pragma pack(push, 1) |
522 | typedef struct SVGA3dSoTarget { |
523 | SVGA3dSurfaceId sid; |
524 | uint32 offset; |
525 | uint32 sizeInBytes; |
526 | } SVGA3dSoTarget; |
527 | #pragma pack(pop) |
528 | |
529 | #pragma pack(push, 1) |
530 | typedef struct SVGA3dCmdDXSetSOTargets { |
531 | uint32 pad0; |
532 | |
533 | } SVGA3dCmdDXSetSOTargets; |
534 | #pragma pack(pop) |
535 | |
536 | #pragma pack(push, 1) |
537 | typedef struct SVGA3dViewport { |
538 | float x; |
539 | float y; |
540 | float width; |
541 | float height; |
542 | float minDepth; |
543 | float maxDepth; |
544 | } SVGA3dViewport; |
545 | #pragma pack(pop) |
546 | |
547 | #pragma pack(push, 1) |
548 | typedef struct SVGA3dCmdDXSetViewports { |
549 | uint32 pad0; |
550 | |
551 | } SVGA3dCmdDXSetViewports; |
552 | #pragma pack(pop) |
553 | |
554 | #define SVGA3D_DX_MAX_VIEWPORTS 16 |
555 | |
556 | #pragma pack(push, 1) |
557 | typedef struct SVGA3dCmdDXSetScissorRects { |
558 | uint32 pad0; |
559 | |
560 | } SVGA3dCmdDXSetScissorRects; |
561 | #pragma pack(pop) |
562 | |
563 | #define SVGA3D_DX_MAX_SCISSORRECTS 16 |
564 | |
565 | #pragma pack(push, 1) |
566 | typedef struct SVGA3dCmdDXClearRenderTargetView { |
567 | SVGA3dRenderTargetViewId renderTargetViewId; |
568 | SVGA3dRGBAFloat rgba; |
569 | } SVGA3dCmdDXClearRenderTargetView; |
570 | #pragma pack(pop) |
571 | |
572 | #pragma pack(push, 1) |
573 | typedef struct SVGA3dCmdDXClearDepthStencilView { |
574 | uint16 flags; |
575 | uint16 stencil; |
576 | SVGA3dDepthStencilViewId depthStencilViewId; |
577 | float depth; |
578 | } SVGA3dCmdDXClearDepthStencilView; |
579 | #pragma pack(pop) |
580 | |
581 | #pragma pack(push, 1) |
582 | typedef struct SVGA3dCmdDXPredCopyRegion { |
583 | SVGA3dSurfaceId dstSid; |
584 | uint32 dstSubResource; |
585 | SVGA3dSurfaceId srcSid; |
586 | uint32 srcSubResource; |
587 | SVGA3dCopyBox box; |
588 | } SVGA3dCmdDXPredCopyRegion; |
589 | #pragma pack(pop) |
590 | |
591 | #pragma pack(push, 1) |
592 | typedef struct SVGA3dCmdDXPredStagingCopyRegion { |
593 | SVGA3dSurfaceId dstSid; |
594 | uint32 dstSubResource; |
595 | SVGA3dSurfaceId srcSid; |
596 | uint32 srcSubResource; |
597 | SVGA3dCopyBox box; |
598 | uint8 readback; |
599 | uint8 unsynchronized; |
600 | uint8 mustBeZero[2]; |
601 | } SVGA3dCmdDXPredStagingCopyRegion; |
602 | #pragma pack(pop) |
603 | |
604 | #pragma pack(push, 1) |
605 | typedef struct SVGA3dCmdDXPredCopy { |
606 | SVGA3dSurfaceId dstSid; |
607 | SVGA3dSurfaceId srcSid; |
608 | } SVGA3dCmdDXPredCopy; |
609 | #pragma pack(pop) |
610 | |
611 | #pragma pack(push, 1) |
612 | typedef struct SVGA3dCmdDXPredConvertRegion { |
613 | SVGA3dSurfaceId dstSid; |
614 | uint32 dstSubResource; |
615 | SVGA3dBox destBox; |
616 | SVGA3dSurfaceId srcSid; |
617 | uint32 srcSubResource; |
618 | SVGA3dBox srcBox; |
619 | } SVGA3dCmdDXPredConvertRegion; |
620 | #pragma pack(pop) |
621 | |
622 | #pragma pack(push, 1) |
623 | typedef struct SVGA3dCmdDXPredStagingConvertRegion { |
624 | SVGA3dSurfaceId dstSid; |
625 | uint32 dstSubResource; |
626 | SVGA3dBox destBox; |
627 | SVGA3dSurfaceId srcSid; |
628 | uint32 srcSubResource; |
629 | SVGA3dBox srcBox; |
630 | uint8 readback; |
631 | uint8 unsynchronized; |
632 | uint8 mustBeZero[2]; |
633 | } SVGA3dCmdDXPredStagingConvertRegion; |
634 | #pragma pack(pop) |
635 | |
636 | #pragma pack(push, 1) |
637 | typedef struct SVGA3dCmdDXPredConvert { |
638 | SVGA3dSurfaceId dstSid; |
639 | SVGA3dSurfaceId srcSid; |
640 | } SVGA3dCmdDXPredConvert; |
641 | #pragma pack(pop) |
642 | |
643 | #pragma pack(push, 1) |
644 | typedef struct SVGA3dCmdDXPredStagingConvert { |
645 | SVGA3dSurfaceId dstSid; |
646 | SVGA3dSurfaceId srcSid; |
647 | uint8 readback; |
648 | uint8 unsynchronized; |
649 | uint8 mustBeZero[2]; |
650 | } SVGA3dCmdDXPredStagingConvert; |
651 | #pragma pack(pop) |
652 | |
653 | #pragma pack(push, 1) |
654 | typedef struct SVGA3dCmdDXBufferCopy { |
655 | SVGA3dSurfaceId dest; |
656 | SVGA3dSurfaceId src; |
657 | uint32 destX; |
658 | uint32 srcX; |
659 | uint32 width; |
660 | } SVGA3dCmdDXBufferCopy; |
661 | #pragma pack(pop) |
662 | |
663 | #pragma pack(push, 1) |
664 | typedef struct SVGA3dCmdDXStagingBufferCopy { |
665 | SVGA3dSurfaceId dest; |
666 | SVGA3dSurfaceId src; |
667 | uint32 destX; |
668 | uint32 srcX; |
669 | uint32 width; |
670 | uint8 readback; |
671 | uint8 unsynchronized; |
672 | uint8 mustBeZero[2]; |
673 | } SVGA3dCmdDXStagingBufferCopy; |
674 | #pragma pack(pop) |
675 | |
676 | #pragma pack(push, 1) |
677 | typedef struct { |
678 | SVGA3dSurfaceId dstSid; |
679 | uint32 dstSubResource; |
680 | SVGA3dSurfaceId srcSid; |
681 | uint32 srcSubResource; |
682 | SVGA3dSurfaceFormat copyFormat; |
683 | } SVGA3dCmdDXResolveCopy; |
684 | #pragma pack(pop) |
685 | |
686 | #pragma pack(push, 1) |
687 | typedef struct { |
688 | SVGA3dSurfaceId dstSid; |
689 | uint32 dstSubResource; |
690 | SVGA3dSurfaceId srcSid; |
691 | uint32 srcSubResource; |
692 | SVGA3dSurfaceFormat copyFormat; |
693 | } SVGA3dCmdDXPredResolveCopy; |
694 | #pragma pack(pop) |
695 | |
696 | typedef uint32 SVGA3dDXPresentBltMode; |
697 | #define SVGADX_PRESENTBLT_LINEAR (1 << 0) |
698 | #define SVGADX_PRESENTBLT_FORCE_SRC_SRGB (1 << 1) |
699 | #define SVGADX_PRESENTBLT_FORCE_SRC_XRBIAS (1 << 2) |
700 | #define SVGADX_PRESENTBLT_MODE_MAX (1 << 3) |
701 | |
702 | #pragma pack(push, 1) |
703 | typedef struct SVGA3dCmdDXPresentBlt { |
704 | SVGA3dSurfaceId srcSid; |
705 | uint32 srcSubResource; |
706 | SVGA3dSurfaceId dstSid; |
707 | uint32 destSubResource; |
708 | SVGA3dBox boxSrc; |
709 | SVGA3dBox boxDest; |
710 | SVGA3dDXPresentBltMode mode; |
711 | } SVGA3dCmdDXPresentBlt; |
712 | #pragma pack(pop) |
713 | |
714 | #pragma pack(push, 1) |
715 | typedef struct SVGA3dCmdDXGenMips { |
716 | SVGA3dShaderResourceViewId shaderResourceViewId; |
717 | } SVGA3dCmdDXGenMips; |
718 | #pragma pack(pop) |
719 | |
720 | #pragma pack(push, 1) |
721 | typedef struct SVGA3dCmdDXUpdateSubResource { |
722 | SVGA3dSurfaceId sid; |
723 | uint32 subResource; |
724 | SVGA3dBox box; |
725 | } SVGA3dCmdDXUpdateSubResource; |
726 | #pragma pack(pop) |
727 | |
728 | #pragma pack(push, 1) |
729 | typedef struct SVGA3dCmdDXReadbackSubResource { |
730 | SVGA3dSurfaceId sid; |
731 | uint32 subResource; |
732 | } SVGA3dCmdDXReadbackSubResource; |
733 | #pragma pack(pop) |
734 | |
735 | #pragma pack(push, 1) |
736 | typedef struct SVGA3dCmdDXInvalidateSubResource { |
737 | SVGA3dSurfaceId sid; |
738 | uint32 subResource; |
739 | } SVGA3dCmdDXInvalidateSubResource; |
740 | #pragma pack(pop) |
741 | |
742 | #pragma pack(push, 1) |
743 | typedef struct SVGA3dCmdDXTransferFromBuffer { |
744 | SVGA3dSurfaceId srcSid; |
745 | uint32 srcOffset; |
746 | uint32 srcPitch; |
747 | uint32 srcSlicePitch; |
748 | SVGA3dSurfaceId destSid; |
749 | uint32 destSubResource; |
750 | SVGA3dBox destBox; |
751 | } SVGA3dCmdDXTransferFromBuffer; |
752 | #pragma pack(pop) |
753 | |
754 | #define SVGA3D_TRANSFER_TO_BUFFER_READBACK (1 << 0) |
755 | #define SVGA3D_TRANSFER_TO_BUFFER_FLAGS_MASK (1 << 0) |
756 | typedef uint32 SVGA3dTransferToBufferFlags; |
757 | |
758 | #pragma pack(push, 1) |
759 | typedef struct SVGA3dCmdDXTransferToBuffer { |
760 | SVGA3dSurfaceId srcSid; |
761 | uint32 srcSubResource; |
762 | SVGA3dBox srcBox; |
763 | SVGA3dSurfaceId destSid; |
764 | uint32 destOffset; |
765 | uint32 destPitch; |
766 | uint32 destSlicePitch; |
767 | SVGA3dTransferToBufferFlags flags; |
768 | } SVGA3dCmdDXTransferToBuffer; |
769 | #pragma pack(pop) |
770 | |
771 | #pragma pack(push, 1) |
772 | typedef struct SVGA3dCmdDXPredTransferFromBuffer { |
773 | SVGA3dSurfaceId srcSid; |
774 | uint32 srcOffset; |
775 | uint32 srcPitch; |
776 | uint32 srcSlicePitch; |
777 | SVGA3dSurfaceId destSid; |
778 | uint32 destSubResource; |
779 | SVGA3dBox destBox; |
780 | } SVGA3dCmdDXPredTransferFromBuffer; |
781 | #pragma pack(pop) |
782 | |
783 | #pragma pack(push, 1) |
784 | typedef struct SVGA3dCmdDXSurfaceCopyAndReadback { |
785 | SVGA3dSurfaceId srcSid; |
786 | SVGA3dSurfaceId destSid; |
787 | SVGA3dCopyBox box; |
788 | } SVGA3dCmdDXSurfaceCopyAndReadback; |
789 | #pragma pack(pop) |
790 | |
791 | typedef uint32 SVGADXHintId; |
792 | #define SVGA_DX_HINT_NONE 0 |
793 | #define SVGA_DX_HINT_PREFETCH_OBJECT 1 |
794 | #define SVGA_DX_HINT_PREEVICT_OBJECT 2 |
795 | #define SVGA_DX_HINT_PREFETCH_COBJECT 3 |
796 | #define SVGA_DX_HINT_PREEVICT_COBJECT 4 |
797 | #define SVGA_DX_HINT_MAX 5 |
798 | |
799 | #pragma pack(push, 1) |
800 | typedef struct SVGAObjectRef { |
801 | SVGAOTableType type; |
802 | uint32 id; |
803 | } SVGAObjectRef; |
804 | #pragma pack(pop) |
805 | |
806 | #pragma pack(push, 1) |
807 | typedef struct SVGACObjectRef { |
808 | SVGACOTableType type; |
809 | uint32 cid; |
810 | uint32 id; |
811 | } SVGACObjectRef; |
812 | #pragma pack(pop) |
813 | |
814 | #pragma pack(push, 1) |
815 | typedef struct SVGA3dCmdDXHint { |
816 | SVGADXHintId hintId; |
817 | |
818 | } SVGA3dCmdDXHint; |
819 | #pragma pack(pop) |
820 | |
821 | #pragma pack(push, 1) |
822 | typedef struct SVGA3dCmdDXBufferUpdate { |
823 | SVGA3dSurfaceId sid; |
824 | uint32 x; |
825 | uint32 width; |
826 | } SVGA3dCmdDXBufferUpdate; |
827 | #pragma pack(pop) |
828 | |
829 | #pragma pack(push, 1) |
830 | typedef struct SVGA3dCmdDXSetConstantBufferOffset { |
831 | uint32 slot; |
832 | uint32 offsetInBytes; |
833 | } SVGA3dCmdDXSetConstantBufferOffset; |
834 | #pragma pack(pop) |
835 | |
836 | typedef SVGA3dCmdDXSetConstantBufferOffset SVGA3dCmdDXSetVSConstantBufferOffset; |
837 | |
838 | typedef SVGA3dCmdDXSetConstantBufferOffset SVGA3dCmdDXSetPSConstantBufferOffset; |
839 | |
840 | typedef SVGA3dCmdDXSetConstantBufferOffset SVGA3dCmdDXSetGSConstantBufferOffset; |
841 | |
842 | typedef SVGA3dCmdDXSetConstantBufferOffset SVGA3dCmdDXSetHSConstantBufferOffset; |
843 | |
844 | typedef SVGA3dCmdDXSetConstantBufferOffset SVGA3dCmdDXSetDSConstantBufferOffset; |
845 | |
846 | typedef SVGA3dCmdDXSetConstantBufferOffset SVGA3dCmdDXSetCSConstantBufferOffset; |
847 | |
848 | #define SVGA3D_BUFFEREX_SRV_RAW (1 << 0) |
849 | #define SVGA3D_BUFFEREX_SRV_FLAGS_MAX (1 << 1) |
850 | #define SVGA3D_BUFFEREX_SRV_FLAGS_MASK (SVGA3D_BUFFEREX_SRV_FLAGS_MAX - 1) |
851 | typedef uint32 SVGA3dBufferExFlags; |
852 | |
853 | #pragma pack(push, 1) |
854 | typedef struct { |
855 | union { |
856 | struct { |
857 | uint32 firstElement; |
858 | uint32 numElements; |
859 | uint32 pad0; |
860 | uint32 pad1; |
861 | } buffer; |
862 | struct { |
863 | uint32 mostDetailedMip; |
864 | uint32 firstArraySlice; |
865 | uint32 mipLevels; |
866 | uint32 arraySize; |
867 | } tex; |
868 | struct { |
869 | uint32 firstElement; |
870 | uint32 numElements; |
871 | SVGA3dBufferExFlags flags; |
872 | uint32 pad0; |
873 | } bufferex; |
874 | }; |
875 | } SVGA3dShaderResourceViewDesc; |
876 | #pragma pack(pop) |
877 | |
878 | #pragma pack(push, 1) |
879 | typedef struct { |
880 | SVGA3dSurfaceId sid; |
881 | SVGA3dSurfaceFormat format; |
882 | SVGA3dResourceType resourceDimension; |
883 | SVGA3dShaderResourceViewDesc desc; |
884 | uint32 pad; |
885 | } SVGACOTableDXSRViewEntry; |
886 | #pragma pack(pop) |
887 | |
888 | #pragma pack(push, 1) |
889 | typedef struct SVGA3dCmdDXDefineShaderResourceView { |
890 | SVGA3dShaderResourceViewId shaderResourceViewId; |
891 | |
892 | SVGA3dSurfaceId sid; |
893 | SVGA3dSurfaceFormat format; |
894 | SVGA3dResourceType resourceDimension; |
895 | |
896 | SVGA3dShaderResourceViewDesc desc; |
897 | } SVGA3dCmdDXDefineShaderResourceView; |
898 | #pragma pack(pop) |
899 | |
900 | #pragma pack(push, 1) |
901 | typedef struct SVGA3dCmdDXDestroyShaderResourceView { |
902 | SVGA3dShaderResourceViewId shaderResourceViewId; |
903 | } SVGA3dCmdDXDestroyShaderResourceView; |
904 | #pragma pack(pop) |
905 | |
906 | #pragma pack(push, 1) |
907 | typedef struct SVGA3dRenderTargetViewDesc { |
908 | union { |
909 | struct { |
910 | uint32 firstElement; |
911 | uint32 numElements; |
912 | uint32 padding0; |
913 | } buffer; |
914 | struct { |
915 | uint32 mipSlice; |
916 | uint32 firstArraySlice; |
917 | uint32 arraySize; |
918 | } tex; |
919 | struct { |
920 | uint32 mipSlice; |
921 | uint32 firstW; |
922 | uint32 wSize; |
923 | } tex3D; |
924 | }; |
925 | } SVGA3dRenderTargetViewDesc; |
926 | #pragma pack(pop) |
927 | |
928 | #pragma pack(push, 1) |
929 | typedef struct { |
930 | SVGA3dSurfaceId sid; |
931 | SVGA3dSurfaceFormat format; |
932 | SVGA3dResourceType resourceDimension; |
933 | SVGA3dRenderTargetViewDesc desc; |
934 | uint32 pad[2]; |
935 | } SVGACOTableDXRTViewEntry; |
936 | #pragma pack(pop) |
937 | |
938 | #pragma pack(push, 1) |
939 | typedef struct SVGA3dCmdDXDefineRenderTargetView { |
940 | SVGA3dRenderTargetViewId renderTargetViewId; |
941 | |
942 | SVGA3dSurfaceId sid; |
943 | SVGA3dSurfaceFormat format; |
944 | SVGA3dResourceType resourceDimension; |
945 | |
946 | SVGA3dRenderTargetViewDesc desc; |
947 | } SVGA3dCmdDXDefineRenderTargetView; |
948 | #pragma pack(pop) |
949 | |
950 | #pragma pack(push, 1) |
951 | typedef struct SVGA3dCmdDXDestroyRenderTargetView { |
952 | SVGA3dRenderTargetViewId renderTargetViewId; |
953 | } SVGA3dCmdDXDestroyRenderTargetView; |
954 | #pragma pack(pop) |
955 | |
956 | #define SVGA3D_DXDSVIEW_CREATE_READ_ONLY_DEPTH 0x01 |
957 | #define SVGA3D_DXDSVIEW_CREATE_READ_ONLY_STENCIL 0x02 |
958 | #define SVGA3D_DXDSVIEW_CREATE_FLAG_MASK 0x03 |
959 | typedef uint8 SVGA3DCreateDSViewFlags; |
960 | |
961 | #pragma pack(push, 1) |
962 | typedef struct { |
963 | SVGA3dSurfaceId sid; |
964 | SVGA3dSurfaceFormat format; |
965 | SVGA3dResourceType resourceDimension; |
966 | uint32 mipSlice; |
967 | uint32 firstArraySlice; |
968 | uint32 arraySize; |
969 | SVGA3DCreateDSViewFlags flags; |
970 | uint8 pad0; |
971 | uint16 pad1; |
972 | uint32 pad2; |
973 | } SVGACOTableDXDSViewEntry; |
974 | #pragma pack(pop) |
975 | |
976 | #pragma pack(push, 1) |
977 | typedef struct SVGA3dCmdDXDefineDepthStencilView { |
978 | SVGA3dDepthStencilViewId depthStencilViewId; |
979 | |
980 | SVGA3dSurfaceId sid; |
981 | SVGA3dSurfaceFormat format; |
982 | SVGA3dResourceType resourceDimension; |
983 | uint32 mipSlice; |
984 | uint32 firstArraySlice; |
985 | uint32 arraySize; |
986 | SVGA3DCreateDSViewFlags flags; |
987 | uint8 pad0; |
988 | uint16 pad1; |
989 | } SVGA3dCmdDXDefineDepthStencilView; |
990 | #pragma pack(pop) |
991 | |
992 | #pragma pack(push, 1) |
993 | typedef struct SVGA3dCmdDXDefineDepthStencilView_v2 { |
994 | SVGA3dDepthStencilViewId depthStencilViewId; |
995 | |
996 | SVGA3dSurfaceId sid; |
997 | SVGA3dSurfaceFormat format; |
998 | SVGA3dResourceType resourceDimension; |
999 | uint32 mipSlice; |
1000 | uint32 firstArraySlice; |
1001 | uint32 arraySize; |
1002 | SVGA3DCreateDSViewFlags flags; |
1003 | uint8 pad0; |
1004 | uint16 pad1; |
1005 | } SVGA3dCmdDXDefineDepthStencilView_v2; |
1006 | #pragma pack(pop) |
1007 | |
1008 | #pragma pack(push, 1) |
1009 | typedef struct SVGA3dCmdDXDestroyDepthStencilView { |
1010 | SVGA3dDepthStencilViewId depthStencilViewId; |
1011 | } SVGA3dCmdDXDestroyDepthStencilView; |
1012 | #pragma pack(pop) |
1013 | |
1014 | #define SVGA3D_UABUFFER_RAW (1 << 0) |
1015 | #define SVGA3D_UABUFFER_APPEND (1 << 1) |
1016 | #define SVGA3D_UABUFFER_COUNTER (1 << 2) |
1017 | typedef uint32 SVGA3dUABufferFlags; |
1018 | |
1019 | #pragma pack(push, 1) |
1020 | typedef struct { |
1021 | union { |
1022 | struct { |
1023 | uint32 firstElement; |
1024 | uint32 numElements; |
1025 | SVGA3dUABufferFlags flags; |
1026 | uint32 padding0; |
1027 | uint32 padding1; |
1028 | } buffer; |
1029 | struct { |
1030 | uint32 mipSlice; |
1031 | uint32 firstArraySlice; |
1032 | uint32 arraySize; |
1033 | uint32 padding0; |
1034 | uint32 padding1; |
1035 | } tex; |
1036 | struct { |
1037 | uint32 mipSlice; |
1038 | uint32 firstW; |
1039 | uint32 wSize; |
1040 | uint32 padding0; |
1041 | uint32 padding1; |
1042 | } tex3D; |
1043 | }; |
1044 | } SVGA3dUAViewDesc; |
1045 | #pragma pack(pop) |
1046 | |
1047 | #pragma pack(push, 1) |
1048 | typedef struct { |
1049 | SVGA3dSurfaceId sid; |
1050 | SVGA3dSurfaceFormat format; |
1051 | SVGA3dResourceType resourceDimension; |
1052 | SVGA3dUAViewDesc desc; |
1053 | uint32 structureCount; |
1054 | uint32 pad[7]; |
1055 | } SVGACOTableDXUAViewEntry; |
1056 | #pragma pack(pop) |
1057 | |
1058 | #pragma pack(push, 1) |
1059 | typedef struct SVGA3dCmdDXDefineUAView { |
1060 | SVGA3dUAViewId uaViewId; |
1061 | |
1062 | SVGA3dSurfaceId sid; |
1063 | SVGA3dSurfaceFormat format; |
1064 | SVGA3dResourceType resourceDimension; |
1065 | |
1066 | SVGA3dUAViewDesc desc; |
1067 | } SVGA3dCmdDXDefineUAView; |
1068 | #pragma pack(pop) |
1069 | |
1070 | #pragma pack(push, 1) |
1071 | typedef struct SVGA3dCmdDXDestroyUAView { |
1072 | SVGA3dUAViewId uaViewId; |
1073 | } SVGA3dCmdDXDestroyUAView; |
1074 | #pragma pack(pop) |
1075 | |
1076 | #pragma pack(push, 1) |
1077 | typedef struct SVGA3dCmdDXClearUAViewUint { |
1078 | SVGA3dUAViewId uaViewId; |
1079 | SVGA3dRGBAUint32 value; |
1080 | } SVGA3dCmdDXClearUAViewUint; |
1081 | #pragma pack(pop) |
1082 | |
1083 | #pragma pack(push, 1) |
1084 | typedef struct SVGA3dCmdDXClearUAViewFloat { |
1085 | SVGA3dUAViewId uaViewId; |
1086 | SVGA3dRGBAFloat value; |
1087 | } SVGA3dCmdDXClearUAViewFloat; |
1088 | #pragma pack(pop) |
1089 | |
1090 | #pragma pack(push, 1) |
1091 | typedef struct SVGA3dCmdDXCopyStructureCount { |
1092 | SVGA3dUAViewId srcUAViewId; |
1093 | SVGA3dSurfaceId destSid; |
1094 | uint32 destByteOffset; |
1095 | } SVGA3dCmdDXCopyStructureCount; |
1096 | #pragma pack(pop) |
1097 | |
1098 | #pragma pack(push, 1) |
1099 | typedef struct SVGA3dCmdDXSetStructureCount { |
1100 | SVGA3dUAViewId uaViewId; |
1101 | uint32 structureCount; |
1102 | } SVGA3dCmdDXSetStructureCount; |
1103 | #pragma pack(pop) |
1104 | |
1105 | #pragma pack(push, 1) |
1106 | typedef struct SVGA3dCmdDXSetUAViews { |
1107 | uint32 uavSpliceIndex; |
1108 | |
1109 | } SVGA3dCmdDXSetUAViews; |
1110 | #pragma pack(pop) |
1111 | |
1112 | #pragma pack(push, 1) |
1113 | typedef struct SVGA3dCmdDXSetCSUAViews { |
1114 | uint32 startIndex; |
1115 | |
1116 | } SVGA3dCmdDXSetCSUAViews; |
1117 | #pragma pack(pop) |
1118 | |
1119 | #pragma pack(push, 1) |
1120 | typedef struct SVGA3dInputElementDesc { |
1121 | uint32 inputSlot; |
1122 | uint32 alignedByteOffset; |
1123 | SVGA3dSurfaceFormat format; |
1124 | SVGA3dInputClassification inputSlotClass; |
1125 | uint32 instanceDataStepRate; |
1126 | uint32 inputRegister; |
1127 | } SVGA3dInputElementDesc; |
1128 | #pragma pack(pop) |
1129 | |
1130 | #pragma pack(push, 1) |
1131 | typedef struct { |
1132 | uint32 elid; |
1133 | uint32 numDescs; |
1134 | SVGA3dInputElementDesc descs[32]; |
1135 | uint32 pad[62]; |
1136 | } SVGACOTableDXElementLayoutEntry; |
1137 | #pragma pack(pop) |
1138 | |
1139 | #pragma pack(push, 1) |
1140 | typedef struct SVGA3dCmdDXDefineElementLayout { |
1141 | SVGA3dElementLayoutId elementLayoutId; |
1142 | |
1143 | } SVGA3dCmdDXDefineElementLayout; |
1144 | #pragma pack(pop) |
1145 | |
1146 | #pragma pack(push, 1) |
1147 | typedef struct SVGA3dCmdDXDestroyElementLayout { |
1148 | SVGA3dElementLayoutId elementLayoutId; |
1149 | } SVGA3dCmdDXDestroyElementLayout; |
1150 | #pragma pack(pop) |
1151 | |
1152 | #define SVGA3D_DX_MAX_RENDER_TARGETS 8 |
1153 | |
1154 | #pragma pack(push, 1) |
1155 | typedef struct SVGA3dDXBlendStatePerRT { |
1156 | uint8 blendEnable; |
1157 | uint8 srcBlend; |
1158 | uint8 destBlend; |
1159 | uint8 blendOp; |
1160 | uint8 srcBlendAlpha; |
1161 | uint8 destBlendAlpha; |
1162 | uint8 blendOpAlpha; |
1163 | SVGA3dColorWriteEnable renderTargetWriteMask; |
1164 | uint8 logicOpEnable; |
1165 | uint8 logicOp; |
1166 | uint16 pad0; |
1167 | } SVGA3dDXBlendStatePerRT; |
1168 | #pragma pack(pop) |
1169 | |
1170 | #pragma pack(push, 1) |
1171 | typedef struct { |
1172 | uint8 alphaToCoverageEnable; |
1173 | uint8 independentBlendEnable; |
1174 | uint16 pad0; |
1175 | SVGA3dDXBlendStatePerRT perRT[SVGA3D_DX_MAX_RENDER_TARGETS]; |
1176 | uint32 pad1[7]; |
1177 | } SVGACOTableDXBlendStateEntry; |
1178 | #pragma pack(pop) |
1179 | |
1180 | #pragma pack(push, 1) |
1181 | typedef struct SVGA3dCmdDXDefineBlendState { |
1182 | SVGA3dBlendStateId blendId; |
1183 | uint8 alphaToCoverageEnable; |
1184 | uint8 independentBlendEnable; |
1185 | uint16 pad0; |
1186 | SVGA3dDXBlendStatePerRT perRT[SVGA3D_DX_MAX_RENDER_TARGETS]; |
1187 | } SVGA3dCmdDXDefineBlendState; |
1188 | #pragma pack(pop) |
1189 | |
1190 | #pragma pack(push, 1) |
1191 | typedef struct SVGA3dCmdDXDestroyBlendState { |
1192 | SVGA3dBlendStateId blendId; |
1193 | } SVGA3dCmdDXDestroyBlendState; |
1194 | #pragma pack(pop) |
1195 | |
1196 | #pragma pack(push, 1) |
1197 | typedef struct { |
1198 | uint8 depthEnable; |
1199 | SVGA3dDepthWriteMask depthWriteMask; |
1200 | SVGA3dComparisonFunc depthFunc; |
1201 | uint8 stencilEnable; |
1202 | uint8 frontEnable; |
1203 | uint8 backEnable; |
1204 | uint8 stencilReadMask; |
1205 | uint8 stencilWriteMask; |
1206 | |
1207 | uint8 frontStencilFailOp; |
1208 | uint8 frontStencilDepthFailOp; |
1209 | uint8 frontStencilPassOp; |
1210 | SVGA3dComparisonFunc frontStencilFunc; |
1211 | |
1212 | uint8 backStencilFailOp; |
1213 | uint8 backStencilDepthFailOp; |
1214 | uint8 backStencilPassOp; |
1215 | SVGA3dComparisonFunc backStencilFunc; |
1216 | } SVGACOTableDXDepthStencilEntry; |
1217 | #pragma pack(pop) |
1218 | |
1219 | #pragma pack(push, 1) |
1220 | typedef struct SVGA3dCmdDXDefineDepthStencilState { |
1221 | SVGA3dDepthStencilStateId depthStencilId; |
1222 | |
1223 | uint8 depthEnable; |
1224 | SVGA3dDepthWriteMask depthWriteMask; |
1225 | SVGA3dComparisonFunc depthFunc; |
1226 | uint8 stencilEnable; |
1227 | uint8 frontEnable; |
1228 | uint8 backEnable; |
1229 | uint8 stencilReadMask; |
1230 | uint8 stencilWriteMask; |
1231 | |
1232 | uint8 frontStencilFailOp; |
1233 | uint8 frontStencilDepthFailOp; |
1234 | uint8 frontStencilPassOp; |
1235 | SVGA3dComparisonFunc frontStencilFunc; |
1236 | |
1237 | uint8 backStencilFailOp; |
1238 | uint8 backStencilDepthFailOp; |
1239 | uint8 backStencilPassOp; |
1240 | SVGA3dComparisonFunc backStencilFunc; |
1241 | } SVGA3dCmdDXDefineDepthStencilState; |
1242 | #pragma pack(pop) |
1243 | |
1244 | #pragma pack(push, 1) |
1245 | typedef struct SVGA3dCmdDXDestroyDepthStencilState { |
1246 | SVGA3dDepthStencilStateId depthStencilId; |
1247 | } SVGA3dCmdDXDestroyDepthStencilState; |
1248 | #pragma pack(pop) |
1249 | |
1250 | #pragma pack(push, 1) |
1251 | typedef struct { |
1252 | uint8 fillMode; |
1253 | SVGA3dCullMode cullMode; |
1254 | uint8 frontCounterClockwise; |
1255 | uint8 provokingVertexLast; |
1256 | int32 depthBias; |
1257 | float depthBiasClamp; |
1258 | float slopeScaledDepthBias; |
1259 | uint8 depthClipEnable; |
1260 | uint8 scissorEnable; |
1261 | SVGA3dMultisampleRastEnable multisampleEnable; |
1262 | uint8 antialiasedLineEnable; |
1263 | float lineWidth; |
1264 | uint8 lineStippleEnable; |
1265 | uint8 lineStippleFactor; |
1266 | uint16 lineStipplePattern; |
1267 | uint8 forcedSampleCount; |
1268 | uint8 mustBeZero[3]; |
1269 | } SVGACOTableDXRasterizerStateEntry; |
1270 | #pragma pack(pop) |
1271 | |
1272 | #pragma pack(push, 1) |
1273 | typedef struct SVGA3dCmdDXDefineRasterizerState { |
1274 | SVGA3dRasterizerStateId rasterizerId; |
1275 | |
1276 | uint8 fillMode; |
1277 | SVGA3dCullMode cullMode; |
1278 | uint8 frontCounterClockwise; |
1279 | uint8 provokingVertexLast; |
1280 | int32 depthBias; |
1281 | float depthBiasClamp; |
1282 | float slopeScaledDepthBias; |
1283 | uint8 depthClipEnable; |
1284 | uint8 scissorEnable; |
1285 | SVGA3dMultisampleRastEnable multisampleEnable; |
1286 | uint8 antialiasedLineEnable; |
1287 | float lineWidth; |
1288 | uint8 lineStippleEnable; |
1289 | uint8 lineStippleFactor; |
1290 | uint16 lineStipplePattern; |
1291 | } SVGA3dCmdDXDefineRasterizerState; |
1292 | #pragma pack(pop) |
1293 | |
1294 | #pragma pack(push, 1) |
1295 | typedef struct SVGA3dCmdDXDefineRasterizerState_v2 { |
1296 | SVGA3dRasterizerStateId rasterizerId; |
1297 | |
1298 | uint8 fillMode; |
1299 | SVGA3dCullMode cullMode; |
1300 | uint8 frontCounterClockwise; |
1301 | uint8 provokingVertexLast; |
1302 | int32 depthBias; |
1303 | float depthBiasClamp; |
1304 | float slopeScaledDepthBias; |
1305 | uint8 depthClipEnable; |
1306 | uint8 scissorEnable; |
1307 | SVGA3dMultisampleRastEnable multisampleEnable; |
1308 | uint8 antialiasedLineEnable; |
1309 | float lineWidth; |
1310 | uint8 lineStippleEnable; |
1311 | uint8 lineStippleFactor; |
1312 | uint16 lineStipplePattern; |
1313 | uint32 forcedSampleCount; |
1314 | } SVGA3dCmdDXDefineRasterizerState_v2; |
1315 | #pragma pack(pop) |
1316 | |
1317 | #pragma pack(push, 1) |
1318 | typedef struct SVGA3dCmdDXDestroyRasterizerState { |
1319 | SVGA3dRasterizerStateId rasterizerId; |
1320 | } SVGA3dCmdDXDestroyRasterizerState; |
1321 | #pragma pack(pop) |
1322 | |
1323 | #pragma pack(push, 1) |
1324 | typedef struct { |
1325 | SVGA3dFilter filter; |
1326 | uint8 addressU; |
1327 | uint8 addressV; |
1328 | uint8 addressW; |
1329 | uint8 pad0; |
1330 | float mipLODBias; |
1331 | uint8 maxAnisotropy; |
1332 | SVGA3dComparisonFunc comparisonFunc; |
1333 | uint16 pad1; |
1334 | SVGA3dRGBAFloat borderColor; |
1335 | float minLOD; |
1336 | float maxLOD; |
1337 | uint32 pad2[6]; |
1338 | } SVGACOTableDXSamplerEntry; |
1339 | #pragma pack(pop) |
1340 | |
1341 | #pragma pack(push, 1) |
1342 | typedef struct SVGA3dCmdDXDefineSamplerState { |
1343 | SVGA3dSamplerId samplerId; |
1344 | SVGA3dFilter filter; |
1345 | uint8 addressU; |
1346 | uint8 addressV; |
1347 | uint8 addressW; |
1348 | uint8 pad0; |
1349 | float mipLODBias; |
1350 | uint8 maxAnisotropy; |
1351 | SVGA3dComparisonFunc comparisonFunc; |
1352 | uint16 pad1; |
1353 | SVGA3dRGBAFloat borderColor; |
1354 | float minLOD; |
1355 | float maxLOD; |
1356 | } SVGA3dCmdDXDefineSamplerState; |
1357 | #pragma pack(pop) |
1358 | |
1359 | #pragma pack(push, 1) |
1360 | typedef struct SVGA3dCmdDXDestroySamplerState { |
1361 | SVGA3dSamplerId samplerId; |
1362 | } SVGA3dCmdDXDestroySamplerState; |
1363 | #pragma pack(pop) |
1364 | |
1365 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED 0 |
1366 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_POSITION 1 |
1367 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_CLIP_DISTANCE 2 |
1368 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_CULL_DISTANCE 3 |
1369 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_RENDER_TARGET_ARRAY_INDEX 4 |
1370 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_VIEWPORT_ARRAY_INDEX 5 |
1371 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_VERTEX_ID 6 |
1372 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_PRIMITIVE_ID 7 |
1373 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_INSTANCE_ID 8 |
1374 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_IS_FRONT_FACE 9 |
1375 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_SAMPLE_INDEX 10 |
1376 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_FINAL_QUAD_U_EQ_0_EDGE_TESSFACTOR 11 |
1377 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_FINAL_QUAD_V_EQ_0_EDGE_TESSFACTOR 12 |
1378 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_FINAL_QUAD_U_EQ_1_EDGE_TESSFACTOR 13 |
1379 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_FINAL_QUAD_V_EQ_1_EDGE_TESSFACTOR 14 |
1380 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_FINAL_QUAD_U_INSIDE_TESSFACTOR 15 |
1381 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_FINAL_QUAD_V_INSIDE_TESSFACTOR 16 |
1382 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_FINAL_TRI_U_EQ_0_EDGE_TESSFACTOR 17 |
1383 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_FINAL_TRI_V_EQ_0_EDGE_TESSFACTOR 18 |
1384 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_FINAL_TRI_W_EQ_0_EDGE_TESSFACTOR 19 |
1385 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_FINAL_TRI_INSIDE_TESSFACTOR 20 |
1386 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_FINAL_LINE_DETAIL_TESSFACTOR 21 |
1387 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_FINAL_LINE_DENSITY_TESSFACTOR 22 |
1388 | #define SVGADX_SIGNATURE_SEMANTIC_NAME_MAX 23 |
1389 | typedef uint32 SVGA3dDXSignatureSemanticName; |
1390 | |
1391 | #define SVGADX_SIGNATURE_REGISTER_COMPONENT_UNKNOWN 0 |
1392 | typedef uint32 SVGA3dDXSignatureRegisterComponentType; |
1393 | |
1394 | #define SVGADX_SIGNATURE_MIN_PRECISION_DEFAULT 0 |
1395 | typedef uint32 SVGA3dDXSignatureMinPrecision; |
1396 | |
1397 | #pragma pack(push, 1) |
1398 | typedef struct SVGA3dDXSignatureEntry { |
1399 | uint32 registerIndex; |
1400 | SVGA3dDXSignatureSemanticName semanticName; |
1401 | uint32 mask; |
1402 | SVGA3dDXSignatureRegisterComponentType componentType; |
1403 | SVGA3dDXSignatureMinPrecision minPrecision; |
1404 | } SVGA3dDXShaderSignatureEntry; |
1405 | #pragma pack(pop) |
1406 | |
1407 | #define 0x08a92d12 |
1408 | |
1409 | #pragma pack(push, 1) |
1410 | typedef struct { |
1411 | uint32 ; |
1412 | uint32 ; |
1413 | uint32 ; |
1414 | uint32 ; |
1415 | } ; |
1416 | #pragma pack(pop) |
1417 | |
1418 | #pragma pack(push, 1) |
1419 | typedef struct SVGA3dCmdDXDefineShader { |
1420 | SVGA3dShaderId shaderId; |
1421 | SVGA3dShaderType type; |
1422 | uint32 sizeInBytes; |
1423 | } SVGA3dCmdDXDefineShader; |
1424 | #pragma pack(pop) |
1425 | |
1426 | #pragma pack(push, 1) |
1427 | typedef struct SVGACOTableDXShaderEntry { |
1428 | SVGA3dShaderType type; |
1429 | uint32 sizeInBytes; |
1430 | uint32 offsetInBytes; |
1431 | SVGAMobId mobid; |
1432 | uint32 pad[4]; |
1433 | } SVGACOTableDXShaderEntry; |
1434 | #pragma pack(pop) |
1435 | |
1436 | #pragma pack(push, 1) |
1437 | typedef struct SVGA3dCmdDXDestroyShader { |
1438 | SVGA3dShaderId shaderId; |
1439 | } SVGA3dCmdDXDestroyShader; |
1440 | #pragma pack(pop) |
1441 | |
1442 | #pragma pack(push, 1) |
1443 | typedef struct SVGA3dCmdDXBindShader { |
1444 | uint32 cid; |
1445 | uint32 shid; |
1446 | SVGAMobId mobid; |
1447 | uint32 offsetInBytes; |
1448 | } SVGA3dCmdDXBindShader; |
1449 | #pragma pack(pop) |
1450 | |
1451 | #pragma pack(push, 1) |
1452 | typedef struct SVGA3dCmdDXBindAllShader { |
1453 | uint32 cid; |
1454 | SVGAMobId mobid; |
1455 | } SVGA3dCmdDXBindAllShader; |
1456 | #pragma pack(pop) |
1457 | |
1458 | #pragma pack(push, 1) |
1459 | typedef struct SVGA3dCmdDXCondBindAllShader { |
1460 | uint32 cid; |
1461 | SVGAMobId testMobid; |
1462 | SVGAMobId mobid; |
1463 | } SVGA3dCmdDXCondBindAllShader; |
1464 | #pragma pack(pop) |
1465 | |
1466 | #define SVGA3D_MAX_DX10_STREAMOUT_DECLS 64 |
1467 | #define SVGA3D_MAX_STREAMOUT_DECLS 512 |
1468 | |
1469 | #pragma pack(push, 1) |
1470 | typedef struct SVGA3dStreamOutputDeclarationEntry { |
1471 | uint32 outputSlot; |
1472 | uint32 registerIndex; |
1473 | uint8 registerMask; |
1474 | uint8 pad0; |
1475 | uint16 pad1; |
1476 | uint32 stream; |
1477 | } SVGA3dStreamOutputDeclarationEntry; |
1478 | #pragma pack(pop) |
1479 | |
1480 | #pragma pack(push, 1) |
1481 | typedef struct SVGAOTableStreamOutputEntry { |
1482 | uint32 numOutputStreamEntries; |
1483 | SVGA3dStreamOutputDeclarationEntry decl[SVGA3D_MAX_DX10_STREAMOUT_DECLS]; |
1484 | uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS]; |
1485 | uint32 rasterizedStream; |
1486 | uint32 numOutputStreamStrides; |
1487 | uint32 mobid; |
1488 | uint32 offsetInBytes; |
1489 | uint8 usesMob; |
1490 | uint8 pad0; |
1491 | uint16 pad1; |
1492 | uint32 pad2[246]; |
1493 | } SVGACOTableDXStreamOutputEntry; |
1494 | #pragma pack(pop) |
1495 | |
1496 | #pragma pack(push, 1) |
1497 | typedef struct SVGA3dCmdDXDefineStreamOutput { |
1498 | SVGA3dStreamOutputId soid; |
1499 | uint32 numOutputStreamEntries; |
1500 | SVGA3dStreamOutputDeclarationEntry decl[SVGA3D_MAX_DX10_STREAMOUT_DECLS]; |
1501 | uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS]; |
1502 | uint32 rasterizedStream; |
1503 | } SVGA3dCmdDXDefineStreamOutput; |
1504 | #pragma pack(pop) |
1505 | |
1506 | #define SVGA3D_DX_SO_NO_RASTERIZED_STREAM 0xFFFFFFFF |
1507 | |
1508 | #pragma pack(push, 1) |
1509 | typedef struct SVGA3dCmdDXDefineStreamOutputWithMob { |
1510 | SVGA3dStreamOutputId soid; |
1511 | uint32 numOutputStreamEntries; |
1512 | uint32 numOutputStreamStrides; |
1513 | uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS]; |
1514 | uint32 rasterizedStream; |
1515 | } SVGA3dCmdDXDefineStreamOutputWithMob; |
1516 | #pragma pack(pop) |
1517 | |
1518 | #pragma pack(push, 1) |
1519 | typedef struct SVGA3dCmdDXBindStreamOutput { |
1520 | SVGA3dStreamOutputId soid; |
1521 | uint32 mobid; |
1522 | uint32 offsetInBytes; |
1523 | uint32 sizeInBytes; |
1524 | } SVGA3dCmdDXBindStreamOutput; |
1525 | #pragma pack(pop) |
1526 | |
1527 | #pragma pack(push, 1) |
1528 | typedef struct SVGA3dCmdDXDestroyStreamOutput { |
1529 | SVGA3dStreamOutputId soid; |
1530 | } SVGA3dCmdDXDestroyStreamOutput; |
1531 | #pragma pack(pop) |
1532 | |
1533 | #pragma pack(push, 1) |
1534 | typedef struct SVGA3dCmdDXSetStreamOutput { |
1535 | SVGA3dStreamOutputId soid; |
1536 | } SVGA3dCmdDXSetStreamOutput; |
1537 | #pragma pack(pop) |
1538 | |
1539 | #pragma pack(push, 1) |
1540 | typedef struct SVGA3dCmdDXSetMinLOD { |
1541 | SVGA3dSurfaceId sid; |
1542 | float minLOD; |
1543 | } SVGA3dCmdDXSetMinLOD; |
1544 | #pragma pack(pop) |
1545 | |
1546 | #pragma pack(push, 1) |
1547 | typedef struct { |
1548 | uint64 value; |
1549 | uint32 mobId; |
1550 | uint32 mobOffset; |
1551 | } SVGA3dCmdDXMobFence64; |
1552 | #pragma pack(pop) |
1553 | |
1554 | #pragma pack(push, 1) |
1555 | typedef struct SVGA3dCmdDXSetCOTable { |
1556 | uint32 cid; |
1557 | uint32 mobid; |
1558 | SVGACOTableType type; |
1559 | uint32 validSizeInBytes; |
1560 | } SVGA3dCmdDXSetCOTable; |
1561 | #pragma pack(pop) |
1562 | |
1563 | #pragma pack(push, 1) |
1564 | typedef struct SVGA3dCmdDXGrowCOTable { |
1565 | uint32 cid; |
1566 | uint32 mobid; |
1567 | SVGACOTableType type; |
1568 | uint32 validSizeInBytes; |
1569 | } SVGA3dCmdDXGrowCOTable; |
1570 | #pragma pack(pop) |
1571 | |
1572 | #pragma pack(push, 1) |
1573 | typedef struct SVGA3dCmdDXReadbackCOTable { |
1574 | uint32 cid; |
1575 | SVGACOTableType type; |
1576 | } SVGA3dCmdDXReadbackCOTable; |
1577 | #pragma pack(pop) |
1578 | |
1579 | #pragma pack(push, 1) |
1580 | typedef struct SVGA3dCmdDXCopyCOTableIntoMob { |
1581 | uint32 cid; |
1582 | SVGACOTableType type; |
1583 | uint32 mobid; |
1584 | } SVGA3dCmdDXCopyCOTableIntoMob; |
1585 | #pragma pack(pop) |
1586 | |
1587 | #pragma pack(push, 1) |
1588 | typedef struct SVGA3dCmdDXPredStagingCopy { |
1589 | SVGA3dSurfaceId dstSid; |
1590 | SVGA3dSurfaceId srcSid; |
1591 | uint8 readback; |
1592 | uint8 unsynchronized; |
1593 | uint8 mustBeZero[2]; |
1594 | |
1595 | } SVGA3dCmdDXPredStagingCopy; |
1596 | #pragma pack(pop) |
1597 | |
1598 | #pragma pack(push, 1) |
1599 | typedef struct SVGA3dCmdDXStagingCopy { |
1600 | SVGA3dSurfaceId dstSid; |
1601 | SVGA3dSurfaceId srcSid; |
1602 | uint8 readback; |
1603 | uint8 unsynchronized; |
1604 | uint8 mustBeZero[2]; |
1605 | |
1606 | } SVGA3dCmdDXStagingCopy; |
1607 | #pragma pack(pop) |
1608 | |
1609 | #pragma pack(push, 1) |
1610 | typedef struct SVGA3dCOTableData { |
1611 | uint32 mobid; |
1612 | } SVGA3dCOTableData; |
1613 | #pragma pack(pop) |
1614 | |
1615 | #pragma pack(push, 1) |
1616 | typedef struct SVGA3dBufferBinding { |
1617 | uint32 bufferId; |
1618 | uint32 stride; |
1619 | uint32 offset; |
1620 | } SVGA3dBufferBinding; |
1621 | #pragma pack(pop) |
1622 | |
1623 | #pragma pack(push, 1) |
1624 | typedef struct SVGA3dConstantBufferBinding { |
1625 | uint32 sid; |
1626 | uint32 offsetInBytes; |
1627 | uint32 sizeInBytes; |
1628 | } SVGA3dConstantBufferBinding; |
1629 | #pragma pack(pop) |
1630 | |
1631 | #pragma pack(push, 1) |
1632 | typedef struct SVGADXInputAssemblyMobFormat { |
1633 | uint32 layoutId; |
1634 | SVGA3dBufferBinding vertexBuffers[SVGA3D_DX_MAX_VERTEXBUFFERS]; |
1635 | uint32 indexBufferSid; |
1636 | uint32 pad; |
1637 | uint32 indexBufferOffset; |
1638 | uint32 indexBufferFormat; |
1639 | uint32 topology; |
1640 | } SVGADXInputAssemblyMobFormat; |
1641 | #pragma pack(pop) |
1642 | |
1643 | #pragma pack(push, 1) |
1644 | typedef struct SVGADXContextMobFormat { |
1645 | SVGADXInputAssemblyMobFormat inputAssembly; |
1646 | |
1647 | struct { |
1648 | uint32 blendStateId; |
1649 | uint32 blendFactor[4]; |
1650 | uint32 sampleMask; |
1651 | uint32 depthStencilStateId; |
1652 | uint32 stencilRef; |
1653 | uint32 rasterizerStateId; |
1654 | uint32 depthStencilViewId; |
1655 | uint32 renderTargetViewIds[SVGA3D_DX_MAX_RENDER_TARGETS]; |
1656 | } renderState; |
1657 | |
1658 | uint32 pad0[8]; |
1659 | |
1660 | struct { |
1661 | uint32 targets[SVGA3D_DX_MAX_SOTARGETS]; |
1662 | uint32 soid; |
1663 | } streamOut; |
1664 | |
1665 | uint32 pad1[10]; |
1666 | |
1667 | uint32 uavSpliceIndex; |
1668 | |
1669 | uint8 numViewports; |
1670 | uint8 numScissorRects; |
1671 | uint16 pad2[1]; |
1672 | |
1673 | uint32 pad3[3]; |
1674 | |
1675 | SVGA3dViewport viewports[SVGA3D_DX_MAX_VIEWPORTS]; |
1676 | uint32 pad4[32]; |
1677 | |
1678 | SVGASignedRect scissorRects[SVGA3D_DX_MAX_SCISSORRECTS]; |
1679 | uint32 pad5[64]; |
1680 | |
1681 | struct { |
1682 | uint32 queryID; |
1683 | uint32 value; |
1684 | } predication; |
1685 | |
1686 | SVGAMobId shaderIfaceMobid; |
1687 | uint32 shaderIfaceOffset; |
1688 | struct { |
1689 | uint32 shaderId; |
1690 | SVGA3dConstantBufferBinding |
1691 | constantBuffers[SVGA3D_DX_MAX_CONSTBUFFERS]; |
1692 | uint32 shaderResources[SVGA3D_DX_MAX_SRVIEWS]; |
1693 | uint32 samplers[SVGA3D_DX_MAX_SAMPLERS]; |
1694 | } shaderState[SVGA3D_NUM_SHADERTYPE]; |
1695 | uint32 pad6[26]; |
1696 | |
1697 | SVGA3dQueryId queryID[SVGA3D_MAX_QUERY]; |
1698 | |
1699 | SVGA3dCOTableData cotables[SVGA_COTABLE_MAX]; |
1700 | |
1701 | uint32 pad7[64]; |
1702 | |
1703 | uint32 uaViewIds[SVGA3D_DX11_1_MAX_UAVIEWS]; |
1704 | uint32 csuaViewIds[SVGA3D_DX11_1_MAX_UAVIEWS]; |
1705 | |
1706 | uint32 pad8[188]; |
1707 | } SVGADXContextMobFormat; |
1708 | #pragma pack(pop) |
1709 | |
1710 | #define SVGA3D_DX_MAX_CLASS_INSTANCES_PADDED 256 |
1711 | |
1712 | #pragma pack(push, 1) |
1713 | typedef struct SVGADXShaderIfaceMobFormat { |
1714 | struct { |
1715 | uint32 numClassInstances; |
1716 | uint32 iface[SVGA3D_DX_MAX_CLASS_INSTANCES_PADDED]; |
1717 | SVGA3dIfaceData data[SVGA3D_DX_MAX_CLASS_INSTANCES_PADDED]; |
1718 | } shaderIfaceState[SVGA3D_NUM_SHADERTYPE]; |
1719 | |
1720 | uint32 pad0[1018]; |
1721 | } SVGADXShaderIfaceMobFormat; |
1722 | #pragma pack(pop) |
1723 | |
1724 | #endif |
1725 | |