1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* |
3 | * max31790.c - Part of lm_sensors, Linux kernel modules for hardware |
4 | * monitoring. |
5 | * |
6 | * (C) 2015 by Il Han <corone.il.han@gmail.com> |
7 | */ |
8 | |
9 | #include <linux/err.h> |
10 | #include <linux/hwmon.h> |
11 | #include <linux/i2c.h> |
12 | #include <linux/init.h> |
13 | #include <linux/jiffies.h> |
14 | #include <linux/module.h> |
15 | #include <linux/slab.h> |
16 | |
17 | /* MAX31790 registers */ |
18 | #define MAX31790_REG_GLOBAL_CONFIG 0x00 |
19 | #define MAX31790_REG_FAN_CONFIG(ch) (0x02 + (ch)) |
20 | #define MAX31790_REG_FAN_DYNAMICS(ch) (0x08 + (ch)) |
21 | #define MAX31790_REG_FAN_FAULT_STATUS2 0x10 |
22 | #define MAX31790_REG_FAN_FAULT_STATUS1 0x11 |
23 | #define MAX31790_REG_TACH_COUNT(ch) (0x18 + (ch) * 2) |
24 | #define MAX31790_REG_PWM_DUTY_CYCLE(ch) (0x30 + (ch) * 2) |
25 | #define MAX31790_REG_PWMOUT(ch) (0x40 + (ch) * 2) |
26 | #define MAX31790_REG_TARGET_COUNT(ch) (0x50 + (ch) * 2) |
27 | |
28 | /* Fan Config register bits */ |
29 | #define MAX31790_FAN_CFG_RPM_MODE 0x80 |
30 | #define MAX31790_FAN_CFG_CTRL_MON 0x10 |
31 | #define MAX31790_FAN_CFG_TACH_INPUT_EN 0x08 |
32 | #define MAX31790_FAN_CFG_TACH_INPUT 0x01 |
33 | |
34 | /* Fan Dynamics register bits */ |
35 | #define MAX31790_FAN_DYN_SR_SHIFT 5 |
36 | #define MAX31790_FAN_DYN_SR_MASK 0xE0 |
37 | #define SR_FROM_REG(reg) (((reg) & MAX31790_FAN_DYN_SR_MASK) \ |
38 | >> MAX31790_FAN_DYN_SR_SHIFT) |
39 | |
40 | #define FAN_RPM_MIN 120 |
41 | #define FAN_RPM_MAX 7864320 |
42 | |
43 | #define FAN_COUNT_REG_MAX 0xffe0 |
44 | |
45 | #define RPM_FROM_REG(reg, sr) (((reg) >> 4) ? \ |
46 | ((60 * (sr) * 8192) / ((reg) >> 4)) : \ |
47 | FAN_RPM_MAX) |
48 | #define RPM_TO_REG(rpm, sr) ((60 * (sr) * 8192) / ((rpm) * 2)) |
49 | |
50 | #define NR_CHANNEL 6 |
51 | |
52 | /* |
53 | * Client data (each client gets its own) |
54 | */ |
55 | struct max31790_data { |
56 | struct i2c_client *client; |
57 | struct mutex update_lock; |
58 | bool valid; /* zero until following fields are valid */ |
59 | unsigned long last_updated; /* in jiffies */ |
60 | |
61 | /* register values */ |
62 | u8 fan_config[NR_CHANNEL]; |
63 | u8 fan_dynamics[NR_CHANNEL]; |
64 | u16 fault_status; |
65 | u16 tach[NR_CHANNEL * 2]; |
66 | u16 pwm[NR_CHANNEL]; |
67 | u16 target_count[NR_CHANNEL]; |
68 | }; |
69 | |
70 | static struct max31790_data *max31790_update_device(struct device *dev) |
71 | { |
72 | struct max31790_data *data = dev_get_drvdata(dev); |
73 | struct i2c_client *client = data->client; |
74 | struct max31790_data *ret = data; |
75 | int i; |
76 | int rv; |
77 | |
78 | mutex_lock(&data->update_lock); |
79 | |
80 | if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { |
81 | rv = i2c_smbus_read_byte_data(client, |
82 | MAX31790_REG_FAN_FAULT_STATUS1); |
83 | if (rv < 0) |
84 | goto abort; |
85 | data->fault_status |= rv & 0x3F; |
86 | |
87 | rv = i2c_smbus_read_byte_data(client, |
88 | MAX31790_REG_FAN_FAULT_STATUS2); |
89 | if (rv < 0) |
90 | goto abort; |
91 | data->fault_status |= (rv & 0x3F) << 6; |
92 | |
93 | for (i = 0; i < NR_CHANNEL; i++) { |
94 | rv = i2c_smbus_read_word_swapped(client, |
95 | MAX31790_REG_TACH_COUNT(i)); |
96 | if (rv < 0) |
97 | goto abort; |
98 | data->tach[i] = rv; |
99 | |
100 | if (data->fan_config[i] |
101 | & MAX31790_FAN_CFG_TACH_INPUT) { |
102 | rv = i2c_smbus_read_word_swapped(client, |
103 | MAX31790_REG_TACH_COUNT(NR_CHANNEL |
104 | + i)); |
105 | if (rv < 0) |
106 | goto abort; |
107 | data->tach[NR_CHANNEL + i] = rv; |
108 | } else { |
109 | rv = i2c_smbus_read_word_swapped(client, |
110 | MAX31790_REG_PWM_DUTY_CYCLE(i)); |
111 | if (rv < 0) |
112 | goto abort; |
113 | data->pwm[i] = rv; |
114 | |
115 | rv = i2c_smbus_read_word_swapped(client, |
116 | MAX31790_REG_TARGET_COUNT(i)); |
117 | if (rv < 0) |
118 | goto abort; |
119 | data->target_count[i] = rv; |
120 | } |
121 | } |
122 | |
123 | data->last_updated = jiffies; |
124 | data->valid = true; |
125 | } |
126 | goto done; |
127 | |
128 | abort: |
129 | data->valid = false; |
130 | ret = ERR_PTR(error: rv); |
131 | |
132 | done: |
133 | mutex_unlock(lock: &data->update_lock); |
134 | |
135 | return ret; |
136 | } |
137 | |
138 | static const u8 tach_period[8] = { 1, 2, 4, 8, 16, 32, 32, 32 }; |
139 | |
140 | static u8 get_tach_period(u8 fan_dynamics) |
141 | { |
142 | return tach_period[SR_FROM_REG(fan_dynamics)]; |
143 | } |
144 | |
145 | static u8 bits_for_tach_period(int rpm) |
146 | { |
147 | u8 bits; |
148 | |
149 | if (rpm < 500) |
150 | bits = 0x0; |
151 | else if (rpm < 1000) |
152 | bits = 0x1; |
153 | else if (rpm < 2000) |
154 | bits = 0x2; |
155 | else if (rpm < 4000) |
156 | bits = 0x3; |
157 | else if (rpm < 8000) |
158 | bits = 0x4; |
159 | else |
160 | bits = 0x5; |
161 | |
162 | return bits; |
163 | } |
164 | |
165 | static int max31790_read_fan(struct device *dev, u32 attr, int channel, |
166 | long *val) |
167 | { |
168 | struct max31790_data *data = max31790_update_device(dev); |
169 | int sr, rpm; |
170 | |
171 | if (IS_ERR(ptr: data)) |
172 | return PTR_ERR(ptr: data); |
173 | |
174 | switch (attr) { |
175 | case hwmon_fan_input: |
176 | sr = get_tach_period(fan_dynamics: data->fan_dynamics[channel % NR_CHANNEL]); |
177 | if (data->tach[channel] == FAN_COUNT_REG_MAX) |
178 | rpm = 0; |
179 | else |
180 | rpm = RPM_FROM_REG(data->tach[channel], sr); |
181 | *val = rpm; |
182 | return 0; |
183 | case hwmon_fan_target: |
184 | sr = get_tach_period(fan_dynamics: data->fan_dynamics[channel]); |
185 | rpm = RPM_FROM_REG(data->target_count[channel], sr); |
186 | *val = rpm; |
187 | return 0; |
188 | case hwmon_fan_fault: |
189 | mutex_lock(&data->update_lock); |
190 | *val = !!(data->fault_status & (1 << channel)); |
191 | data->fault_status &= ~(1 << channel); |
192 | /* |
193 | * If a fault bit is set, we need to write into one of the fan |
194 | * configuration registers to clear it. Note that this also |
195 | * clears the fault for the companion channel if enabled. |
196 | */ |
197 | if (*val) { |
198 | int reg = MAX31790_REG_TARGET_COUNT(channel % NR_CHANNEL); |
199 | |
200 | i2c_smbus_write_byte_data(client: data->client, command: reg, |
201 | value: data->target_count[channel % NR_CHANNEL] >> 8); |
202 | } |
203 | mutex_unlock(lock: &data->update_lock); |
204 | return 0; |
205 | case hwmon_fan_enable: |
206 | *val = !!(data->fan_config[channel] & MAX31790_FAN_CFG_TACH_INPUT_EN); |
207 | return 0; |
208 | default: |
209 | return -EOPNOTSUPP; |
210 | } |
211 | } |
212 | |
213 | static int max31790_write_fan(struct device *dev, u32 attr, int channel, |
214 | long val) |
215 | { |
216 | struct max31790_data *data = dev_get_drvdata(dev); |
217 | struct i2c_client *client = data->client; |
218 | int target_count; |
219 | int err = 0; |
220 | u8 bits, fan_config; |
221 | int sr; |
222 | |
223 | mutex_lock(&data->update_lock); |
224 | |
225 | switch (attr) { |
226 | case hwmon_fan_target: |
227 | val = clamp_val(val, FAN_RPM_MIN, FAN_RPM_MAX); |
228 | bits = bits_for_tach_period(rpm: val); |
229 | data->fan_dynamics[channel] = |
230 | ((data->fan_dynamics[channel] & |
231 | ~MAX31790_FAN_DYN_SR_MASK) | |
232 | (bits << MAX31790_FAN_DYN_SR_SHIFT)); |
233 | err = i2c_smbus_write_byte_data(client, |
234 | MAX31790_REG_FAN_DYNAMICS(channel), |
235 | value: data->fan_dynamics[channel]); |
236 | if (err < 0) |
237 | break; |
238 | |
239 | sr = get_tach_period(fan_dynamics: data->fan_dynamics[channel]); |
240 | target_count = RPM_TO_REG(val, sr); |
241 | target_count = clamp_val(target_count, 0x1, 0x7FF); |
242 | |
243 | data->target_count[channel] = target_count << 5; |
244 | |
245 | err = i2c_smbus_write_word_swapped(client, |
246 | MAX31790_REG_TARGET_COUNT(channel), |
247 | value: data->target_count[channel]); |
248 | break; |
249 | case hwmon_fan_enable: |
250 | fan_config = data->fan_config[channel]; |
251 | if (val == 0) { |
252 | fan_config &= ~MAX31790_FAN_CFG_TACH_INPUT_EN; |
253 | } else if (val == 1) { |
254 | fan_config |= MAX31790_FAN_CFG_TACH_INPUT_EN; |
255 | } else { |
256 | err = -EINVAL; |
257 | break; |
258 | } |
259 | if (fan_config != data->fan_config[channel]) { |
260 | err = i2c_smbus_write_byte_data(client, MAX31790_REG_FAN_CONFIG(channel), |
261 | value: fan_config); |
262 | if (!err) |
263 | data->fan_config[channel] = fan_config; |
264 | } |
265 | break; |
266 | default: |
267 | err = -EOPNOTSUPP; |
268 | break; |
269 | } |
270 | |
271 | mutex_unlock(lock: &data->update_lock); |
272 | |
273 | return err; |
274 | } |
275 | |
276 | static umode_t max31790_fan_is_visible(const void *_data, u32 attr, int channel) |
277 | { |
278 | const struct max31790_data *data = _data; |
279 | u8 fan_config = data->fan_config[channel % NR_CHANNEL]; |
280 | |
281 | switch (attr) { |
282 | case hwmon_fan_input: |
283 | case hwmon_fan_fault: |
284 | if (channel < NR_CHANNEL || |
285 | (fan_config & MAX31790_FAN_CFG_TACH_INPUT)) |
286 | return 0444; |
287 | return 0; |
288 | case hwmon_fan_target: |
289 | if (channel < NR_CHANNEL && |
290 | !(fan_config & MAX31790_FAN_CFG_TACH_INPUT)) |
291 | return 0644; |
292 | return 0; |
293 | case hwmon_fan_enable: |
294 | if (channel < NR_CHANNEL) |
295 | return 0644; |
296 | return 0; |
297 | default: |
298 | return 0; |
299 | } |
300 | } |
301 | |
302 | static int max31790_read_pwm(struct device *dev, u32 attr, int channel, |
303 | long *val) |
304 | { |
305 | struct max31790_data *data = max31790_update_device(dev); |
306 | u8 fan_config; |
307 | |
308 | if (IS_ERR(ptr: data)) |
309 | return PTR_ERR(ptr: data); |
310 | |
311 | fan_config = data->fan_config[channel]; |
312 | |
313 | switch (attr) { |
314 | case hwmon_pwm_input: |
315 | *val = data->pwm[channel] >> 8; |
316 | return 0; |
317 | case hwmon_pwm_enable: |
318 | if (fan_config & MAX31790_FAN_CFG_CTRL_MON) |
319 | *val = 0; |
320 | else if (fan_config & MAX31790_FAN_CFG_RPM_MODE) |
321 | *val = 2; |
322 | else |
323 | *val = 1; |
324 | return 0; |
325 | default: |
326 | return -EOPNOTSUPP; |
327 | } |
328 | } |
329 | |
330 | static int max31790_write_pwm(struct device *dev, u32 attr, int channel, |
331 | long val) |
332 | { |
333 | struct max31790_data *data = dev_get_drvdata(dev); |
334 | struct i2c_client *client = data->client; |
335 | u8 fan_config; |
336 | int err = 0; |
337 | |
338 | mutex_lock(&data->update_lock); |
339 | |
340 | switch (attr) { |
341 | case hwmon_pwm_input: |
342 | if (val < 0 || val > 255) { |
343 | err = -EINVAL; |
344 | break; |
345 | } |
346 | data->valid = false; |
347 | err = i2c_smbus_write_word_swapped(client, |
348 | MAX31790_REG_PWMOUT(channel), |
349 | value: val << 8); |
350 | break; |
351 | case hwmon_pwm_enable: |
352 | fan_config = data->fan_config[channel]; |
353 | if (val == 0) { |
354 | fan_config |= MAX31790_FAN_CFG_CTRL_MON; |
355 | /* |
356 | * Disable RPM mode; otherwise disabling fan speed |
357 | * monitoring is not possible. |
358 | */ |
359 | fan_config &= ~MAX31790_FAN_CFG_RPM_MODE; |
360 | } else if (val == 1) { |
361 | fan_config &= ~(MAX31790_FAN_CFG_CTRL_MON | MAX31790_FAN_CFG_RPM_MODE); |
362 | } else if (val == 2) { |
363 | fan_config &= ~MAX31790_FAN_CFG_CTRL_MON; |
364 | /* |
365 | * The chip sets MAX31790_FAN_CFG_TACH_INPUT_EN on its |
366 | * own if MAX31790_FAN_CFG_RPM_MODE is set. |
367 | * Do it here as well to reflect the actual register |
368 | * value in the cache. |
369 | */ |
370 | fan_config |= (MAX31790_FAN_CFG_RPM_MODE | MAX31790_FAN_CFG_TACH_INPUT_EN); |
371 | } else { |
372 | err = -EINVAL; |
373 | break; |
374 | } |
375 | if (fan_config != data->fan_config[channel]) { |
376 | err = i2c_smbus_write_byte_data(client, MAX31790_REG_FAN_CONFIG(channel), |
377 | value: fan_config); |
378 | if (!err) |
379 | data->fan_config[channel] = fan_config; |
380 | } |
381 | break; |
382 | default: |
383 | err = -EOPNOTSUPP; |
384 | break; |
385 | } |
386 | |
387 | mutex_unlock(lock: &data->update_lock); |
388 | |
389 | return err; |
390 | } |
391 | |
392 | static umode_t max31790_pwm_is_visible(const void *_data, u32 attr, int channel) |
393 | { |
394 | const struct max31790_data *data = _data; |
395 | u8 fan_config = data->fan_config[channel]; |
396 | |
397 | switch (attr) { |
398 | case hwmon_pwm_input: |
399 | case hwmon_pwm_enable: |
400 | if (!(fan_config & MAX31790_FAN_CFG_TACH_INPUT)) |
401 | return 0644; |
402 | return 0; |
403 | default: |
404 | return 0; |
405 | } |
406 | } |
407 | |
408 | static int max31790_read(struct device *dev, enum hwmon_sensor_types type, |
409 | u32 attr, int channel, long *val) |
410 | { |
411 | switch (type) { |
412 | case hwmon_fan: |
413 | return max31790_read_fan(dev, attr, channel, val); |
414 | case hwmon_pwm: |
415 | return max31790_read_pwm(dev, attr, channel, val); |
416 | default: |
417 | return -EOPNOTSUPP; |
418 | } |
419 | } |
420 | |
421 | static int max31790_write(struct device *dev, enum hwmon_sensor_types type, |
422 | u32 attr, int channel, long val) |
423 | { |
424 | switch (type) { |
425 | case hwmon_fan: |
426 | return max31790_write_fan(dev, attr, channel, val); |
427 | case hwmon_pwm: |
428 | return max31790_write_pwm(dev, attr, channel, val); |
429 | default: |
430 | return -EOPNOTSUPP; |
431 | } |
432 | } |
433 | |
434 | static umode_t max31790_is_visible(const void *data, |
435 | enum hwmon_sensor_types type, |
436 | u32 attr, int channel) |
437 | { |
438 | switch (type) { |
439 | case hwmon_fan: |
440 | return max31790_fan_is_visible(data: data, attr, channel); |
441 | case hwmon_pwm: |
442 | return max31790_pwm_is_visible(data: data, attr, channel); |
443 | default: |
444 | return 0; |
445 | } |
446 | } |
447 | |
448 | static const struct hwmon_channel_info * const max31790_info[] = { |
449 | HWMON_CHANNEL_INFO(fan, |
450 | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE, |
451 | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE, |
452 | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE, |
453 | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE, |
454 | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE, |
455 | HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE, |
456 | HWMON_F_INPUT | HWMON_F_FAULT, |
457 | HWMON_F_INPUT | HWMON_F_FAULT, |
458 | HWMON_F_INPUT | HWMON_F_FAULT, |
459 | HWMON_F_INPUT | HWMON_F_FAULT, |
460 | HWMON_F_INPUT | HWMON_F_FAULT, |
461 | HWMON_F_INPUT | HWMON_F_FAULT), |
462 | HWMON_CHANNEL_INFO(pwm, |
463 | HWMON_PWM_INPUT | HWMON_PWM_ENABLE, |
464 | HWMON_PWM_INPUT | HWMON_PWM_ENABLE, |
465 | HWMON_PWM_INPUT | HWMON_PWM_ENABLE, |
466 | HWMON_PWM_INPUT | HWMON_PWM_ENABLE, |
467 | HWMON_PWM_INPUT | HWMON_PWM_ENABLE, |
468 | HWMON_PWM_INPUT | HWMON_PWM_ENABLE), |
469 | NULL |
470 | }; |
471 | |
472 | static const struct hwmon_ops max31790_hwmon_ops = { |
473 | .is_visible = max31790_is_visible, |
474 | .read = max31790_read, |
475 | .write = max31790_write, |
476 | }; |
477 | |
478 | static const struct hwmon_chip_info max31790_chip_info = { |
479 | .ops = &max31790_hwmon_ops, |
480 | .info = max31790_info, |
481 | }; |
482 | |
483 | static int max31790_init_client(struct i2c_client *client, |
484 | struct max31790_data *data) |
485 | { |
486 | int i, rv; |
487 | |
488 | for (i = 0; i < NR_CHANNEL; i++) { |
489 | rv = i2c_smbus_read_byte_data(client, |
490 | MAX31790_REG_FAN_CONFIG(i)); |
491 | if (rv < 0) |
492 | return rv; |
493 | data->fan_config[i] = rv; |
494 | |
495 | rv = i2c_smbus_read_byte_data(client, |
496 | MAX31790_REG_FAN_DYNAMICS(i)); |
497 | if (rv < 0) |
498 | return rv; |
499 | data->fan_dynamics[i] = rv; |
500 | } |
501 | |
502 | return 0; |
503 | } |
504 | |
505 | static int max31790_probe(struct i2c_client *client) |
506 | { |
507 | struct i2c_adapter *adapter = client->adapter; |
508 | struct device *dev = &client->dev; |
509 | struct max31790_data *data; |
510 | struct device *hwmon_dev; |
511 | int err; |
512 | |
513 | if (!i2c_check_functionality(adap: adapter, |
514 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) |
515 | return -ENODEV; |
516 | |
517 | data = devm_kzalloc(dev, size: sizeof(struct max31790_data), GFP_KERNEL); |
518 | if (!data) |
519 | return -ENOMEM; |
520 | |
521 | data->client = client; |
522 | mutex_init(&data->update_lock); |
523 | |
524 | /* |
525 | * Initialize the max31790 chip |
526 | */ |
527 | err = max31790_init_client(client, data); |
528 | if (err) |
529 | return err; |
530 | |
531 | hwmon_dev = devm_hwmon_device_register_with_info(dev, name: client->name, |
532 | drvdata: data, |
533 | info: &max31790_chip_info, |
534 | NULL); |
535 | |
536 | return PTR_ERR_OR_ZERO(ptr: hwmon_dev); |
537 | } |
538 | |
539 | static const struct i2c_device_id max31790_id[] = { |
540 | { "max31790" , 0 }, |
541 | { } |
542 | }; |
543 | MODULE_DEVICE_TABLE(i2c, max31790_id); |
544 | |
545 | static struct i2c_driver max31790_driver = { |
546 | .probe = max31790_probe, |
547 | .driver = { |
548 | .name = "max31790" , |
549 | }, |
550 | .id_table = max31790_id, |
551 | }; |
552 | |
553 | module_i2c_driver(max31790_driver); |
554 | |
555 | MODULE_AUTHOR("Il Han <corone.il.han@gmail.com>" ); |
556 | MODULE_DESCRIPTION("MAX31790 sensor driver" ); |
557 | MODULE_LICENSE("GPL" ); |
558 | |