1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* Support for Lite-On LTR501 and similar ambient light and proximity sensors.
4	*
5	* Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net>
6	*
7	* 7-bit I2C slave address 0x23
8	*
9	* TODO: IR LED characteristics
10	*/
11
12	#include <linux/module.h>
13	#include <linux/mod_devicetable.h>
14	#include <linux/i2c.h>
15	#include <linux/err.h>
16	#include <linux/delay.h>
17	#include <linux/regmap.h>
18	#include <linux/acpi.h>
19	#include <linux/regulator/consumer.h>
20
21	#include <linux/iio/iio.h>
22	#include <linux/iio/events.h>
23	#include <linux/iio/sysfs.h>
24	#include <linux/iio/trigger_consumer.h>
25	#include <linux/iio/buffer.h>
26	#include <linux/iio/triggered_buffer.h>
27
28	#define LTR501_DRV_NAME "ltr501"
29
30	#define LTR501_ALS_CONTR 0x80 /* ALS operation mode, SW reset */
31	#define LTR501_PS_CONTR 0x81 /* PS operation mode */
32	#define LTR501_PS_MEAS_RATE 0x84 /* measurement rate*/
33	#define LTR501_ALS_MEAS_RATE 0x85 /* ALS integ time, measurement rate*/
34	#define LTR501_PART_ID 0x86
35	#define LTR501_MANUFAC_ID 0x87
36	#define LTR501_ALS_DATA1 0x88 /* 16-bit, little endian */
37	#define LTR501_ALS_DATA1_UPPER 0x89 /* upper 8 bits of LTR501_ALS_DATA1 */
38	#define LTR501_ALS_DATA0 0x8a /* 16-bit, little endian */
39	#define LTR501_ALS_DATA0_UPPER 0x8b /* upper 8 bits of LTR501_ALS_DATA0 */
40	#define LTR501_ALS_PS_STATUS 0x8c
41	#define LTR501_PS_DATA 0x8d /* 16-bit, little endian */
42	#define LTR501_PS_DATA_UPPER 0x8e /* upper 8 bits of LTR501_PS_DATA */
43	#define LTR501_INTR 0x8f /* output mode, polarity, mode */
44	#define LTR501_PS_THRESH_UP 0x90 /* 11 bit, ps upper threshold */
45	#define LTR501_PS_THRESH_LOW 0x92 /* 11 bit, ps lower threshold */
46	#define LTR501_ALS_THRESH_UP 0x97 /* 16 bit, ALS upper threshold */
47	#define LTR501_ALS_THRESH_LOW 0x99 /* 16 bit, ALS lower threshold */
48	#define LTR501_INTR_PRST 0x9e /* ps thresh, als thresh */
49	#define LTR501_MAX_REG 0x9f
50
51	#define LTR501_ALS_CONTR_SW_RESET BIT(2)
52	#define LTR501_CONTR_PS_GAIN_MASK (BIT(3) | BIT(2))
53	#define LTR501_CONTR_PS_GAIN_SHIFT 2
54	#define LTR501_CONTR_ALS_GAIN_MASK BIT(3)
55	#define LTR501_CONTR_ACTIVE BIT(1)
56
57	#define LTR501_STATUS_ALS_INTR BIT(3)
58	#define LTR501_STATUS_ALS_RDY BIT(2)
59	#define LTR501_STATUS_PS_INTR BIT(1)
60	#define LTR501_STATUS_PS_RDY BIT(0)
61
62	#define LTR501_PS_DATA_MASK 0x7ff
63	#define LTR501_PS_THRESH_MASK 0x7ff
64	#define LTR501_ALS_THRESH_MASK 0xffff
65
66	#define LTR501_ALS_DEF_PERIOD 500000
67	#define LTR501_PS_DEF_PERIOD 100000
68
69	#define LTR501_REGMAP_NAME "ltr501_regmap"
70
71	#define LTR501_LUX_CONV(vis_coeff, vis_data, ir_coeff, ir_data) \
72	((vis_coeff * vis_data) - (ir_coeff * ir_data))
73
74	static const int int_time_mapping[] = {100000, 50000, 200000, 400000};
75
76	static const struct reg_field reg_field_it =
77	REG_FIELD(LTR501_ALS_MEAS_RATE, 3, 4);
78	static const struct reg_field reg_field_als_intr =
79	REG_FIELD(LTR501_INTR, 1, 1);
80	static const struct reg_field reg_field_ps_intr =
81	REG_FIELD(LTR501_INTR, 0, 0);
82	static const struct reg_field reg_field_als_rate =
83	REG_FIELD(LTR501_ALS_MEAS_RATE, 0, 2);
84	static const struct reg_field reg_field_ps_rate =
85	REG_FIELD(LTR501_PS_MEAS_RATE, 0, 3);
86	static const struct reg_field reg_field_als_prst =
87	REG_FIELD(LTR501_INTR_PRST, 0, 3);
88	static const struct reg_field reg_field_ps_prst =
89	REG_FIELD(LTR501_INTR_PRST, 4, 7);
90
91	struct ltr501_samp_table {
92	int freq_val; /* repetition frequency in micro HZ*/
93	int time_val; /* repetition rate in micro seconds */
94	};
95
96	#define LTR501_RESERVED_GAIN -1
97
98	enum {
99	ltr501 = 0,
100	ltr559,
101	ltr301,
102	ltr303,
103	};
104
105	struct ltr501_gain {
106	int scale;
107	int uscale;
108	};
109
110	static const struct ltr501_gain ltr501_als_gain_tbl[] = {
111	{1, 0},
112	{0, 5000},
113	};
114
115	static const struct ltr501_gain ltr559_als_gain_tbl[] = {
116	{1, 0},
117	{0, 500000},
118	{0, 250000},
119	{0, 125000},
120	{LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN},
121	{LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN},
122	{0, 20000},
123	{0, 10000},
124	};
125
126	static const struct ltr501_gain ltr501_ps_gain_tbl[] = {
127	{1, 0},
128	{0, 250000},
129	{0, 125000},
130	{0, 62500},
131	};
132
133	static const struct ltr501_gain ltr559_ps_gain_tbl[] = {
134	{0, 62500}, /* x16 gain */
135	{0, 31250}, /* x32 gain */
136	{0, 15625}, /* bits X1 are for x64 gain */
137	{0, 15624},
138	};
139
140	struct ltr501_chip_info {
141	u8 partid;
142	const struct ltr501_gain *als_gain;
143	int als_gain_tbl_size;
144	const struct ltr501_gain *ps_gain;
145	int ps_gain_tbl_size;
146	u8 als_mode_active;
147	u8 als_gain_mask;
148	u8 als_gain_shift;
149	struct iio_chan_spec const *channels;
150	const int no_channels;
151	const struct iio_info *info;
152	const struct iio_info *info_no_irq;
153	};
154
155	struct ltr501_data {
156	struct i2c_client *client;
157	struct mutex lock_als, lock_ps;
158	const struct ltr501_chip_info *chip_info;
159	u8 als_contr, ps_contr;
160	int als_period, ps_period; /* period in micro seconds */
161	struct regmap *regmap;
162	struct regmap_field *reg_it;
163	struct regmap_field *reg_als_intr;
164	struct regmap_field *reg_ps_intr;
165	struct regmap_field *reg_als_rate;
166	struct regmap_field *reg_ps_rate;
167	struct regmap_field *reg_als_prst;
168	struct regmap_field *reg_ps_prst;
169	uint32_t near_level;
170	};
171
172	static const struct ltr501_samp_table ltr501_als_samp_table[] = {
173	{20000000, 50000}, {10000000, 100000},
174	{5000000, 200000}, {2000000, 500000},
175	{1000000, 1000000}, {500000, 2000000},
176	{500000, 2000000}, {500000, 2000000}
177	};
178
179	static const struct ltr501_samp_table ltr501_ps_samp_table[] = {
180	{20000000, 50000}, {14285714, 70000},
181	{10000000, 100000}, {5000000, 200000},
182	{2000000, 500000}, {1000000, 1000000},
183	{500000, 2000000}, {500000, 2000000},
184	{500000, 2000000}
185	};
186
187	static int ltr501_match_samp_freq(const struct ltr501_samp_table *tab,
188	int len, int val, int val2)
189	{
190	int i, freq;
191
192	freq = val * 1000000 + val2;
193
194	for (i = 0; i < len; i++) {
195	if (tab[i].freq_val == freq)
196	return i;
197	}
198
199	return -EINVAL;
200	}
201
202	static int ltr501_als_read_samp_freq(const struct ltr501_data *data,
203	int *val, int *val2)
204	{
205	int ret, i;
206
207	ret = regmap_field_read(field: data->reg_als_rate, val: &i);
208	if (ret < 0)
209	return ret;
210
211	if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
212	return -EINVAL;
213
214	*val = ltr501_als_samp_table[i].freq_val / 1000000;
215	*val2 = ltr501_als_samp_table[i].freq_val % 1000000;
216
217	return IIO_VAL_INT_PLUS_MICRO;
218	}
219
220	static int ltr501_ps_read_samp_freq(const struct ltr501_data *data,
221	int *val, int *val2)
222	{
223	int ret, i;
224
225	ret = regmap_field_read(field: data->reg_ps_rate, val: &i);
226	if (ret < 0)
227	return ret;
228
229	if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
230	return -EINVAL;
231
232	*val = ltr501_ps_samp_table[i].freq_val / 1000000;
233	*val2 = ltr501_ps_samp_table[i].freq_val % 1000000;
234
235	return IIO_VAL_INT_PLUS_MICRO;
236	}
237
238	static int ltr501_als_write_samp_freq(struct ltr501_data *data,
239	int val, int val2)
240	{
241	int i, ret;
242
243	i = ltr501_match_samp_freq(tab: ltr501_als_samp_table,
244	ARRAY_SIZE(ltr501_als_samp_table),
245	val, val2);
246
247	if (i < 0)
248	return i;
249
250	mutex_lock(&data->lock_als);
251	ret = regmap_field_write(field: data->reg_als_rate, val: i);
252	mutex_unlock(lock: &data->lock_als);
253
254	return ret;
255	}
256
257	static int ltr501_ps_write_samp_freq(struct ltr501_data *data,
258	int val, int val2)
259	{
260	int i, ret;
261
262	i = ltr501_match_samp_freq(tab: ltr501_ps_samp_table,
263	ARRAY_SIZE(ltr501_ps_samp_table),
264	val, val2);
265
266	if (i < 0)
267	return i;
268
269	mutex_lock(&data->lock_ps);
270	ret = regmap_field_write(field: data->reg_ps_rate, val: i);
271	mutex_unlock(lock: &data->lock_ps);
272
273	return ret;
274	}
275
276	static int ltr501_als_read_samp_period(const struct ltr501_data *data, int *val)
277	{
278	int ret, i;
279
280	ret = regmap_field_read(field: data->reg_als_rate, val: &i);
281	if (ret < 0)
282	return ret;
283
284	if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
285	return -EINVAL;
286
287	*val = ltr501_als_samp_table[i].time_val;
288
289	return IIO_VAL_INT;
290	}
291
292	static int ltr501_ps_read_samp_period(const struct ltr501_data *data, int *val)
293	{
294	int ret, i;
295
296	ret = regmap_field_read(field: data->reg_ps_rate, val: &i);
297	if (ret < 0)
298	return ret;
299
300	if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
301	return -EINVAL;
302
303	*val = ltr501_ps_samp_table[i].time_val;
304
305	return IIO_VAL_INT;
306	}
307
308	/* IR and visible spectrum coeff's are given in data sheet */
309	static unsigned long ltr501_calculate_lux(u16 vis_data, u16 ir_data)
310	{
311	unsigned long ratio, lux;
312
313	if (vis_data == 0)
314	return 0;
315
316	/* multiply numerator by 100 to avoid handling ratio < 1 */
317	ratio = DIV_ROUND_UP(ir_data * 100, ir_data + vis_data);
318
319	if (ratio < 45)
320	lux = LTR501_LUX_CONV(1774, vis_data, -1105, ir_data);
321	else if (ratio >= 45 && ratio < 64)
322	lux = LTR501_LUX_CONV(3772, vis_data, 1336, ir_data);
323	else if (ratio >= 64 && ratio < 85)
324	lux = LTR501_LUX_CONV(1690, vis_data, 169, ir_data);
325	else
326	lux = 0;
327
328	return lux / 1000;
329	}
330
331	static int ltr501_drdy(const struct ltr501_data *data, u8 drdy_mask)
332	{
333	int tries = 100;
334	int ret, status;
335
336	while (tries--) {
337	ret = regmap_read(map: data->regmap, LTR501_ALS_PS_STATUS, val: &status);
338	if (ret < 0)
339	return ret;
340	if ((status & drdy_mask) == drdy_mask)
341	return 0;
342	msleep(msecs: 25);
343	}
344
345	dev_err(&data->client->dev, "ltr501_drdy() failed, data not ready\n");
346	return -EIO;
347	}
348
349	static int ltr501_set_it_time(struct ltr501_data *data, int it)
350	{
351	int ret, i, index = -1, status;
352
353	for (i = 0; i < ARRAY_SIZE(int_time_mapping); i++) {
354	if (int_time_mapping[i] == it) {
355	index = i;
356	break;
357	}
358	}
359	/* Make sure integ time index is valid */
360	if (index < 0)
361	return -EINVAL;
362
363	ret = regmap_read(map: data->regmap, LTR501_ALS_CONTR, val: &status);
364	if (ret < 0)
365	return ret;
366
367	if (status & LTR501_CONTR_ALS_GAIN_MASK) {
368	/*
369	* 200 ms and 400 ms integ time can only be
370	* used in dynamic range 1
371	*/
372	if (index > 1)
373	return -EINVAL;
374	} else
375	/* 50 ms integ time can only be used in dynamic range 2 */
376	if (index == 1)
377	return -EINVAL;
378
379	return regmap_field_write(field: data->reg_it, val: index);
380	}
381
382	/* read int time in micro seconds */
383	static int ltr501_read_it_time(const struct ltr501_data *data,
384	int *val, int *val2)
385	{
386	int ret, index;
387
388	ret = regmap_field_read(field: data->reg_it, val: &index);
389	if (ret < 0)
390	return ret;
391
392	/* Make sure integ time index is valid */
393	if (index < 0 || index >= ARRAY_SIZE(int_time_mapping))
394	return -EINVAL;
395
396	*val2 = int_time_mapping[index];
397	*val = 0;
398
399	return IIO_VAL_INT_PLUS_MICRO;
400	}
401
402	static int ltr501_read_als(const struct ltr501_data *data, __le16 buf[2])
403	{
404	int ret;
405
406	ret = ltr501_drdy(data, LTR501_STATUS_ALS_RDY);
407	if (ret < 0)
408	return ret;
409	/* always read both ALS channels in given order */
410	return regmap_bulk_read(map: data->regmap, LTR501_ALS_DATA1,
411	val: buf, val_count: 2 * sizeof(__le16));
412	}
413
414	static int ltr501_read_ps(const struct ltr501_data *data)
415	{
416	__le16 status;
417	int ret;
418
419	ret = ltr501_drdy(data, LTR501_STATUS_PS_RDY);
420	if (ret < 0)
421	return ret;
422
423	ret = regmap_bulk_read(map: data->regmap, LTR501_PS_DATA,
424	val: &status, val_count: sizeof(status));
425	if (ret < 0)
426	return ret;
427
428	return le16_to_cpu(status);
429	}
430
431	static int ltr501_read_intr_prst(const struct ltr501_data *data,
432	enum iio_chan_type type,
433	int *val2)
434	{
435	int ret, samp_period, prst;
436
437	switch (type) {
438	case IIO_INTENSITY:
439	ret = regmap_field_read(field: data->reg_als_prst, val: &prst);
440	if (ret < 0)
441	return ret;
442
443	ret = ltr501_als_read_samp_period(data, val: &samp_period);
444
445	if (ret < 0)
446	return ret;
447	*val2 = samp_period * prst;
448	return IIO_VAL_INT_PLUS_MICRO;
449	case IIO_PROXIMITY:
450	ret = regmap_field_read(field: data->reg_ps_prst, val: &prst);
451	if (ret < 0)
452	return ret;
453
454	ret = ltr501_ps_read_samp_period(data, val: &samp_period);
455
456	if (ret < 0)
457	return ret;
458
459	*val2 = samp_period * prst;
460	return IIO_VAL_INT_PLUS_MICRO;
461	default:
462	return -EINVAL;
463	}
464
465	return -EINVAL;
466	}
467
468	static int ltr501_write_intr_prst(struct ltr501_data *data,
469	enum iio_chan_type type,
470	int val, int val2)
471	{
472	int ret, samp_period, new_val;
473	unsigned long period;
474
475	if (val < 0 || val2 < 0)
476	return -EINVAL;
477
478	/* period in microseconds */
479	period = ((val * 1000000) + val2);
480
481	switch (type) {
482	case IIO_INTENSITY:
483	ret = ltr501_als_read_samp_period(data, val: &samp_period);
484	if (ret < 0)
485	return ret;
486
487	/* period should be atleast equal to sampling period */
488	if (period < samp_period)
489	return -EINVAL;
490
491	new_val = DIV_ROUND_UP(period, samp_period);
492	if (new_val < 0 || new_val > 0x0f)
493	return -EINVAL;
494
495	mutex_lock(&data->lock_als);
496	ret = regmap_field_write(field: data->reg_als_prst, val: new_val);
497	mutex_unlock(lock: &data->lock_als);
498	if (ret >= 0)
499	data->als_period = period;
500
501	return ret;
502	case IIO_PROXIMITY:
503	ret = ltr501_ps_read_samp_period(data, val: &samp_period);
504	if (ret < 0)
505	return ret;
506
507	/* period should be atleast equal to rate */
508	if (period < samp_period)
509	return -EINVAL;
510
511	new_val = DIV_ROUND_UP(period, samp_period);
512	if (new_val < 0 || new_val > 0x0f)
513	return -EINVAL;
514
515	mutex_lock(&data->lock_ps);
516	ret = regmap_field_write(field: data->reg_ps_prst, val: new_val);
517	mutex_unlock(lock: &data->lock_ps);
518	if (ret >= 0)
519	data->ps_period = period;
520
521	return ret;
522	default:
523	return -EINVAL;
524	}
525
526	return -EINVAL;
527	}
528
529	static ssize_t ltr501_read_near_level(struct iio_dev *indio_dev,
530	uintptr_t priv,
531	const struct iio_chan_spec *chan,
532	char *buf)
533	{
534	struct ltr501_data *data = iio_priv(indio_dev);
535
536	return sprintf(buf, fmt: "%u\n", data->near_level);
537	}
538
539	static const struct iio_chan_spec_ext_info ltr501_ext_info[] = {
540	{
541	.name = "nearlevel",
542	.shared = IIO_SEPARATE,
543	.read = ltr501_read_near_level,
544	},
545	{ /* sentinel */ }
546	};
547
548	static const struct iio_event_spec ltr501_als_event_spec[] = {
549	{
550	.type = IIO_EV_TYPE_THRESH,
551	.dir = IIO_EV_DIR_RISING,
552	.mask_separate = BIT(IIO_EV_INFO_VALUE),
553	}, {
554	.type = IIO_EV_TYPE_THRESH,
555	.dir = IIO_EV_DIR_FALLING,
556	.mask_separate = BIT(IIO_EV_INFO_VALUE),
557	}, {
558	.type = IIO_EV_TYPE_THRESH,
559	.dir = IIO_EV_DIR_EITHER,
560	.mask_separate = BIT(IIO_EV_INFO_ENABLE) |
561	BIT(IIO_EV_INFO_PERIOD),
562	},
563
564	};
565
566	static const struct iio_event_spec ltr501_pxs_event_spec[] = {
567	{
568	.type = IIO_EV_TYPE_THRESH,
569	.dir = IIO_EV_DIR_RISING,
570	.mask_separate = BIT(IIO_EV_INFO_VALUE),
571	}, {
572	.type = IIO_EV_TYPE_THRESH,
573	.dir = IIO_EV_DIR_FALLING,
574	.mask_separate = BIT(IIO_EV_INFO_VALUE),
575	}, {
576	.type = IIO_EV_TYPE_THRESH,
577	.dir = IIO_EV_DIR_EITHER,
578	.mask_separate = BIT(IIO_EV_INFO_ENABLE) |
579	BIT(IIO_EV_INFO_PERIOD),
580	},
581	};
582
583	#define LTR501_INTENSITY_CHANNEL(_idx, _addr, _mod, _shared, \
584	_evspec, _evsize) { \
585	.type = IIO_INTENSITY, \
586	.modified = 1, \
587	.address = (_addr), \
588	.channel2 = (_mod), \
589	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
590	.info_mask_shared_by_type = (_shared), \
591	.scan_index = (_idx), \
592	.scan_type = { \
593	.sign = 'u', \
594	.realbits = 16, \
595	.storagebits = 16, \
596	.endianness = IIO_CPU, \
597	}, \
598	.event_spec = _evspec,\
599	.num_event_specs = _evsize,\
600	}
601
602	#define LTR501_LIGHT_CHANNEL() { \
603	.type = IIO_LIGHT, \
604	.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
605	.scan_index = -1, \
606	}
607
608	static const struct iio_chan_spec ltr501_channels[] = {
609	LTR501_LIGHT_CHANNEL(),
610	LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0,
611	ltr501_als_event_spec,
612	ARRAY_SIZE(ltr501_als_event_spec)),
613	LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR,
614	BIT(IIO_CHAN_INFO_SCALE) |
615	BIT(IIO_CHAN_INFO_INT_TIME) |
616	BIT(IIO_CHAN_INFO_SAMP_FREQ),
617	NULL, 0),
618	{
619	.type = IIO_PROXIMITY,
620	.address = LTR501_PS_DATA,
621	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
622	BIT(IIO_CHAN_INFO_SCALE),
623	.scan_index = 2,
624	.scan_type = {
625	.sign = 'u',
626	.realbits = 11,
627	.storagebits = 16,
628	.endianness = IIO_CPU,
629	},
630	.event_spec = ltr501_pxs_event_spec,
631	.num_event_specs = ARRAY_SIZE(ltr501_pxs_event_spec),
632	.ext_info = ltr501_ext_info,
633	},
634	IIO_CHAN_SOFT_TIMESTAMP(3),
635	};
636
637	static const struct iio_chan_spec ltr301_channels[] = {
638	LTR501_LIGHT_CHANNEL(),
639	LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0,
640	ltr501_als_event_spec,
641	ARRAY_SIZE(ltr501_als_event_spec)),
642	LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR,
643	BIT(IIO_CHAN_INFO_SCALE) |
644	BIT(IIO_CHAN_INFO_INT_TIME) |
645	BIT(IIO_CHAN_INFO_SAMP_FREQ),
646	NULL, 0),
647	IIO_CHAN_SOFT_TIMESTAMP(2),
648	};
649
650	static int ltr501_read_raw(struct iio_dev *indio_dev,
651	struct iio_chan_spec const *chan,
652	int *val, int *val2, long mask)
653	{
654	struct ltr501_data *data = iio_priv(indio_dev);
655	__le16 buf[2];
656	int ret, i;
657
658	switch (mask) {
659	case IIO_CHAN_INFO_PROCESSED:
660	switch (chan->type) {
661	case IIO_LIGHT:
662	ret = iio_device_claim_direct_mode(indio_dev);
663	if (ret)
664	return ret;
665
666	mutex_lock(&data->lock_als);
667	ret = ltr501_read_als(data, buf);
668	mutex_unlock(lock: &data->lock_als);
669	iio_device_release_direct_mode(indio_dev);
670	if (ret < 0)
671	return ret;
672	*val = ltr501_calculate_lux(le16_to_cpu(buf[1]),
673	le16_to_cpu(buf[0]));
674	return IIO_VAL_INT;
675	default:
676	return -EINVAL;
677	}
678	case IIO_CHAN_INFO_RAW:
679	ret = iio_device_claim_direct_mode(indio_dev);
680	if (ret)
681	return ret;
682
683	switch (chan->type) {
684	case IIO_INTENSITY:
685	mutex_lock(&data->lock_als);
686	ret = ltr501_read_als(data, buf);
687	mutex_unlock(lock: &data->lock_als);
688	if (ret < 0)
689	break;
690	*val = le16_to_cpu(chan->address == LTR501_ALS_DATA1 ?
691	buf[0] : buf[1]);
692	ret = IIO_VAL_INT;
693	break;
694	case IIO_PROXIMITY:
695	mutex_lock(&data->lock_ps);
696	ret = ltr501_read_ps(data);
697	mutex_unlock(lock: &data->lock_ps);
698	if (ret < 0)
699	break;
700	*val = ret & LTR501_PS_DATA_MASK;
701	ret = IIO_VAL_INT;
702	break;
703	default:
704	ret = -EINVAL;
705	break;
706	}
707
708	iio_device_release_direct_mode(indio_dev);
709	return ret;
710
711	case IIO_CHAN_INFO_SCALE:
712	switch (chan->type) {
713	case IIO_INTENSITY:
714	i = (data->als_contr & data->chip_info->als_gain_mask)
715	>> data->chip_info->als_gain_shift;
716	*val = data->chip_info->als_gain[i].scale;
717	*val2 = data->chip_info->als_gain[i].uscale;
718	return IIO_VAL_INT_PLUS_MICRO;
719	case IIO_PROXIMITY:
720	i = (data->ps_contr & LTR501_CONTR_PS_GAIN_MASK) >>
721	LTR501_CONTR_PS_GAIN_SHIFT;
722	*val = data->chip_info->ps_gain[i].scale;
723	*val2 = data->chip_info->ps_gain[i].uscale;
724	return IIO_VAL_INT_PLUS_MICRO;
725	default:
726	return -EINVAL;
727	}
728	case IIO_CHAN_INFO_INT_TIME:
729	switch (chan->type) {
730	case IIO_INTENSITY:
731	return ltr501_read_it_time(data, val, val2);
732	default:
733	return -EINVAL;
734	}
735	case IIO_CHAN_INFO_SAMP_FREQ:
736	switch (chan->type) {
737	case IIO_INTENSITY:
738	return ltr501_als_read_samp_freq(data, val, val2);
739	case IIO_PROXIMITY:
740	return ltr501_ps_read_samp_freq(data, val, val2);
741	default:
742	return -EINVAL;
743	}
744	}
745	return -EINVAL;
746	}
747
748	static int ltr501_get_gain_index(const struct ltr501_gain *gain, int size,
749	int val, int val2)
750	{
751	int i;
752
753	for (i = 0; i < size; i++)
754	if (val == gain[i].scale && val2 == gain[i].uscale)
755	return i;
756
757	return -1;
758	}
759
760	static int ltr501_write_raw(struct iio_dev *indio_dev,
761	struct iio_chan_spec const *chan,
762	int val, int val2, long mask)
763	{
764	struct ltr501_data *data = iio_priv(indio_dev);
765	int i, ret, freq_val, freq_val2;
766	const struct ltr501_chip_info *info = data->chip_info;
767
768	ret = iio_device_claim_direct_mode(indio_dev);
769	if (ret)
770	return ret;
771
772	switch (mask) {
773	case IIO_CHAN_INFO_SCALE:
774	switch (chan->type) {
775	case IIO_INTENSITY:
776	i = ltr501_get_gain_index(gain: info->als_gain,
777	size: info->als_gain_tbl_size,
778	val, val2);
779	if (i < 0) {
780	ret = -EINVAL;
781	break;
782	}
783
784	data->als_contr &= ~info->als_gain_mask;
785	data->als_contr |= i << info->als_gain_shift;
786
787	ret = regmap_write(map: data->regmap, LTR501_ALS_CONTR,
788	val: data->als_contr);
789	break;
790	case IIO_PROXIMITY:
791	i = ltr501_get_gain_index(gain: info->ps_gain,
792	size: info->ps_gain_tbl_size,
793	val, val2);
794	if (i < 0) {
795	ret = -EINVAL;
796	break;
797	}
798	data->ps_contr &= ~LTR501_CONTR_PS_GAIN_MASK;
799	data->ps_contr |= i << LTR501_CONTR_PS_GAIN_SHIFT;
800
801	ret = regmap_write(map: data->regmap, LTR501_PS_CONTR,
802	val: data->ps_contr);
803	break;
804	default:
805	ret = -EINVAL;
806	break;
807	}
808	break;
809
810	case IIO_CHAN_INFO_INT_TIME:
811	switch (chan->type) {
812	case IIO_INTENSITY:
813	if (val != 0) {
814	ret = -EINVAL;
815	break;
816	}
817	mutex_lock(&data->lock_als);
818	ret = ltr501_set_it_time(data, it: val2);
819	mutex_unlock(lock: &data->lock_als);
820	break;
821	default:
822	ret = -EINVAL;
823	break;
824	}
825	break;
826
827	case IIO_CHAN_INFO_SAMP_FREQ:
828	switch (chan->type) {
829	case IIO_INTENSITY:
830	ret = ltr501_als_read_samp_freq(data, val: &freq_val,
831	val2: &freq_val2);
832	if (ret < 0)
833	break;
834
835	ret = ltr501_als_write_samp_freq(data, val, val2);
836	if (ret < 0)
837	break;
838
839	/* update persistence count when changing frequency */
840	ret = ltr501_write_intr_prst(data, type: chan->type,
841	val: 0, val2: data->als_period);
842
843	if (ret < 0)
844	ret = ltr501_als_write_samp_freq(data, val: freq_val,
845	val2: freq_val2);
846	break;
847	case IIO_PROXIMITY:
848	ret = ltr501_ps_read_samp_freq(data, val: &freq_val,
849	val2: &freq_val2);
850	if (ret < 0)
851	break;
852
853	ret = ltr501_ps_write_samp_freq(data, val, val2);
854	if (ret < 0)
855	break;
856
857	/* update persistence count when changing frequency */
858	ret = ltr501_write_intr_prst(data, type: chan->type,
859	val: 0, val2: data->ps_period);
860
861	if (ret < 0)
862	ret = ltr501_ps_write_samp_freq(data, val: freq_val,
863	val2: freq_val2);
864	break;
865	default:
866	ret = -EINVAL;
867	break;
868	}
869	break;
870
871	default:
872	ret = -EINVAL;
873	break;
874	}
875
876	iio_device_release_direct_mode(indio_dev);
877	return ret;
878	}
879
880	static int ltr501_read_thresh(const struct iio_dev *indio_dev,
881	const struct iio_chan_spec *chan,
882	enum iio_event_type type,
883	enum iio_event_direction dir,
884	enum iio_event_info info,
885	int *val, int *val2)
886	{
887	const struct ltr501_data *data = iio_priv(indio_dev);
888	int ret, thresh_data;
889
890	switch (chan->type) {
891	case IIO_INTENSITY:
892	switch (dir) {
893	case IIO_EV_DIR_RISING:
894	ret = regmap_bulk_read(map: data->regmap,
895	LTR501_ALS_THRESH_UP,
896	val: &thresh_data, val_count: 2);
897	if (ret < 0)
898	return ret;
899	*val = thresh_data & LTR501_ALS_THRESH_MASK;
900	return IIO_VAL_INT;
901	case IIO_EV_DIR_FALLING:
902	ret = regmap_bulk_read(map: data->regmap,
903	LTR501_ALS_THRESH_LOW,
904	val: &thresh_data, val_count: 2);
905	if (ret < 0)
906	return ret;
907	*val = thresh_data & LTR501_ALS_THRESH_MASK;
908	return IIO_VAL_INT;
909	default:
910	return -EINVAL;
911	}
912	case IIO_PROXIMITY:
913	switch (dir) {
914	case IIO_EV_DIR_RISING:
915	ret = regmap_bulk_read(map: data->regmap,
916	LTR501_PS_THRESH_UP,
917	val: &thresh_data, val_count: 2);
918	if (ret < 0)
919	return ret;
920	*val = thresh_data & LTR501_PS_THRESH_MASK;
921	return IIO_VAL_INT;
922	case IIO_EV_DIR_FALLING:
923	ret = regmap_bulk_read(map: data->regmap,
924	LTR501_PS_THRESH_LOW,
925	val: &thresh_data, val_count: 2);
926	if (ret < 0)
927	return ret;
928	*val = thresh_data & LTR501_PS_THRESH_MASK;
929	return IIO_VAL_INT;
930	default:
931	return -EINVAL;
932	}
933	default:
934	return -EINVAL;
935	}
936
937	return -EINVAL;
938	}
939
940	static int ltr501_write_thresh(struct iio_dev *indio_dev,
941	const struct iio_chan_spec *chan,
942	enum iio_event_type type,
943	enum iio_event_direction dir,
944	enum iio_event_info info,
945	int val, int val2)
946	{
947	struct ltr501_data *data = iio_priv(indio_dev);
948	int ret;
949
950	if (val < 0)
951	return -EINVAL;
952
953	switch (chan->type) {
954	case IIO_INTENSITY:
955	if (val > LTR501_ALS_THRESH_MASK)
956	return -EINVAL;
957	switch (dir) {
958	case IIO_EV_DIR_RISING:
959	mutex_lock(&data->lock_als);
960	ret = regmap_bulk_write(map: data->regmap,
961	LTR501_ALS_THRESH_UP,
962	val: &val, val_count: 2);
963	mutex_unlock(lock: &data->lock_als);
964	return ret;
965	case IIO_EV_DIR_FALLING:
966	mutex_lock(&data->lock_als);
967	ret = regmap_bulk_write(map: data->regmap,
968	LTR501_ALS_THRESH_LOW,
969	val: &val, val_count: 2);
970	mutex_unlock(lock: &data->lock_als);
971	return ret;
972	default:
973	return -EINVAL;
974	}
975	case IIO_PROXIMITY:
976	if (val > LTR501_PS_THRESH_MASK)
977	return -EINVAL;
978	switch (dir) {
979	case IIO_EV_DIR_RISING:
980	mutex_lock(&data->lock_ps);
981	ret = regmap_bulk_write(map: data->regmap,
982	LTR501_PS_THRESH_UP,
983	val: &val, val_count: 2);
984	mutex_unlock(lock: &data->lock_ps);
985	return ret;
986	case IIO_EV_DIR_FALLING:
987	mutex_lock(&data->lock_ps);
988	ret = regmap_bulk_write(map: data->regmap,
989	LTR501_PS_THRESH_LOW,
990	val: &val, val_count: 2);
991	mutex_unlock(lock: &data->lock_ps);
992	return ret;
993	default:
994	return -EINVAL;
995	}
996	default:
997	return -EINVAL;
998	}
999
1000	return -EINVAL;
1001	}
1002
1003	static int ltr501_read_event(struct iio_dev *indio_dev,
1004	const struct iio_chan_spec *chan,
1005	enum iio_event_type type,
1006	enum iio_event_direction dir,
1007	enum iio_event_info info,
1008	int *val, int *val2)
1009	{
1010	int ret;
1011
1012	switch (info) {
1013	case IIO_EV_INFO_VALUE:
1014	return ltr501_read_thresh(indio_dev, chan, type, dir,
1015	info, val, val2);
1016	case IIO_EV_INFO_PERIOD:
1017	ret = ltr501_read_intr_prst(data: iio_priv(indio_dev),
1018	type: chan->type, val2);
1019	*val = *val2 / 1000000;
1020	*val2 = *val2 % 1000000;
1021	return ret;
1022	default:
1023	return -EINVAL;
1024	}
1025
1026	return -EINVAL;
1027	}
1028
1029	static int ltr501_write_event(struct iio_dev *indio_dev,
1030	const struct iio_chan_spec *chan,
1031	enum iio_event_type type,
1032	enum iio_event_direction dir,
1033	enum iio_event_info info,
1034	int val, int val2)
1035	{
1036	switch (info) {
1037	case IIO_EV_INFO_VALUE:
1038	if (val2 != 0)
1039	return -EINVAL;
1040	return ltr501_write_thresh(indio_dev, chan, type, dir,
1041	info, val, val2);
1042	case IIO_EV_INFO_PERIOD:
1043	return ltr501_write_intr_prst(data: iio_priv(indio_dev), type: chan->type,
1044	val, val2);
1045	default:
1046	return -EINVAL;
1047	}
1048
1049	return -EINVAL;
1050	}
1051
1052	static int ltr501_read_event_config(struct iio_dev *indio_dev,
1053	const struct iio_chan_spec *chan,
1054	enum iio_event_type type,
1055	enum iio_event_direction dir)
1056	{
1057	struct ltr501_data *data = iio_priv(indio_dev);
1058	int ret, status;
1059
1060	switch (chan->type) {
1061	case IIO_INTENSITY:
1062	ret = regmap_field_read(field: data->reg_als_intr, val: &status);
1063	if (ret < 0)
1064	return ret;
1065	return status;
1066	case IIO_PROXIMITY:
1067	ret = regmap_field_read(field: data->reg_ps_intr, val: &status);
1068	if (ret < 0)
1069	return ret;
1070	return status;
1071	default:
1072	return -EINVAL;
1073	}
1074
1075	return -EINVAL;
1076	}
1077
1078	static int ltr501_write_event_config(struct iio_dev *indio_dev,
1079	const struct iio_chan_spec *chan,
1080	enum iio_event_type type,
1081	enum iio_event_direction dir, int state)
1082	{
1083	struct ltr501_data *data = iio_priv(indio_dev);
1084	int ret;
1085
1086	/* only 1 and 0 are valid inputs */
1087	if (state != 1 && state != 0)
1088	return -EINVAL;
1089
1090	switch (chan->type) {
1091	case IIO_INTENSITY:
1092	mutex_lock(&data->lock_als);
1093	ret = regmap_field_write(field: data->reg_als_intr, val: state);
1094	mutex_unlock(lock: &data->lock_als);
1095	return ret;
1096	case IIO_PROXIMITY:
1097	mutex_lock(&data->lock_ps);
1098	ret = regmap_field_write(field: data->reg_ps_intr, val: state);
1099	mutex_unlock(lock: &data->lock_ps);
1100	return ret;
1101	default:
1102	return -EINVAL;
1103	}
1104
1105	return -EINVAL;
1106	}
1107
1108	static ssize_t ltr501_show_proximity_scale_avail(struct device *dev,
1109	struct device_attribute *attr,
1110	char *buf)
1111	{
1112	struct ltr501_data *data = iio_priv(indio_dev: dev_to_iio_dev(dev));
1113	const struct ltr501_chip_info *info = data->chip_info;
1114	ssize_t len = 0;
1115	int i;
1116
1117	for (i = 0; i < info->ps_gain_tbl_size; i++) {
1118	if (info->ps_gain[i].scale == LTR501_RESERVED_GAIN)
1119	continue;
1120	len += scnprintf(buf: buf + len, PAGE_SIZE - len, fmt: "%d.%06d ",
1121	info->ps_gain[i].scale,
1122	info->ps_gain[i].uscale);
1123	}
1124
1125	buf[len - 1] = '\n';
1126
1127	return len;
1128	}
1129
1130	static ssize_t ltr501_show_intensity_scale_avail(struct device *dev,
1131	struct device_attribute *attr,
1132	char *buf)
1133	{
1134	struct ltr501_data *data = iio_priv(indio_dev: dev_to_iio_dev(dev));
1135	const struct ltr501_chip_info *info = data->chip_info;
1136	ssize_t len = 0;
1137	int i;
1138
1139	for (i = 0; i < info->als_gain_tbl_size; i++) {
1140	if (info->als_gain[i].scale == LTR501_RESERVED_GAIN)
1141	continue;
1142	len += scnprintf(buf: buf + len, PAGE_SIZE - len, fmt: "%d.%06d ",
1143	info->als_gain[i].scale,
1144	info->als_gain[i].uscale);
1145	}
1146
1147	buf[len - 1] = '\n';
1148
1149	return len;
1150	}
1151
1152	static IIO_CONST_ATTR_INT_TIME_AVAIL("0.05 0.1 0.2 0.4");
1153	static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("20 10 5 2 1 0.5");
1154
1155	static IIO_DEVICE_ATTR(in_proximity_scale_available, S_IRUGO,
1156	ltr501_show_proximity_scale_avail, NULL, 0);
1157	static IIO_DEVICE_ATTR(in_intensity_scale_available, S_IRUGO,
1158	ltr501_show_intensity_scale_avail, NULL, 0);
1159
1160	static struct attribute *ltr501_attributes[] = {
1161	&iio_dev_attr_in_proximity_scale_available.dev_attr.attr,
1162	&iio_dev_attr_in_intensity_scale_available.dev_attr.attr,
1163	&iio_const_attr_integration_time_available.dev_attr.attr,
1164	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
1165	NULL
1166	};
1167
1168	static struct attribute *ltr301_attributes[] = {
1169	&iio_dev_attr_in_intensity_scale_available.dev_attr.attr,
1170	&iio_const_attr_integration_time_available.dev_attr.attr,
1171	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
1172	NULL
1173	};
1174
1175	static const struct attribute_group ltr501_attribute_group = {
1176	.attrs = ltr501_attributes,
1177	};
1178
1179	static const struct attribute_group ltr301_attribute_group = {
1180	.attrs = ltr301_attributes,
1181	};
1182
1183	static const struct iio_info ltr501_info_no_irq = {
1184	.read_raw = ltr501_read_raw,
1185	.write_raw = ltr501_write_raw,
1186	.attrs = &ltr501_attribute_group,
1187	};
1188
1189	static const struct iio_info ltr501_info = {
1190	.read_raw = ltr501_read_raw,
1191	.write_raw = ltr501_write_raw,
1192	.attrs = &ltr501_attribute_group,
1193	.read_event_value = &ltr501_read_event,
1194	.write_event_value = &ltr501_write_event,
1195	.read_event_config = &ltr501_read_event_config,
1196	.write_event_config = &ltr501_write_event_config,
1197	};
1198
1199	static const struct iio_info ltr301_info_no_irq = {
1200	.read_raw = ltr501_read_raw,
1201	.write_raw = ltr501_write_raw,
1202	.attrs = &ltr301_attribute_group,
1203	};
1204
1205	static const struct iio_info ltr301_info = {
1206	.read_raw = ltr501_read_raw,
1207	.write_raw = ltr501_write_raw,
1208	.attrs = &ltr301_attribute_group,
1209	.read_event_value = &ltr501_read_event,
1210	.write_event_value = &ltr501_write_event,
1211	.read_event_config = &ltr501_read_event_config,
1212	.write_event_config = &ltr501_write_event_config,
1213	};
1214
1215	static const struct ltr501_chip_info ltr501_chip_info_tbl[] = {
1216	[ltr501] = {
1217	.partid = 0x08,
1218	.als_gain = ltr501_als_gain_tbl,
1219	.als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl),
1220	.ps_gain = ltr501_ps_gain_tbl,
1221	.ps_gain_tbl_size = ARRAY_SIZE(ltr501_ps_gain_tbl),
1222	.als_mode_active = BIT(0) | BIT(1),
1223	.als_gain_mask = BIT(3),
1224	.als_gain_shift = 3,
1225	.info = &ltr501_info,
1226	.info_no_irq = &ltr501_info_no_irq,
1227	.channels = ltr501_channels,
1228	.no_channels = ARRAY_SIZE(ltr501_channels),
1229	},
1230	[ltr559] = {
1231	.partid = 0x09,
1232	.als_gain = ltr559_als_gain_tbl,
1233	.als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl),
1234	.ps_gain = ltr559_ps_gain_tbl,
1235	.ps_gain_tbl_size = ARRAY_SIZE(ltr559_ps_gain_tbl),
1236	.als_mode_active = BIT(0),
1237	.als_gain_mask = BIT(2) | BIT(3) | BIT(4),
1238	.als_gain_shift = 2,
1239	.info = &ltr501_info,
1240	.info_no_irq = &ltr501_info_no_irq,
1241	.channels = ltr501_channels,
1242	.no_channels = ARRAY_SIZE(ltr501_channels),
1243	},
1244	[ltr301] = {
1245	.partid = 0x08,
1246	.als_gain = ltr501_als_gain_tbl,
1247	.als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl),
1248	.als_mode_active = BIT(0) | BIT(1),
1249	.als_gain_mask = BIT(3),
1250	.als_gain_shift = 3,
1251	.info = &ltr301_info,
1252	.info_no_irq = &ltr301_info_no_irq,
1253	.channels = ltr301_channels,
1254	.no_channels = ARRAY_SIZE(ltr301_channels),
1255	},
1256	[ltr303] = {
1257	.partid = 0x0A,
1258	.als_gain = ltr559_als_gain_tbl,
1259	.als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl),
1260	.als_mode_active = BIT(0),
1261	.als_gain_mask = BIT(2) | BIT(3) | BIT(4),
1262	.als_gain_shift = 2,
1263	.info = &ltr301_info,
1264	.info_no_irq = &ltr301_info_no_irq,
1265	.channels = ltr301_channels,
1266	.no_channels = ARRAY_SIZE(ltr301_channels),
1267	},
1268	};
1269
1270	static int ltr501_write_contr(struct ltr501_data *data, u8 als_val, u8 ps_val)
1271	{
1272	int ret;
1273
1274	ret = regmap_write(map: data->regmap, LTR501_ALS_CONTR, val: als_val);
1275	if (ret < 0)
1276	return ret;
1277
1278	return regmap_write(map: data->regmap, LTR501_PS_CONTR, val: ps_val);
1279	}
1280
1281	static irqreturn_t ltr501_trigger_handler(int irq, void *p)
1282	{
1283	struct iio_poll_func *pf = p;
1284	struct iio_dev *indio_dev = pf->indio_dev;
1285	struct ltr501_data *data = iio_priv(indio_dev);
1286	struct {
1287	u16 channels[3];
1288	s64 ts __aligned(8);
1289	} scan;
1290	__le16 als_buf[2];
1291	u8 mask = 0;
1292	int j = 0;
1293	int ret, psdata;
1294
1295	memset(&scan, 0, sizeof(scan));
1296
1297	/* figure out which data needs to be ready */
1298	if (test_bit(0, indio_dev->active_scan_mask) ||
1299	test_bit(1, indio_dev->active_scan_mask))
1300	mask |= LTR501_STATUS_ALS_RDY;
1301	if (test_bit(2, indio_dev->active_scan_mask))
1302	mask |= LTR501_STATUS_PS_RDY;
1303
1304	ret = ltr501_drdy(data, drdy_mask: mask);
1305	if (ret < 0)
1306	goto done;
1307
1308	if (mask & LTR501_STATUS_ALS_RDY) {
1309	ret = regmap_bulk_read(map: data->regmap, LTR501_ALS_DATA1,
1310	val: als_buf, val_count: sizeof(als_buf));
1311	if (ret < 0)
1312	goto done;
1313	if (test_bit(0, indio_dev->active_scan_mask))
1314	scan.channels[j++] = le16_to_cpu(als_buf[1]);
1315	if (test_bit(1, indio_dev->active_scan_mask))
1316	scan.channels[j++] = le16_to_cpu(als_buf[0]);
1317	}
1318
1319	if (mask & LTR501_STATUS_PS_RDY) {
1320	ret = regmap_bulk_read(map: data->regmap, LTR501_PS_DATA,
1321	val: &psdata, val_count: 2);
1322	if (ret < 0)
1323	goto done;
1324	scan.channels[j++] = psdata & LTR501_PS_DATA_MASK;
1325	}
1326
1327	iio_push_to_buffers_with_timestamp(indio_dev, data: &scan,
1328	timestamp: iio_get_time_ns(indio_dev));
1329
1330	done:
1331	iio_trigger_notify_done(trig: indio_dev->trig);
1332
1333	return IRQ_HANDLED;
1334	}
1335
1336	static irqreturn_t ltr501_interrupt_handler(int irq, void *private)
1337	{
1338	struct iio_dev *indio_dev = private;
1339	struct ltr501_data *data = iio_priv(indio_dev);
1340	int ret, status;
1341
1342	ret = regmap_read(map: data->regmap, LTR501_ALS_PS_STATUS, val: &status);
1343	if (ret < 0) {
1344	dev_err(&data->client->dev,
1345	"irq read int reg failed\n");
1346	return IRQ_HANDLED;
1347	}
1348
1349	if (status & LTR501_STATUS_ALS_INTR)
1350	iio_push_event(indio_dev,
1351	IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0,
1352	IIO_EV_TYPE_THRESH,
1353	IIO_EV_DIR_EITHER),
1354	timestamp: iio_get_time_ns(indio_dev));
1355
1356	if (status & LTR501_STATUS_PS_INTR)
1357	iio_push_event(indio_dev,
1358	IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0,
1359	IIO_EV_TYPE_THRESH,
1360	IIO_EV_DIR_EITHER),
1361	timestamp: iio_get_time_ns(indio_dev));
1362
1363	return IRQ_HANDLED;
1364	}
1365
1366	static int ltr501_init(struct ltr501_data *data)
1367	{
1368	int ret, status;
1369
1370	ret = regmap_read(map: data->regmap, LTR501_ALS_CONTR, val: &status);
1371	if (ret < 0)
1372	return ret;
1373
1374	data->als_contr = status | data->chip_info->als_mode_active;
1375
1376	ret = regmap_read(map: data->regmap, LTR501_PS_CONTR, val: &status);
1377	if (ret < 0)
1378	return ret;
1379
1380	data->ps_contr = status | LTR501_CONTR_ACTIVE;
1381
1382	ret = ltr501_read_intr_prst(data, type: IIO_INTENSITY, val2: &data->als_period);
1383	if (ret < 0)
1384	return ret;
1385
1386	ret = ltr501_read_intr_prst(data, type: IIO_PROXIMITY, val2: &data->ps_period);
1387	if (ret < 0)
1388	return ret;
1389
1390	return ltr501_write_contr(data, als_val: data->als_contr, ps_val: data->ps_contr);
1391	}
1392
1393	static bool ltr501_is_volatile_reg(struct device *dev, unsigned int reg)
1394	{
1395	switch (reg) {
1396	case LTR501_ALS_DATA1:
1397	case LTR501_ALS_DATA1_UPPER:
1398	case LTR501_ALS_DATA0:
1399	case LTR501_ALS_DATA0_UPPER:
1400	case LTR501_ALS_PS_STATUS:
1401	case LTR501_PS_DATA:
1402	case LTR501_PS_DATA_UPPER:
1403	return true;
1404	default:
1405	return false;
1406	}
1407	}
1408
1409	static const struct regmap_config ltr501_regmap_config = {
1410	.name = LTR501_REGMAP_NAME,
1411	.reg_bits = 8,
1412	.val_bits = 8,
1413	.max_register = LTR501_MAX_REG,
1414	.cache_type = REGCACHE_RBTREE,
1415	.volatile_reg = ltr501_is_volatile_reg,
1416	};
1417
1418	static int ltr501_powerdown(struct ltr501_data *data)
1419	{
1420	return ltr501_write_contr(data, als_val: data->als_contr &
1421	~data->chip_info->als_mode_active,
1422	ps_val: data->ps_contr & ~LTR501_CONTR_ACTIVE);
1423	}
1424
1425	static const char *ltr501_match_acpi_device(struct device *dev, int *chip_idx)
1426	{
1427	const struct acpi_device_id *id;
1428
1429	id = acpi_match_device(ids: dev->driver->acpi_match_table, dev);
1430	if (!id)
1431	return NULL;
1432	*chip_idx = id->driver_data;
1433	return dev_name(dev);
1434	}
1435
1436	static int ltr501_probe(struct i2c_client *client)
1437	{
1438	const struct i2c_device_id *id = i2c_client_get_device_id(client);
1439	static const char * const regulator_names[] = { "vdd", "vddio" };
1440	struct ltr501_data *data;
1441	struct iio_dev *indio_dev;
1442	struct regmap *regmap;
1443	int ret, partid, chip_idx = 0;
1444	const char *name = NULL;
1445
1446	indio_dev = devm_iio_device_alloc(parent: &client->dev, sizeof_priv: sizeof(*data));
1447	if (!indio_dev)
1448	return -ENOMEM;
1449
1450	regmap = devm_regmap_init_i2c(client, &ltr501_regmap_config);
1451	if (IS_ERR(ptr: regmap)) {
1452	dev_err(&client->dev, "Regmap initialization failed.\n");
1453	return PTR_ERR(ptr: regmap);
1454	}
1455
1456	data = iio_priv(indio_dev);
1457	i2c_set_clientdata(client, data: indio_dev);
1458	data->client = client;
1459	data->regmap = regmap;
1460	mutex_init(&data->lock_als);
1461	mutex_init(&data->lock_ps);
1462
1463	ret = devm_regulator_bulk_get_enable(dev: &client->dev,
1464	ARRAY_SIZE(regulator_names),
1465	id: regulator_names);
1466	if (ret)
1467	return dev_err_probe(dev: &client->dev, err: ret,
1468	fmt: "Failed to get regulators\n");
1469
1470	data->reg_it = devm_regmap_field_alloc(dev: &client->dev, regmap,
1471	reg_field: reg_field_it);
1472	if (IS_ERR(ptr: data->reg_it)) {
1473	dev_err(&client->dev, "Integ time reg field init failed.\n");
1474	return PTR_ERR(ptr: data->reg_it);
1475	}
1476
1477	data->reg_als_intr = devm_regmap_field_alloc(dev: &client->dev, regmap,
1478	reg_field: reg_field_als_intr);
1479	if (IS_ERR(ptr: data->reg_als_intr)) {
1480	dev_err(&client->dev, "ALS intr mode reg field init failed\n");
1481	return PTR_ERR(ptr: data->reg_als_intr);
1482	}
1483
1484	data->reg_ps_intr = devm_regmap_field_alloc(dev: &client->dev, regmap,
1485	reg_field: reg_field_ps_intr);
1486	if (IS_ERR(ptr: data->reg_ps_intr)) {
1487	dev_err(&client->dev, "PS intr mode reg field init failed.\n");
1488	return PTR_ERR(ptr: data->reg_ps_intr);
1489	}
1490
1491	data->reg_als_rate = devm_regmap_field_alloc(dev: &client->dev, regmap,
1492	reg_field: reg_field_als_rate);
1493	if (IS_ERR(ptr: data->reg_als_rate)) {
1494	dev_err(&client->dev, "ALS samp rate field init failed.\n");
1495	return PTR_ERR(ptr: data->reg_als_rate);
1496	}
1497
1498	data->reg_ps_rate = devm_regmap_field_alloc(dev: &client->dev, regmap,
1499	reg_field: reg_field_ps_rate);
1500	if (IS_ERR(ptr: data->reg_ps_rate)) {
1501	dev_err(&client->dev, "PS samp rate field init failed.\n");
1502	return PTR_ERR(ptr: data->reg_ps_rate);
1503	}
1504
1505	data->reg_als_prst = devm_regmap_field_alloc(dev: &client->dev, regmap,
1506	reg_field: reg_field_als_prst);
1507	if (IS_ERR(ptr: data->reg_als_prst)) {
1508	dev_err(&client->dev, "ALS prst reg field init failed\n");
1509	return PTR_ERR(ptr: data->reg_als_prst);
1510	}
1511
1512	data->reg_ps_prst = devm_regmap_field_alloc(dev: &client->dev, regmap,
1513	reg_field: reg_field_ps_prst);
1514	if (IS_ERR(ptr: data->reg_ps_prst)) {
1515	dev_err(&client->dev, "PS prst reg field init failed.\n");
1516	return PTR_ERR(ptr: data->reg_ps_prst);
1517	}
1518
1519	ret = regmap_read(map: data->regmap, LTR501_PART_ID, val: &partid);
1520	if (ret < 0)
1521	return ret;
1522
1523	if (id) {
1524	name = id->name;
1525	chip_idx = id->driver_data;
1526	} else if (ACPI_HANDLE(&client->dev)) {
1527	name = ltr501_match_acpi_device(dev: &client->dev, chip_idx: &chip_idx);
1528	} else {
1529	return -ENODEV;
1530	}
1531
1532	data->chip_info = &ltr501_chip_info_tbl[chip_idx];
1533
1534	if ((partid >> 4) != data->chip_info->partid)
1535	return -ENODEV;
1536
1537	if (device_property_read_u32(dev: &client->dev, propname: "proximity-near-level",
1538	val: &data->near_level))
1539	data->near_level = 0;
1540
1541	indio_dev->info = data->chip_info->info;
1542	indio_dev->channels = data->chip_info->channels;
1543	indio_dev->num_channels = data->chip_info->no_channels;
1544	indio_dev->name = name;
1545	indio_dev->modes = INDIO_DIRECT_MODE;
1546
1547	ret = ltr501_init(data);
1548	if (ret < 0)
1549	return ret;
1550
1551	if (client->irq > 0) {
1552	ret = devm_request_threaded_irq(dev: &client->dev, irq: client->irq,
1553	NULL, thread_fn: ltr501_interrupt_handler,
1554	IRQF_TRIGGER_FALLING |
1555	IRQF_ONESHOT,
1556	devname: "ltr501_thresh_event",
1557	dev_id: indio_dev);
1558	if (ret) {
1559	dev_err(&client->dev, "request irq (%d) failed\n",
1560	client->irq);
1561	return ret;
1562	}
1563	} else {
1564	indio_dev->info = data->chip_info->info_no_irq;
1565	}
1566
1567	ret = iio_triggered_buffer_setup(indio_dev, NULL,
1568	ltr501_trigger_handler, NULL);
1569	if (ret)
1570	goto powerdown_on_error;
1571
1572	ret = iio_device_register(indio_dev);
1573	if (ret)
1574	goto error_unreg_buffer;
1575
1576	return 0;
1577
1578	error_unreg_buffer:
1579	iio_triggered_buffer_cleanup(indio_dev);
1580	powerdown_on_error:
1581	ltr501_powerdown(data);
1582	return ret;
1583	}
1584
1585	static void ltr501_remove(struct i2c_client *client)
1586	{
1587	struct iio_dev *indio_dev = i2c_get_clientdata(client);
1588
1589	iio_device_unregister(indio_dev);
1590	iio_triggered_buffer_cleanup(indio_dev);
1591	ltr501_powerdown(data: iio_priv(indio_dev));
1592	}
1593
1594	static int ltr501_suspend(struct device *dev)
1595	{
1596	struct ltr501_data *data = iio_priv(indio_dev: i2c_get_clientdata(
1597	to_i2c_client(dev)));
1598	return ltr501_powerdown(data);
1599	}
1600
1601	static int ltr501_resume(struct device *dev)
1602	{
1603	struct ltr501_data *data = iio_priv(indio_dev: i2c_get_clientdata(
1604	to_i2c_client(dev)));
1605
1606	return ltr501_write_contr(data, als_val: data->als_contr,
1607	ps_val: data->ps_contr);
1608	}
1609
1610	static DEFINE_SIMPLE_DEV_PM_OPS(ltr501_pm_ops, ltr501_suspend, ltr501_resume);
1611
1612	static const struct acpi_device_id ltr_acpi_match[] = {
1613	{ "LTER0501", ltr501 },
1614	{ "LTER0559", ltr559 },
1615	{ "LTER0301", ltr301 },
1616	{ },
1617	};
1618	MODULE_DEVICE_TABLE(acpi, ltr_acpi_match);
1619
1620	static const struct i2c_device_id ltr501_id[] = {
1621	{ "ltr501", ltr501 },
1622	{ "ltr559", ltr559 },
1623	{ "ltr301", ltr301 },
1624	{ "ltr303", ltr303 },
1625	{ }
1626	};
1627	MODULE_DEVICE_TABLE(i2c, ltr501_id);
1628
1629	static const struct of_device_id ltr501_of_match[] = {
1630	{ .compatible = "liteon,ltr501", },
1631	{ .compatible = "liteon,ltr559", },
1632	{ .compatible = "liteon,ltr301", },
1633	{ .compatible = "liteon,ltr303", },
1634	{}
1635	};
1636	MODULE_DEVICE_TABLE(of, ltr501_of_match);
1637
1638	static struct i2c_driver ltr501_driver = {
1639	.driver = {
1640	.name = LTR501_DRV_NAME,
1641	.of_match_table = ltr501_of_match,
1642	.pm = pm_sleep_ptr(&ltr501_pm_ops),
1643	.acpi_match_table = ltr_acpi_match,
1644	},
1645	.probe = ltr501_probe,
1646	.remove = ltr501_remove,
1647	.id_table = ltr501_id,
1648	};
1649
1650	module_i2c_driver(ltr501_driver);
1651
1652	MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
1653	MODULE_DESCRIPTION("Lite-On LTR501 ambient light and proximity sensor driver");
1654	MODULE_LICENSE("GPL");
1655