1 | /* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */ |
2 | /* Copyright (C) 2019--2020 Intel Corporation */ |
3 | /* |
4 | * Generated by Documentation/driver-api/media/drivers/ccs/mk-ccs-regs; |
5 | * do not modify. |
6 | */ |
7 | |
8 | #ifndef __CCS_LIMITS_H__ |
9 | #define __CCS_LIMITS_H__ |
10 | |
11 | #include <linux/bits.h> |
12 | #include <linux/types.h> |
13 | |
14 | struct ccs_limit { |
15 | u32 reg; |
16 | u16 size; |
17 | u16 flags; |
18 | const char *name; |
19 | }; |
20 | |
21 | #define CCS_L_FL_SAME_REG BIT(0) |
22 | |
23 | extern const struct ccs_limit ccs_limits[]; |
24 | |
25 | #define CCS_L_FRAME_FORMAT_MODEL_TYPE 0 |
26 | #define CCS_L_FRAME_FORMAT_MODEL_SUBTYPE 1 |
27 | #define CCS_L_FRAME_FORMAT_DESCRIPTOR 2 |
28 | #define CCS_L_FRAME_FORMAT_DESCRIPTOR_OFFSET(n) ((n) * 2) |
29 | #define CCS_L_FRAME_FORMAT_DESCRIPTOR_4 3 |
30 | #define CCS_L_FRAME_FORMAT_DESCRIPTOR_4_OFFSET(n) ((n) * 4) |
31 | #define CCS_L_ANALOG_GAIN_CAPABILITY 4 |
32 | #define CCS_L_ANALOG_GAIN_CODE_MIN 5 |
33 | #define CCS_L_ANALOG_GAIN_CODE_MAX 6 |
34 | #define CCS_L_ANALOG_GAIN_CODE_STEP 7 |
35 | #define CCS_L_ANALOG_GAIN_TYPE 8 |
36 | #define CCS_L_ANALOG_GAIN_M0 9 |
37 | #define CCS_L_ANALOG_GAIN_C0 10 |
38 | #define CCS_L_ANALOG_GAIN_M1 11 |
39 | #define CCS_L_ANALOG_GAIN_C1 12 |
40 | #define CCS_L_ANALOG_LINEAR_GAIN_MIN 13 |
41 | #define CCS_L_ANALOG_LINEAR_GAIN_MAX 14 |
42 | #define CCS_L_ANALOG_LINEAR_GAIN_STEP_SIZE 15 |
43 | #define CCS_L_ANALOG_EXPONENTIAL_GAIN_MIN 16 |
44 | #define CCS_L_ANALOG_EXPONENTIAL_GAIN_MAX 17 |
45 | #define CCS_L_ANALOG_EXPONENTIAL_GAIN_STEP_SIZE 18 |
46 | #define CCS_L_DATA_FORMAT_MODEL_TYPE 19 |
47 | #define CCS_L_DATA_FORMAT_MODEL_SUBTYPE 20 |
48 | #define CCS_L_DATA_FORMAT_DESCRIPTOR 21 |
49 | #define CCS_L_DATA_FORMAT_DESCRIPTOR_OFFSET(n) ((n) * 2) |
50 | #define CCS_L_INTEGRATION_TIME_CAPABILITY 22 |
51 | #define CCS_L_COARSE_INTEGRATION_TIME_MIN 23 |
52 | #define CCS_L_COARSE_INTEGRATION_TIME_MAX_MARGIN 24 |
53 | #define CCS_L_FINE_INTEGRATION_TIME_MIN 25 |
54 | #define CCS_L_FINE_INTEGRATION_TIME_MAX_MARGIN 26 |
55 | #define CCS_L_DIGITAL_GAIN_CAPABILITY 27 |
56 | #define CCS_L_DIGITAL_GAIN_MIN 28 |
57 | #define CCS_L_DIGITAL_GAIN_MAX 29 |
58 | #define CCS_L_DIGITAL_GAIN_STEP_SIZE 30 |
59 | #define CCS_L_PEDESTAL_CAPABILITY 31 |
60 | #define CCS_L_ADC_CAPABILITY 32 |
61 | #define CCS_L_ADC_BIT_DEPTH_CAPABILITY 33 |
62 | #define CCS_L_MIN_EXT_CLK_FREQ_MHZ 34 |
63 | #define CCS_L_MAX_EXT_CLK_FREQ_MHZ 35 |
64 | #define CCS_L_MIN_PRE_PLL_CLK_DIV 36 |
65 | #define CCS_L_MAX_PRE_PLL_CLK_DIV 37 |
66 | #define CCS_L_MIN_PLL_IP_CLK_FREQ_MHZ 38 |
67 | #define CCS_L_MAX_PLL_IP_CLK_FREQ_MHZ 39 |
68 | #define CCS_L_MIN_PLL_MULTIPLIER 40 |
69 | #define CCS_L_MAX_PLL_MULTIPLIER 41 |
70 | #define CCS_L_MIN_PLL_OP_CLK_FREQ_MHZ 42 |
71 | #define CCS_L_MAX_PLL_OP_CLK_FREQ_MHZ 43 |
72 | #define CCS_L_MIN_VT_SYS_CLK_DIV 44 |
73 | #define CCS_L_MAX_VT_SYS_CLK_DIV 45 |
74 | #define CCS_L_MIN_VT_SYS_CLK_FREQ_MHZ 46 |
75 | #define CCS_L_MAX_VT_SYS_CLK_FREQ_MHZ 47 |
76 | #define CCS_L_MIN_VT_PIX_CLK_FREQ_MHZ 48 |
77 | #define CCS_L_MAX_VT_PIX_CLK_FREQ_MHZ 49 |
78 | #define CCS_L_MIN_VT_PIX_CLK_DIV 50 |
79 | #define CCS_L_MAX_VT_PIX_CLK_DIV 51 |
80 | #define CCS_L_CLOCK_CALCULATION 52 |
81 | #define CCS_L_NUM_OF_VT_LANES 53 |
82 | #define CCS_L_NUM_OF_OP_LANES 54 |
83 | #define CCS_L_OP_BITS_PER_LANE 55 |
84 | #define CCS_L_MIN_FRAME_LENGTH_LINES 56 |
85 | #define CCS_L_MAX_FRAME_LENGTH_LINES 57 |
86 | #define CCS_L_MIN_LINE_LENGTH_PCK 58 |
87 | #define CCS_L_MAX_LINE_LENGTH_PCK 59 |
88 | #define CCS_L_MIN_LINE_BLANKING_PCK 60 |
89 | #define CCS_L_MIN_FRAME_BLANKING_LINES 61 |
90 | #define CCS_L_MIN_LINE_LENGTH_PCK_STEP_SIZE 62 |
91 | #define CCS_L_TIMING_MODE_CAPABILITY 63 |
92 | #define CCS_L_FRAME_MARGIN_MAX_VALUE 64 |
93 | #define CCS_L_FRAME_MARGIN_MIN_VALUE 65 |
94 | #define CCS_L_GAIN_DELAY_TYPE 66 |
95 | #define CCS_L_MIN_OP_SYS_CLK_DIV 67 |
96 | #define CCS_L_MAX_OP_SYS_CLK_DIV 68 |
97 | #define CCS_L_MIN_OP_SYS_CLK_FREQ_MHZ 69 |
98 | #define CCS_L_MAX_OP_SYS_CLK_FREQ_MHZ 70 |
99 | #define CCS_L_MIN_OP_PIX_CLK_DIV 71 |
100 | #define CCS_L_MAX_OP_PIX_CLK_DIV 72 |
101 | #define CCS_L_MIN_OP_PIX_CLK_FREQ_MHZ 73 |
102 | #define CCS_L_MAX_OP_PIX_CLK_FREQ_MHZ 74 |
103 | #define CCS_L_X_ADDR_MIN 75 |
104 | #define CCS_L_Y_ADDR_MIN 76 |
105 | #define CCS_L_X_ADDR_MAX 77 |
106 | #define CCS_L_Y_ADDR_MAX 78 |
107 | #define CCS_L_MIN_X_OUTPUT_SIZE 79 |
108 | #define CCS_L_MIN_Y_OUTPUT_SIZE 80 |
109 | #define CCS_L_MAX_X_OUTPUT_SIZE 81 |
110 | #define CCS_L_MAX_Y_OUTPUT_SIZE 82 |
111 | #define CCS_L_X_ADDR_START_DIV_CONSTANT 83 |
112 | #define CCS_L_Y_ADDR_START_DIV_CONSTANT 84 |
113 | #define CCS_L_X_ADDR_END_DIV_CONSTANT 85 |
114 | #define CCS_L_Y_ADDR_END_DIV_CONSTANT 86 |
115 | #define CCS_L_X_SIZE_DIV 87 |
116 | #define CCS_L_Y_SIZE_DIV 88 |
117 | #define CCS_L_X_OUTPUT_DIV 89 |
118 | #define CCS_L_Y_OUTPUT_DIV 90 |
119 | #define CCS_L_NON_FLEXIBLE_RESOLUTION_SUPPORT 91 |
120 | #define CCS_L_MIN_OP_PRE_PLL_CLK_DIV 92 |
121 | #define CCS_L_MAX_OP_PRE_PLL_CLK_DIV 93 |
122 | #define CCS_L_MIN_OP_PLL_IP_CLK_FREQ_MHZ 94 |
123 | #define CCS_L_MAX_OP_PLL_IP_CLK_FREQ_MHZ 95 |
124 | #define CCS_L_MIN_OP_PLL_MULTIPLIER 96 |
125 | #define CCS_L_MAX_OP_PLL_MULTIPLIER 97 |
126 | #define CCS_L_MIN_OP_PLL_OP_CLK_FREQ_MHZ 98 |
127 | #define CCS_L_MAX_OP_PLL_OP_CLK_FREQ_MHZ 99 |
128 | #define CCS_L_CLOCK_TREE_PLL_CAPABILITY 100 |
129 | #define CCS_L_CLOCK_CAPA_TYPE_CAPABILITY 101 |
130 | #define CCS_L_MIN_EVEN_INC 102 |
131 | #define CCS_L_MIN_ODD_INC 103 |
132 | #define CCS_L_MAX_EVEN_INC 104 |
133 | #define CCS_L_MAX_ODD_INC 105 |
134 | #define CCS_L_AUX_SUBSAMP_CAPABILITY 106 |
135 | #define CCS_L_AUX_SUBSAMP_MONO_CAPABILITY 107 |
136 | #define CCS_L_MONOCHROME_CAPABILITY 108 |
137 | #define CCS_L_PIXEL_READOUT_CAPABILITY 109 |
138 | #define CCS_L_MIN_EVEN_INC_MONO 110 |
139 | #define CCS_L_MAX_EVEN_INC_MONO 111 |
140 | #define CCS_L_MIN_ODD_INC_MONO 112 |
141 | #define CCS_L_MAX_ODD_INC_MONO 113 |
142 | #define CCS_L_MIN_EVEN_INC_BC2 114 |
143 | #define CCS_L_MAX_EVEN_INC_BC2 115 |
144 | #define CCS_L_MIN_ODD_INC_BC2 116 |
145 | #define CCS_L_MAX_ODD_INC_BC2 117 |
146 | #define CCS_L_MIN_EVEN_INC_MONO_BC2 118 |
147 | #define CCS_L_MAX_EVEN_INC_MONO_BC2 119 |
148 | #define CCS_L_MIN_ODD_INC_MONO_BC2 120 |
149 | #define CCS_L_MAX_ODD_INC_MONO_BC2 121 |
150 | #define CCS_L_SCALING_CAPABILITY 122 |
151 | #define CCS_L_SCALER_M_MIN 123 |
152 | #define CCS_L_SCALER_M_MAX 124 |
153 | #define CCS_L_SCALER_N_MIN 125 |
154 | #define CCS_L_SCALER_N_MAX 126 |
155 | #define CCS_L_DIGITAL_CROP_CAPABILITY 127 |
156 | #define CCS_L_HDR_CAPABILITY_1 128 |
157 | #define CCS_L_MIN_HDR_BIT_DEPTH 129 |
158 | #define CCS_L_HDR_RESOLUTION_SUB_TYPES 130 |
159 | #define CCS_L_HDR_RESOLUTION_SUB_TYPE 131 |
160 | #define CCS_L_HDR_RESOLUTION_SUB_TYPE_OFFSET(n) (n) |
161 | #define CCS_L_HDR_CAPABILITY_2 132 |
162 | #define CCS_L_MAX_HDR_BIT_DEPTH 133 |
163 | #define CCS_L_USL_SUPPORT_CAPABILITY 134 |
164 | #define CCS_L_USL_CLOCK_MODE_D_CAPABILITY 135 |
165 | #define CCS_L_MIN_OP_SYS_CLK_DIV_REV 136 |
166 | #define CCS_L_MAX_OP_SYS_CLK_DIV_REV 137 |
167 | #define CCS_L_MIN_OP_PIX_CLK_DIV_REV 138 |
168 | #define CCS_L_MAX_OP_PIX_CLK_DIV_REV 139 |
169 | #define CCS_L_MIN_OP_SYS_CLK_FREQ_REV_MHZ 140 |
170 | #define CCS_L_MAX_OP_SYS_CLK_FREQ_REV_MHZ 141 |
171 | #define CCS_L_MIN_OP_PIX_CLK_FREQ_REV_MHZ 142 |
172 | #define CCS_L_MAX_OP_PIX_CLK_FREQ_REV_MHZ 143 |
173 | #define CCS_L_MAX_BITRATE_REV_D_MODE_MBPS 144 |
174 | #define CCS_L_MAX_SYMRATE_REV_C_MODE_MSPS 145 |
175 | #define CCS_L_COMPRESSION_CAPABILITY 146 |
176 | #define CCS_L_TEST_MODE_CAPABILITY 147 |
177 | #define CCS_L_PN9_DATA_FORMAT1 148 |
178 | #define CCS_L_PN9_DATA_FORMAT2 149 |
179 | #define CCS_L_PN9_DATA_FORMAT3 150 |
180 | #define CCS_L_PN9_DATA_FORMAT4 151 |
181 | #define CCS_L_PN9_MISC_CAPABILITY 152 |
182 | #define CCS_L_TEST_PATTERN_CAPABILITY 153 |
183 | #define CCS_L_PATTERN_SIZE_DIV_M1 154 |
184 | #define CCS_L_FIFO_SUPPORT_CAPABILITY 155 |
185 | #define CCS_L_PHY_CTRL_CAPABILITY 156 |
186 | #define CCS_L_CSI_DPHY_LANE_MODE_CAPABILITY 157 |
187 | #define CCS_L_CSI_SIGNALING_MODE_CAPABILITY 158 |
188 | #define CCS_L_FAST_STANDBY_CAPABILITY 159 |
189 | #define CCS_L_CSI_ADDRESS_CONTROL_CAPABILITY 160 |
190 | #define CCS_L_DATA_TYPE_CAPABILITY 161 |
191 | #define CCS_L_CSI_CPHY_LANE_MODE_CAPABILITY 162 |
192 | #define CCS_L_EMB_DATA_CAPABILITY 163 |
193 | #define CCS_L_MAX_PER_LANE_BITRATE_LANE_D_MODE_MBPS 164 |
194 | #define CCS_L_MAX_PER_LANE_BITRATE_LANE_D_MODE_MBPS_OFFSET(n) ((n) * 4) |
195 | #define CCS_L_TEMP_SENSOR_CAPABILITY 165 |
196 | #define CCS_L_MAX_PER_LANE_BITRATE_LANE_C_MODE_MBPS 166 |
197 | #define CCS_L_MAX_PER_LANE_BITRATE_LANE_C_MODE_MBPS_OFFSET(n) ((n) * 4) |
198 | #define CCS_L_DPHY_EQUALIZATION_CAPABILITY 167 |
199 | #define CCS_L_CPHY_EQUALIZATION_CAPABILITY 168 |
200 | #define CCS_L_DPHY_PREAMBLE_CAPABILITY 169 |
201 | #define CCS_L_DPHY_SSC_CAPABILITY 170 |
202 | #define CCS_L_CPHY_CALIBRATION_CAPABILITY 171 |
203 | #define CCS_L_DPHY_CALIBRATION_CAPABILITY 172 |
204 | #define CCS_L_PHY_CTRL_CAPABILITY_2 173 |
205 | #define CCS_L_LRTE_CPHY_CAPABILITY 174 |
206 | #define CCS_L_LRTE_DPHY_CAPABILITY 175 |
207 | #define CCS_L_ALPS_CAPABILITY_DPHY 176 |
208 | #define CCS_L_ALPS_CAPABILITY_CPHY 177 |
209 | #define CCS_L_SCRAMBLING_CAPABILITY 178 |
210 | #define CCS_L_DPHY_MANUAL_CONSTANT 179 |
211 | #define CCS_L_CPHY_MANUAL_CONSTANT 180 |
212 | #define CCS_L_CSI2_INTERFACE_CAPABILITY_MISC 181 |
213 | #define CCS_L_PHY_CTRL_CAPABILITY_3 182 |
214 | #define CCS_L_DPHY_SF 183 |
215 | #define CCS_L_CPHY_SF 184 |
216 | #define CCS_L_DPHY_LIMITS_1 185 |
217 | #define CCS_L_DPHY_LIMITS_2 186 |
218 | #define CCS_L_DPHY_LIMITS_3 187 |
219 | #define CCS_L_DPHY_LIMITS_4 188 |
220 | #define CCS_L_DPHY_LIMITS_5 189 |
221 | #define CCS_L_DPHY_LIMITS_6 190 |
222 | #define CCS_L_CPHY_LIMITS_1 191 |
223 | #define CCS_L_CPHY_LIMITS_2 192 |
224 | #define CCS_L_CPHY_LIMITS_3 193 |
225 | #define CCS_L_MIN_FRAME_LENGTH_LINES_BIN 194 |
226 | #define CCS_L_MAX_FRAME_LENGTH_LINES_BIN 195 |
227 | #define CCS_L_MIN_LINE_LENGTH_PCK_BIN 196 |
228 | #define CCS_L_MAX_LINE_LENGTH_PCK_BIN 197 |
229 | #define CCS_L_MIN_LINE_BLANKING_PCK_BIN 198 |
230 | #define CCS_L_FINE_INTEGRATION_TIME_MIN_BIN 199 |
231 | #define CCS_L_FINE_INTEGRATION_TIME_MAX_MARGIN_BIN 200 |
232 | #define CCS_L_BINNING_CAPABILITY 201 |
233 | #define CCS_L_BINNING_WEIGHTING_CAPABILITY 202 |
234 | #define CCS_L_BINNING_SUB_TYPES 203 |
235 | #define CCS_L_BINNING_SUB_TYPE 204 |
236 | #define CCS_L_BINNING_SUB_TYPE_OFFSET(n) (n) |
237 | #define CCS_L_BINNING_WEIGHTING_MONO_CAPABILITY 205 |
238 | #define CCS_L_BINNING_SUB_TYPES_MONO 206 |
239 | #define CCS_L_BINNING_SUB_TYPE_MONO 207 |
240 | #define CCS_L_BINNING_SUB_TYPE_MONO_OFFSET(n) (n) |
241 | #define CCS_L_DATA_TRANSFER_IF_CAPABILITY 208 |
242 | #define CCS_L_SHADING_CORRECTION_CAPABILITY 209 |
243 | #define CCS_L_GREEN_IMBALANCE_CAPABILITY 210 |
244 | #define CCS_L_MODULE_SPECIFIC_CORRECTION_CAPABILITY 211 |
245 | #define CCS_L_DEFECT_CORRECTION_CAPABILITY 212 |
246 | #define CCS_L_DEFECT_CORRECTION_CAPABILITY_2 213 |
247 | #define CCS_L_NF_CAPABILITY 214 |
248 | #define CCS_L_OB_READOUT_CAPABILITY 215 |
249 | #define CCS_L_COLOR_FEEDBACK_CAPABILITY 216 |
250 | #define CCS_L_CFA_PATTERN_CAPABILITY 217 |
251 | #define CCS_L_CFA_PATTERN_CONVERSION_CAPABILITY 218 |
252 | #define CCS_L_FLASH_MODE_CAPABILITY 219 |
253 | #define CCS_L_SA_STROBE_MODE_CAPABILITY 220 |
254 | #define CCS_L_RESET_MAX_DELAY 221 |
255 | #define CCS_L_RESET_MIN_TIME 222 |
256 | #define CCS_L_PDAF_CAPABILITY_1 223 |
257 | #define CCS_L_PDAF_CAPABILITY_2 224 |
258 | #define CCS_L_BRACKETING_LUT_CAPABILITY_1 225 |
259 | #define CCS_L_BRACKETING_LUT_CAPABILITY_2 226 |
260 | #define CCS_L_BRACKETING_LUT_SIZE 227 |
261 | #define CCS_L_LAST 228 |
262 | |
263 | #endif /* __CCS_LIMITS_H__ */ |
264 | |