| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * drivers/media/i2c/smiapp/smiapp-reg-defs.h |
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| 4 | * |
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| 5 | * Generic driver for MIPI CCS/SMIA/SMIA++ compliant camera sensors |
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| 6 | * |
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| 7 | * Copyright (C) 2020 Intel Corporation |
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| 8 | * Copyright (C) 2011--2012 Nokia Corporation |
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| 9 | * Contact: Sakari Ailus <sakari.ailus@iki.fi> |
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| 10 | */ |
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| 11 | |
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| 12 | #ifndef __SMIAPP_REG_DEFS_H__ |
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| 13 | #define __SMIAPP_REG_DEFS_H__ |
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| 14 | |
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| 15 | #include <linux/bits.h> |
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| 16 | #include <media/v4l2-cci.h> |
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| 17 | |
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| 18 | /* Register addresses */ |
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| 19 | #define SMIAPP_REG_U16_MODEL_ID CCI_REG16(0x0000) |
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| 20 | #define SMIAPP_REG_U8_REVISION_NUMBER_MAJOR CCI_REG8(0x0002) |
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| 21 | #define SMIAPP_REG_U8_MANUFACTURER_ID CCI_REG8(0x0003) |
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| 22 | #define SMIAPP_REG_U8_SMIA_VERSION CCI_REG8(0x0004) |
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| 23 | #define SMIAPP_REG_U8_FRAME_COUNT CCI_REG8(0x0005) |
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| 24 | #define SMIAPP_REG_U8_PIXEL_ORDER CCI_REG8(0x0006) |
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| 25 | #define SMIAPP_REG_U16_DATA_PEDESTAL CCI_REG16(0x0008) |
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| 26 | #define SMIAPP_REG_U8_PIXEL_DEPTH CCI_REG8(0x000c) |
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| 27 | #define SMIAPP_REG_U8_REVISION_NUMBER_MINOR CCI_REG8(0x0010) |
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| 28 | #define SMIAPP_REG_U8_SMIAPP_VERSION CCI_REG8(0x0011) |
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| 29 | #define SMIAPP_REG_U8_MODULE_DATE_YEAR CCI_REG8(0x0012) |
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| 30 | #define SMIAPP_REG_U8_MODULE_DATE_MONTH CCI_REG8(0x0013) |
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| 31 | #define SMIAPP_REG_U8_MODULE_DATE_DAY CCI_REG8(0x0014) |
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| 32 | #define SMIAPP_REG_U8_MODULE_DATE_PHASE CCI_REG8(0x0015) |
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| 33 | #define SMIAPP_REG_U16_SENSOR_MODEL_ID CCI_REG16(0x0016) |
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| 34 | #define SMIAPP_REG_U8_SENSOR_REVISION_NUMBER CCI_REG8(0x0018) |
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| 35 | #define SMIAPP_REG_U8_SENSOR_MANUFACTURER_ID CCI_REG8(0x0019) |
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| 36 | #define SMIAPP_REG_U8_SENSOR_FIRMWARE_VERSION CCI_REG8(0x001a) |
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| 37 | #define SMIAPP_REG_U32_SERIAL_NUMBER CCI_REG32(0x001c) |
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| 38 | #define SMIAPP_REG_U8_FRAME_FORMAT_MODEL_TYPE CCI_REG8(0x0040) |
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| 39 | #define SMIAPP_REG_U8_FRAME_FORMAT_MODEL_SUBTYPE CCI_REG8(0x0041) |
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| 40 | #define SMIAPP_REG_U16_FRAME_FORMAT_DESCRIPTOR_2(n) CCI_REG16(0x0042 + ((n) << 1)) /* 0 <= n <= 14 */ |
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| 41 | #define SMIAPP_REG_U32_FRAME_FORMAT_DESCRIPTOR_4(n) CCI_REG32(0x0060 + ((n) << 2)) /* 0 <= n <= 7 */ |
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| 42 | #define SMIAPP_REG_U16_ANALOGUE_GAIN_CAPABILITY CCI_REG16(0x0080) |
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| 43 | #define SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_MIN CCI_REG16(0x0084) |
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| 44 | #define SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_MAX CCI_REG16(0x0086) |
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| 45 | #define SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_STEP CCI_REG16(0x0088) |
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| 46 | #define SMIAPP_REG_U16_ANALOGUE_GAIN_TYPE CCI_REG16(0x008a) |
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| 47 | #define SMIAPP_REG_U16_ANALOGUE_GAIN_M0 CCI_REG16(0x008c) |
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| 48 | #define SMIAPP_REG_U16_ANALOGUE_GAIN_C0 CCI_REG16(0x008e) |
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| 49 | #define SMIAPP_REG_U16_ANALOGUE_GAIN_M1 CCI_REG16(0x0090) |
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| 50 | #define SMIAPP_REG_U16_ANALOGUE_GAIN_C1 CCI_REG16(0x0092) |
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| 51 | #define SMIAPP_REG_U8_DATA_FORMAT_MODEL_TYPE CCI_REG8(0x00c0) |
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| 52 | #define SMIAPP_REG_U8_DATA_FORMAT_MODEL_SUBTYPE CCI_REG8(0x00c1) |
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| 53 | #define SMIAPP_REG_U16_DATA_FORMAT_DESCRIPTOR(n) CCI_REG16(0x00c2 + ((n) << 1)) |
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| 54 | #define SMIAPP_REG_U8_MODE_SELECT CCI_REG8(0x0100) |
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| 55 | #define SMIAPP_REG_U8_IMAGE_ORIENTATION CCI_REG8(0x0101) |
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| 56 | #define SMIAPP_REG_U8_SOFTWARE_RESET CCI_REG8(0x0103) |
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| 57 | #define SMIAPP_REG_U8_GROUPED_PARAMETER_HOLD CCI_REG8(0x0104) |
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| 58 | #define SMIAPP_REG_U8_MASK_CORRUPTED_FRAMES CCI_REG8(0x0105) |
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| 59 | #define SMIAPP_REG_U8_FAST_STANDBY_CTRL CCI_REG8(0x0106) |
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| 60 | #define SMIAPP_REG_U8_CCI_ADDRESS_CONTROL CCI_REG8(0x0107) |
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| 61 | #define SMIAPP_REG_U8_2ND_CCI_IF_CONTROL CCI_REG8(0x0108) |
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| 62 | #define SMIAPP_REG_U8_2ND_CCI_ADDRESS_CONTROL CCI_REG8(0x0109) |
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| 63 | #define SMIAPP_REG_U8_CSI_CHANNEL_IDENTIFIER CCI_REG8(0x0110) |
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| 64 | #define SMIAPP_REG_U8_CSI_SIGNALLING_MODE CCI_REG8(0x0111) |
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| 65 | #define SMIAPP_REG_U16_CSI_DATA_FORMAT CCI_REG16(0x0112) |
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| 66 | #define SMIAPP_REG_U8_CSI_LANE_MODE CCI_REG8(0x0114) |
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| 67 | #define SMIAPP_REG_U8_CSI2_10_TO_8_DT CCI_REG8(0x0115) |
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| 68 | #define SMIAPP_REG_U8_CSI2_10_TO_7_DT CCI_REG8(0x0116) |
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| 69 | #define SMIAPP_REG_U8_CSI2_10_TO_6_DT CCI_REG8(0x0117) |
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| 70 | #define SMIAPP_REG_U8_CSI2_12_TO_8_DT CCI_REG8(0x0118) |
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| 71 | #define SMIAPP_REG_U8_CSI2_12_TO_7_DT CCI_REG8(0x0119) |
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| 72 | #define SMIAPP_REG_U8_CSI2_12_TO_6_DT CCI_REG8(0x011a) |
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| 73 | #define SMIAPP_REG_U8_CSI2_14_TO_10_DT CCI_REG8(0x011b) |
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| 74 | #define SMIAPP_REG_U8_CSI2_14_TO_8_DT CCI_REG8(0x011c) |
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| 75 | #define SMIAPP_REG_U8_CSI2_16_TO_10_DT CCI_REG8(0x011d) |
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| 76 | #define SMIAPP_REG_U8_CSI2_16_TO_8_DT CCI_REG8(0x011e) |
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| 77 | #define SMIAPP_REG_U8_GAIN_MODE CCI_REG8(0x0120) |
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| 78 | #define SMIAPP_REG_U16_VANA_VOLTAGE CCI_REG16(0x0130) |
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| 79 | #define SMIAPP_REG_U16_VDIG_VOLTAGE CCI_REG16(0x0132) |
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| 80 | #define SMIAPP_REG_U16_VIO_VOLTAGE CCI_REG16(0x0134) |
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| 81 | #define SMIAPP_REG_U16_EXTCLK_FREQUENCY_MHZ CCI_REG16(0x0136) |
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| 82 | #define SMIAPP_REG_U8_TEMP_SENSOR_CONTROL CCI_REG8(0x0138) |
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| 83 | #define SMIAPP_REG_U8_TEMP_SENSOR_MODE CCI_REG8(0x0139) |
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| 84 | #define SMIAPP_REG_U8_TEMP_SENSOR_OUTPUT CCI_REG8(0x013a) |
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| 85 | #define SMIAPP_REG_U16_FINE_INTEGRATION_TIME CCI_REG16(0x0200) |
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| 86 | #define SMIAPP_REG_U16_COARSE_INTEGRATION_TIME CCI_REG16(0x0202) |
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| 87 | #define SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_GLOBAL CCI_REG16(0x0204) |
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| 88 | #define SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_GREENR CCI_REG16(0x0206) |
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| 89 | #define SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_RED CCI_REG16(0x0208) |
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| 90 | #define SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_BLUE CCI_REG16(0x020a) |
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| 91 | #define SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_GREENB CCI_REG16(0x020c) |
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| 92 | #define SMIAPP_REG_U16_DIGITAL_GAIN_GREENR CCI_REG16(0x020e) |
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| 93 | #define SMIAPP_REG_U16_DIGITAL_GAIN_RED CCI_REG16(0x0210) |
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| 94 | #define SMIAPP_REG_U16_DIGITAL_GAIN_BLUE CCI_REG16(0x0212) |
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| 95 | #define SMIAPP_REG_U16_DIGITAL_GAIN_GREENB CCI_REG16(0x0214) |
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| 96 | #define SMIAPP_REG_U16_VT_PIX_CLK_DIV CCI_REG16(0x0300) |
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| 97 | #define SMIAPP_REG_U16_VT_SYS_CLK_DIV CCI_REG16(0x0302) |
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| 98 | #define SMIAPP_REG_U16_PRE_PLL_CLK_DIV CCI_REG16(0x0304) |
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| 99 | #define SMIAPP_REG_U16_PLL_MULTIPLIER CCI_REG16(0x0306) |
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| 100 | #define SMIAPP_REG_U16_OP_PIX_CLK_DIV CCI_REG16(0x0308) |
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| 101 | #define SMIAPP_REG_U16_OP_SYS_CLK_DIV CCI_REG16(0x030a) |
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| 102 | #define SMIAPP_REG_U16_FRAME_LENGTH_LINES CCI_REG16(0x0340) |
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| 103 | #define SMIAPP_REG_U16_LINE_LENGTH_PCK CCI_REG16(0x0342) |
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| 104 | #define SMIAPP_REG_U16_X_ADDR_START CCI_REG16(0x0344) |
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| 105 | #define SMIAPP_REG_U16_Y_ADDR_START CCI_REG16(0x0346) |
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| 106 | #define SMIAPP_REG_U16_X_ADDR_END CCI_REG16(0x0348) |
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| 107 | #define SMIAPP_REG_U16_Y_ADDR_END CCI_REG16(0x034a) |
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| 108 | #define SMIAPP_REG_U16_X_OUTPUT_SIZE CCI_REG16(0x034c) |
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| 109 | #define SMIAPP_REG_U16_Y_OUTPUT_SIZE CCI_REG16(0x034e) |
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| 110 | #define SMIAPP_REG_U16_X_EVEN_INC CCI_REG16(0x0380) |
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| 111 | #define SMIAPP_REG_U16_X_ODD_INC CCI_REG16(0x0382) |
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| 112 | #define SMIAPP_REG_U16_Y_EVEN_INC CCI_REG16(0x0384) |
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| 113 | #define SMIAPP_REG_U16_Y_ODD_INC CCI_REG16(0x0386) |
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| 114 | #define SMIAPP_REG_U16_SCALING_MODE CCI_REG16(0x0400) |
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| 115 | #define SMIAPP_REG_U16_SPATIAL_SAMPLING CCI_REG16(0x0402) |
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| 116 | #define SMIAPP_REG_U16_SCALE_M CCI_REG16(0x0404) |
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| 117 | #define SMIAPP_REG_U16_SCALE_N CCI_REG16(0x0406) |
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| 118 | #define SMIAPP_REG_U16_DIGITAL_CROP_X_OFFSET CCI_REG16(0x0408) |
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| 119 | #define SMIAPP_REG_U16_DIGITAL_CROP_Y_OFFSET CCI_REG16(0x040a) |
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| 120 | #define SMIAPP_REG_U16_DIGITAL_CROP_IMAGE_WIDTH CCI_REG16(0x040c) |
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| 121 | #define SMIAPP_REG_U16_DIGITAL_CROP_IMAGE_HEIGHT CCI_REG16(0x040e) |
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| 122 | #define SMIAPP_REG_U16_COMPRESSION_MODE CCI_REG16(0x0500) |
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| 123 | #define SMIAPP_REG_U16_TEST_PATTERN_MODE CCI_REG16(0x0600) |
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| 124 | #define SMIAPP_REG_U16_TEST_DATA_RED CCI_REG16(0x0602) |
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| 125 | #define SMIAPP_REG_U16_TEST_DATA_GREENR CCI_REG16(0x0604) |
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| 126 | #define SMIAPP_REG_U16_TEST_DATA_BLUE CCI_REG16(0x0606) |
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| 127 | #define SMIAPP_REG_U16_TEST_DATA_GREENB CCI_REG16(0x0608) |
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| 128 | #define SMIAPP_REG_U16_HORIZONTAL_CURSOR_WIDTH CCI_REG16(0x060a) |
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| 129 | #define SMIAPP_REG_U16_HORIZONTAL_CURSOR_POSITION CCI_REG16(0x060c) |
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| 130 | #define SMIAPP_REG_U16_VERTICAL_CURSOR_WIDTH CCI_REG16(0x060e) |
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| 131 | #define SMIAPP_REG_U16_VERTICAL_CURSOR_POSITION CCI_REG16(0x0610) |
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| 132 | #define SMIAPP_REG_U16_FIFO_WATER_MARK_PIXELS CCI_REG16(0x0700) |
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| 133 | #define SMIAPP_REG_U8_TCLK_POST CCI_REG8(0x0800) |
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| 134 | #define SMIAPP_REG_U8_THS_PREPARE CCI_REG8(0x0801) |
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| 135 | #define SMIAPP_REG_U8_THS_ZERO_MIN CCI_REG8(0x0802) |
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| 136 | #define SMIAPP_REG_U8_THS_TRAIL CCI_REG8(0x0803) |
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| 137 | #define SMIAPP_REG_U8_TCLK_TRAIL_MIN CCI_REG8(0x0804) |
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| 138 | #define SMIAPP_REG_U8_TCLK_PREPARE CCI_REG8(0x0805) |
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| 139 | #define SMIAPP_REG_U8_TCLK_ZERO CCI_REG8(0x0806) |
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| 140 | #define SMIAPP_REG_U8_TLPX CCI_REG8(0x0807) |
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| 141 | #define SMIAPP_REG_U8_DPHY_CTRL CCI_REG8(0x0808) |
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| 142 | #define SMIAPP_REG_U32_REQUESTED_LINK_BIT_RATE_MBPS CCI_REG32(0x0820) |
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| 143 | #define SMIAPP_REG_U8_BINNING_MODE CCI_REG8(0x0900) |
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| 144 | #define SMIAPP_REG_U8_BINNING_TYPE CCI_REG8(0x0901) |
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| 145 | #define SMIAPP_REG_U8_BINNING_WEIGHTING CCI_REG8(0x0902) |
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| 146 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_CTRL CCI_REG8(0x0a00) |
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| 147 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_STATUS CCI_REG8(0x0a01) |
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| 148 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_PAGE_SELECT CCI_REG8(0x0a02) |
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| 149 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_0 CCI_REG8(0x0a04) |
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| 150 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_1 CCI_REG8(0x0a05) |
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| 151 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_2 CCI_REG8(0x0a06) |
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| 152 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_3 CCI_REG8(0x0a07) |
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| 153 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_4 CCI_REG8(0x0a08) |
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| 154 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_5 CCI_REG8(0x0a09) |
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| 155 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_12 CCI_REG8(0x0a10) |
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| 156 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_13 CCI_REG8(0x0a11) |
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| 157 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_14 CCI_REG8(0x0a12) |
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| 158 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_15 CCI_REG8(0x0a13) |
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| 159 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_16 CCI_REG8(0x0a14) |
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| 160 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_17 CCI_REG8(0x0a15) |
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| 161 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_18 CCI_REG8(0x0a16) |
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| 162 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_19 CCI_REG8(0x0a17) |
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| 163 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_20 CCI_REG8(0x0a18) |
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| 164 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_21 CCI_REG8(0x0a19) |
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| 165 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_22 CCI_REG8(0x0a1a) |
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| 166 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_23 CCI_REG8(0x0a1b) |
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| 167 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_24 CCI_REG8(0x0a1c) |
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| 168 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_25 CCI_REG8(0x0a1d) |
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| 169 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_26 CCI_REG8(0x0a1e) |
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| 170 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_27 CCI_REG8(0x0a1f) |
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| 171 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_28 CCI_REG8(0x0a20) |
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| 172 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_29 CCI_REG8(0x0a21) |
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| 173 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_30 CCI_REG8(0x0a22) |
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| 174 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_31 CCI_REG8(0x0a23) |
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| 175 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_32 CCI_REG8(0x0a24) |
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| 176 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_33 CCI_REG8(0x0a25) |
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| 177 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_34 CCI_REG8(0x0a26) |
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| 178 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_35 CCI_REG8(0x0a27) |
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| 179 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_36 CCI_REG8(0x0a28) |
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| 180 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_37 CCI_REG8(0x0a29) |
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| 181 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_38 CCI_REG8(0x0a2a) |
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| 182 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_39 CCI_REG8(0x0a2b) |
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| 183 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_40 CCI_REG8(0x0a2c) |
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| 184 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_41 CCI_REG8(0x0a2d) |
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| 185 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_42 CCI_REG8(0x0a2e) |
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| 186 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_43 CCI_REG8(0x0a2f) |
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| 187 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_44 CCI_REG8(0x0a30) |
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| 188 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_45 CCI_REG8(0x0a31) |
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| 189 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_46 CCI_REG8(0x0a32) |
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| 190 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_47 CCI_REG8(0x0a33) |
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| 191 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_48 CCI_REG8(0x0a34) |
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| 192 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_49 CCI_REG8(0x0a35) |
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| 193 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_50 CCI_REG8(0x0a36) |
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| 194 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_51 CCI_REG8(0x0a37) |
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| 195 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_52 CCI_REG8(0x0a38) |
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| 196 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_53 CCI_REG8(0x0a39) |
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| 197 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_54 CCI_REG8(0x0a3a) |
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| 198 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_55 CCI_REG8(0x0a3b) |
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| 199 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_56 CCI_REG8(0x0a3c) |
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| 200 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_57 CCI_REG8(0x0a3d) |
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| 201 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_58 CCI_REG8(0x0a3e) |
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| 202 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_59 CCI_REG8(0x0a3f) |
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| 203 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_60 CCI_REG8(0x0a40) |
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| 204 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_61 CCI_REG8(0x0a41) |
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| 205 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_62 CCI_REG8(0x0a42) |
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| 206 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_63 CCI_REG8(0x0a43) |
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| 207 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_CTRL CCI_REG8(0x0a44) |
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| 208 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_STATUS CCI_REG8(0x0a45) |
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| 209 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_PAGE_SELECT CCI_REG8(0x0a46) |
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| 210 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_0 CCI_REG8(0x0a48) |
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| 211 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_1 CCI_REG8(0x0a49) |
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| 212 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_2 CCI_REG8(0x0a4a) |
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| 213 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_3 CCI_REG8(0x0a4b) |
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| 214 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_4 CCI_REG8(0x0a4c) |
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| 215 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_5 CCI_REG8(0x0a4d) |
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| 216 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_6 CCI_REG8(0x0a4e) |
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| 217 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_7 CCI_REG8(0x0a4f) |
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| 218 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_8 CCI_REG8(0x0a50) |
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| 219 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_9 CCI_REG8(0x0a51) |
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| 220 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_10 CCI_REG8(0x0a52) |
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| 221 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_11 CCI_REG8(0x0a53) |
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| 222 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_12 CCI_REG8(0x0a54) |
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| 223 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_13 CCI_REG8(0x0a55) |
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| 224 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_14 CCI_REG8(0x0a56) |
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| 225 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_15 CCI_REG8(0x0a57) |
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| 226 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_16 CCI_REG8(0x0a58) |
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| 227 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_17 CCI_REG8(0x0a59) |
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| 228 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_18 CCI_REG8(0x0a5a) |
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| 229 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_19 CCI_REG8(0x0a5b) |
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| 230 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_20 CCI_REG8(0x0a5c) |
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| 231 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_21 CCI_REG8(0x0a5d) |
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| 232 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_22 CCI_REG8(0x0a5e) |
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| 233 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_23 CCI_REG8(0x0a5f) |
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| 234 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_24 CCI_REG8(0x0a60) |
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| 235 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_25 CCI_REG8(0x0a61) |
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| 236 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_26 CCI_REG8(0x0a62) |
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| 237 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_27 CCI_REG8(0x0a63) |
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| 238 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_28 CCI_REG8(0x0a64) |
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| 239 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_29 CCI_REG8(0x0a65) |
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| 240 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_30 CCI_REG8(0x0a66) |
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| 241 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_31 CCI_REG8(0x0a67) |
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| 242 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_32 CCI_REG8(0x0a68) |
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| 243 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_33 CCI_REG8(0x0a69) |
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| 244 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_34 CCI_REG8(0x0a6a) |
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| 245 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_35 CCI_REG8(0x0a6b) |
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| 246 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_36 CCI_REG8(0x0a6c) |
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| 247 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_37 CCI_REG8(0x0a6d) |
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| 248 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_38 CCI_REG8(0x0a6e) |
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| 249 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_39 CCI_REG8(0x0a6f) |
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| 250 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_40 CCI_REG8(0x0a70) |
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| 251 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_41 CCI_REG8(0x0a71) |
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| 252 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_42 CCI_REG8(0x0a72) |
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| 253 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_43 CCI_REG8(0x0a73) |
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| 254 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_44 CCI_REG8(0x0a74) |
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| 255 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_45 CCI_REG8(0x0a75) |
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| 256 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_46 CCI_REG8(0x0a76) |
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| 257 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_47 CCI_REG8(0x0a77) |
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| 258 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_48 CCI_REG8(0x0a78) |
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| 259 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_49 CCI_REG8(0x0a79) |
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| 260 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_50 CCI_REG8(0x0a7a) |
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| 261 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_51 CCI_REG8(0x0a7b) |
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| 262 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_52 CCI_REG8(0x0a7c) |
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| 263 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_53 CCI_REG8(0x0a7d) |
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| 264 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_54 CCI_REG8(0x0a7e) |
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| 265 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_55 CCI_REG8(0x0a7f) |
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| 266 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_56 CCI_REG8(0x0a80) |
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| 267 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_57 CCI_REG8(0x0a81) |
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| 268 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_58 CCI_REG8(0x0a82) |
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| 269 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_59 CCI_REG8(0x0a83) |
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| 270 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_60 CCI_REG8(0x0a84) |
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| 271 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_61 CCI_REG8(0x0a85) |
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| 272 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_62 CCI_REG8(0x0a86) |
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| 273 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_63 CCI_REG8(0x0a87) |
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| 274 | #define SMIAPP_REG_U8_SHADING_CORRECTION_ENABLE CCI_REG8(0x0b00) |
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| 275 | #define SMIAPP_REG_U8_LUMINANCE_CORRECTION_LEVEL CCI_REG8(0x0b01) |
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| 276 | #define SMIAPP_REG_U8_GREEN_IMBALANCE_FILTER_ENABLE CCI_REG8(0x0b02) |
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| 277 | #define SMIAPP_REG_U8_GREEN_IMBALANCE_FILTER_WEIGHT CCI_REG8(0x0b03) |
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| 278 | #define SMIAPP_REG_U8_BLACK_LEVEL_CORRECTION_ENABLE CCI_REG8(0x0b04) |
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| 279 | #define SMIAPP_REG_U8_MAPPED_COUPLET_CORRECT_ENABLE CCI_REG8(0x0b05) |
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| 280 | #define SMIAPP_REG_U8_SINGLE_DEFECT_CORRECT_ENABLE CCI_REG8(0x0b06) |
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| 281 | #define SMIAPP_REG_U8_SINGLE_DEFECT_CORRECT_WEIGHT CCI_REG8(0x0b07) |
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| 282 | #define SMIAPP_REG_U8_DYNAMIC_COUPLET_CORRECT_ENABLE CCI_REG8(0x0b08) |
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| 283 | #define SMIAPP_REG_U8_DYNAMIC_COUPLET_CORRECT_WEIGHT CCI_REG8(0x0b09) |
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| 284 | #define SMIAPP_REG_U8_COMBINED_DEFECT_CORRECT_ENABLE CCI_REG8(0x0b0a) |
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| 285 | #define SMIAPP_REG_U8_COMBINED_DEFECT_CORRECT_WEIGHT CCI_REG8(0x0b0b) |
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| 286 | #define SMIAPP_REG_U8_MODULE_SPECIFIC_CORRECTION_ENABLE CCI_REG8(0x0b0c) |
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| 287 | #define SMIAPP_REG_U8_MODULE_SPECIFIC_CORRECTION_WEIGHT CCI_REG8(0x0b0d) |
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| 288 | #define SMIAPP_REG_U8_MAPPED_LINE_DEFECT_CORRECT_ENABLE CCI_REG8(0x0b0e) |
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| 289 | #define SMIAPP_REG_U8_MAPPED_LINE_DEFECT_CORRECT_ADJUST CCI_REG8(0x0b0f) |
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| 290 | #define SMIAPP_REG_U8_MAPPED_COUPLET_CORRECT_ADJUST CCI_REG8(0x0b10) |
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| 291 | #define SMIAPP_REG_U8_MAPPED_TRIPLET_DEFECT_CORRECT_ENABLE CCI_REG8(0x0b11) |
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| 292 | #define SMIAPP_REG_U8_MAPPED_TRIPLET_DEFECT_CORRECT_ADJUST CCI_REG8(0x0b12) |
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| 293 | #define SMIAPP_REG_U8_DYNAMIC_TRIPLET_DEFECT_CORRECT_ENABLE CCI_REG8(0x0b13) |
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| 294 | #define SMIAPP_REG_U8_DYNAMIC_TRIPLET_DEFECT_CORRECT_ADJUST CCI_REG8(0x0b14) |
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| 295 | #define SMIAPP_REG_U8_DYNAMIC_LINE_DEFECT_CORRECT_ENABLE CCI_REG8(0x0b15) |
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| 296 | #define SMIAPP_REG_U8_DYNAMIC_LINE_DEFECT_CORRECT_ADJUST CCI_REG8(0x0b16) |
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| 297 | #define SMIAPP_REG_U8_EDOF_MODE CCI_REG8(0x0b80) |
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| 298 | #define SMIAPP_REG_U8_SHARPNESS CCI_REG8(0x0b83) |
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| 299 | #define SMIAPP_REG_U8_DENOISING CCI_REG8(0x0b84) |
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| 300 | #define SMIAPP_REG_U8_MODULE_SPECIFIC CCI_REG8(0x0b85) |
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| 301 | #define SMIAPP_REG_U16_DEPTH_OF_FIELD CCI_REG16(0x0b86) |
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| 302 | #define SMIAPP_REG_U16_FOCUS_DISTANCE CCI_REG16(0x0b88) |
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| 303 | #define SMIAPP_REG_U8_ESTIMATION_MODE_CTRL CCI_REG8(0x0b8a) |
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| 304 | #define SMIAPP_REG_U16_COLOUR_TEMPERATURE CCI_REG16(0x0b8c) |
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| 305 | #define SMIAPP_REG_U16_ABSOLUTE_GAIN_GREENR CCI_REG16(0x0b8e) |
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| 306 | #define SMIAPP_REG_U16_ABSOLUTE_GAIN_RED CCI_REG16(0x0b90) |
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| 307 | #define SMIAPP_REG_U16_ABSOLUTE_GAIN_BLUE CCI_REG16(0x0b92) |
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| 308 | #define SMIAPP_REG_U16_ABSOLUTE_GAIN_GREENB CCI_REG16(0x0b94) |
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| 309 | #define SMIAPP_REG_U8_ESTIMATION_ZONE_MODE CCI_REG8(0x0bc0) |
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| 310 | #define SMIAPP_REG_U16_FIXED_ZONE_WEIGHTING CCI_REG16(0x0bc2) |
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| 311 | #define SMIAPP_REG_U16_CUSTOM_ZONE_X_START CCI_REG16(0x0bc4) |
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| 312 | #define SMIAPP_REG_U16_CUSTOM_ZONE_Y_START CCI_REG16(0x0bc6) |
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| 313 | #define SMIAPP_REG_U16_CUSTOM_ZONE_WIDTH CCI_REG16(0x0bc8) |
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| 314 | #define SMIAPP_REG_U16_CUSTOM_ZONE_HEIGHT CCI_REG16(0x0bca) |
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| 315 | #define SMIAPP_REG_U8_GLOBAL_RESET_CTRL1 CCI_REG8(0x0c00) |
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| 316 | #define SMIAPP_REG_U8_GLOBAL_RESET_CTRL2 CCI_REG8(0x0c01) |
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| 317 | #define SMIAPP_REG_U8_GLOBAL_RESET_MODE_CONFIG_1 CCI_REG8(0x0c02) |
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| 318 | #define SMIAPP_REG_U8_GLOBAL_RESET_MODE_CONFIG_2 CCI_REG8(0x0c03) |
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| 319 | #define SMIAPP_REG_U16_TRDY_CTRL CCI_REG16(0x0c04) |
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| 320 | #define SMIAPP_REG_U16_TRDOUT_CTRL CCI_REG16(0x0c06) |
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| 321 | #define SMIAPP_REG_U16_TSHUTTER_STROBE_DELAY_CTRL CCI_REG16(0x0c08) |
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| 322 | #define SMIAPP_REG_U16_TSHUTTER_STROBE_WIDTH_CTRL CCI_REG16(0x0c0a) |
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| 323 | #define SMIAPP_REG_U16_TFLASH_STROBE_DELAY_CTRL CCI_REG16(0x0c0c) |
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| 324 | #define SMIAPP_REG_U16_TFLASH_STROBE_WIDTH_HIGH_CTRL CCI_REG16(0x0c0e) |
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| 325 | #define SMIAPP_REG_U16_TGRST_INTERVAL_CTRL CCI_REG16(0x0c10) |
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| 326 | #define SMIAPP_REG_U8_FLASH_STROBE_ADJUSTMENT CCI_REG8(0x0c12) |
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| 327 | #define SMIAPP_REG_U16_FLASH_STROBE_START_POINT CCI_REG16(0x0c14) |
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| 328 | #define SMIAPP_REG_U16_TFLASH_STROBE_DELAY_RS_CTRL CCI_REG16(0x0c16) |
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| 329 | #define SMIAPP_REG_U16_TFLASH_STROBE_WIDTH_HIGH_RS_CTRL CCI_REG16(0x0c18) |
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| 330 | #define SMIAPP_REG_U8_FLASH_MODE_RS CCI_REG8(0x0c1a) |
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| 331 | #define SMIAPP_REG_U8_FLASH_TRIGGER_RS CCI_REG8(0x0c1b) |
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| 332 | #define SMIAPP_REG_U8_FLASH_STATUS CCI_REG8(0x0c1c) |
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| 333 | #define SMIAPP_REG_U8_SA_STROBE_MODE CCI_REG8(0x0c1d) |
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| 334 | #define SMIAPP_REG_U16_SA_STROBE_START_POINT CCI_REG16(0x0c1e) |
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| 335 | #define SMIAPP_REG_U16_TSA_STROBE_DELAY_CTRL CCI_REG16(0x0c20) |
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| 336 | #define SMIAPP_REG_U16_TSA_STROBE_WIDTH_CTRL CCI_REG16(0x0c22) |
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| 337 | #define SMIAPP_REG_U8_SA_STROBE_TRIGGER CCI_REG8(0x0c24) |
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| 338 | #define SMIAPP_REG_U8_SPECIAL_ACTUATOR_STATUS CCI_REG8(0x0c25) |
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| 339 | #define SMIAPP_REG_U16_TFLASH_STROBE_WIDTH2_HIGH_RS_CTRL CCI_REG16(0x0c26) |
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| 340 | #define SMIAPP_REG_U16_TFLASH_STROBE_WIDTH_LOW_RS_CTRL CCI_REG16(0x0c28) |
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| 341 | #define SMIAPP_REG_U8_TFLASH_STROBE_COUNT_RS_CTRL CCI_REG8(0x0c2a) |
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| 342 | #define SMIAPP_REG_U8_TFLASH_STROBE_COUNT_CTRL CCI_REG8(0x0c2b) |
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| 343 | #define SMIAPP_REG_U16_TFLASH_STROBE_WIDTH2_HIGH_CTRL CCI_REG16(0x0c2c) |
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| 344 | #define SMIAPP_REG_U16_TFLASH_STROBE_WIDTH_LOW_CTRL CCI_REG16(0x0c2e) |
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| 345 | #define SMIAPP_REG_U8_LOW_LEVEL_CTRL CCI_REG8(0x0c80) |
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| 346 | #define SMIAPP_REG_U16_MAIN_TRIGGER_REF_POINT CCI_REG16(0x0c82) |
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| 347 | #define SMIAPP_REG_U16_MAIN_TRIGGER_T3 CCI_REG16(0x0c84) |
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| 348 | #define SMIAPP_REG_U8_MAIN_TRIGGER_COUNT CCI_REG8(0x0c86) |
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| 349 | #define SMIAPP_REG_U16_PHASE1_TRIGGER_T3 CCI_REG16(0x0c88) |
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| 350 | #define SMIAPP_REG_U8_PHASE1_TRIGGER_COUNT CCI_REG8(0x0c8a) |
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| 351 | #define SMIAPP_REG_U16_PHASE2_TRIGGER_T3 CCI_REG16(0x0c8c) |
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| 352 | #define SMIAPP_REG_U8_PHASE2_TRIGGER_COUNT CCI_REG8(0x0c8e) |
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| 353 | #define SMIAPP_REG_U8_MECH_SHUTTER_CTRL CCI_REG8(0x0d00) |
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| 354 | #define SMIAPP_REG_U8_OPERATION_MODE CCI_REG8(0x0d01) |
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| 355 | #define SMIAPP_REG_U8_ACT_STATE1 CCI_REG8(0x0d02) |
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| 356 | #define SMIAPP_REG_U8_ACT_STATE2 CCI_REG8(0x0d03) |
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| 357 | #define SMIAPP_REG_U16_FOCUS_CHANGE CCI_REG16(0x0d80) |
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| 358 | #define SMIAPP_REG_U16_FOCUS_CHANGE_CONTROL CCI_REG16(0x0d82) |
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| 359 | #define SMIAPP_REG_U16_FOCUS_CHANGE_NUMBER_PHASE1 CCI_REG16(0x0d84) |
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| 360 | #define SMIAPP_REG_U16_FOCUS_CHANGE_NUMBER_PHASE2 CCI_REG16(0x0d86) |
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| 361 | #define SMIAPP_REG_U8_STROBE_COUNT_PHASE1 CCI_REG8(0x0d88) |
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| 362 | #define SMIAPP_REG_U8_STROBE_COUNT_PHASE2 CCI_REG8(0x0d89) |
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| 363 | #define SMIAPP_REG_U8_POSITION CCI_REG8(0x0d8a) |
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| 364 | #define SMIAPP_REG_U8_BRACKETING_LUT_CONTROL CCI_REG8(0x0e00) |
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| 365 | #define SMIAPP_REG_U8_BRACKETING_LUT_MODE CCI_REG8(0x0e01) |
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| 366 | #define SMIAPP_REG_U8_BRACKETING_LUT_ENTRY_CONTROL CCI_REG8(0x0e02) |
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| 367 | #define SMIAPP_REG_U8_LUT_PARAMETERS_START CCI_REG8(0x0e10) |
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| 368 | #define SMIAPP_REG_U8_LUT_PARAMETERS_END CCI_REG8(0x0eff) |
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| 369 | #define SMIAPP_REG_U16_INTEGRATION_TIME_CAPABILITY CCI_REG16(0x1000) |
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| 370 | #define SMIAPP_REG_U16_COARSE_INTEGRATION_TIME_MIN CCI_REG16(0x1004) |
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| 371 | #define SMIAPP_REG_U16_COARSE_INTEGRATION_TIME_MAX_MARGIN CCI_REG16(0x1006) |
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| 372 | #define SMIAPP_REG_U16_FINE_INTEGRATION_TIME_MIN CCI_REG16(0x1008) |
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| 373 | #define SMIAPP_REG_U16_FINE_INTEGRATION_TIME_MAX_MARGIN CCI_REG16(0x100a) |
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| 374 | #define SMIAPP_REG_U16_DIGITAL_GAIN_CAPABILITY CCI_REG16(0x1080) |
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| 375 | #define SMIAPP_REG_U16_DIGITAL_GAIN_MIN CCI_REG16(0x1084) |
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| 376 | #define SMIAPP_REG_U16_DIGITAL_GAIN_MAX CCI_REG16(0x1086) |
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| 377 | #define SMIAPP_REG_U16_DIGITAL_GAIN_STEP_SIZE CCI_REG16(0x1088) |
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| 378 | #define SMIAPP_REG_F32_MIN_EXT_CLK_FREQ_HZ (CCI_REG32(0x1100) | CCS_FL_FLOAT_IREAL) |
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| 379 | #define SMIAPP_REG_F32_MAX_EXT_CLK_FREQ_HZ (CCI_REG32(0x1104) | CCS_FL_FLOAT_IREAL) |
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| 380 | #define SMIAPP_REG_U16_MIN_PRE_PLL_CLK_DIV CCI_REG16(0x1108) |
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| 381 | #define SMIAPP_REG_U16_MAX_PRE_PLL_CLK_DIV CCI_REG16(0x110a) |
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| 382 | #define SMIAPP_REG_F32_MIN_PLL_IP_FREQ_HZ (CCI_REG32(0x110c) | CCS_FL_FLOAT_IREAL) |
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| 383 | #define SMIAPP_REG_F32_MAX_PLL_IP_FREQ_HZ (CCI_REG32(0x1110) | CCS_FL_FLOAT_IREAL) |
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| 384 | #define SMIAPP_REG_U16_MIN_PLL_MULTIPLIER CCI_REG16(0x1114) |
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| 385 | #define SMIAPP_REG_U16_MAX_PLL_MULTIPLIER CCI_REG16(0x1116) |
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| 386 | #define SMIAPP_REG_F32_MIN_PLL_OP_FREQ_HZ (CCI_REG32(0x1118) | CCS_FL_FLOAT_IREAL) |
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| 387 | #define SMIAPP_REG_F32_MAX_PLL_OP_FREQ_HZ (CCI_REG32(0x111c) | CCS_FL_FLOAT_IREAL) |
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| 388 | #define SMIAPP_REG_U16_MIN_VT_SYS_CLK_DIV CCI_REG16(0x1120) |
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| 389 | #define SMIAPP_REG_U16_MAX_VT_SYS_CLK_DIV CCI_REG16(0x1122) |
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| 390 | #define SMIAPP_REG_F32_MIN_VT_SYS_CLK_FREQ_HZ (CCI_REG32(0x1124) | CCS_FL_FLOAT_IREAL) |
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| 391 | #define SMIAPP_REG_F32_MAX_VT_SYS_CLK_FREQ_HZ (CCI_REG32(0x1128) | CCS_FL_FLOAT_IREAL) |
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| 392 | #define SMIAPP_REG_F32_MIN_VT_PIX_CLK_FREQ_HZ (CCI_REG32(0x112c) | CCS_FL_FLOAT_IREAL) |
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| 393 | #define SMIAPP_REG_F32_MAX_VT_PIX_CLK_FREQ_HZ (CCI_REG32(0x1130) | CCS_FL_FLOAT_IREAL) |
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| 394 | #define SMIAPP_REG_U16_MIN_VT_PIX_CLK_DIV CCI_REG16(0x1134) |
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| 395 | #define SMIAPP_REG_U16_MAX_VT_PIX_CLK_DIV CCI_REG16(0x1136) |
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| 396 | #define SMIAPP_REG_U16_MIN_FRAME_LENGTH_LINES CCI_REG16(0x1140) |
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| 397 | #define SMIAPP_REG_U16_MAX_FRAME_LENGTH_LINES CCI_REG16(0x1142) |
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| 398 | #define SMIAPP_REG_U16_MIN_LINE_LENGTH_PCK CCI_REG16(0x1144) |
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| 399 | #define SMIAPP_REG_U16_MAX_LINE_LENGTH_PCK CCI_REG16(0x1146) |
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| 400 | #define SMIAPP_REG_U16_MIN_LINE_BLANKING_PCK CCI_REG16(0x1148) |
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| 401 | #define SMIAPP_REG_U16_MIN_FRAME_BLANKING_LINES CCI_REG16(0x114a) |
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| 402 | #define SMIAPP_REG_U8_MIN_LINE_LENGTH_PCK_STEP_SIZE CCI_REG8(0x114c) |
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| 403 | #define SMIAPP_REG_U16_MIN_OP_SYS_CLK_DIV CCI_REG16(0x1160) |
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| 404 | #define SMIAPP_REG_U16_MAX_OP_SYS_CLK_DIV CCI_REG16(0x1162) |
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| 405 | #define SMIAPP_REG_F32_MIN_OP_SYS_CLK_FREQ_HZ (CCI_REG32(0x1164) | CCS_FL_FLOAT_IREAL) |
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| 406 | #define SMIAPP_REG_F32_MAX_OP_SYS_CLK_FREQ_HZ (CCI_REG32(0x1168) | CCS_FL_FLOAT_IREAL) |
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| 407 | #define SMIAPP_REG_U16_MIN_OP_PIX_CLK_DIV CCI_REG16(0x116c) |
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| 408 | #define SMIAPP_REG_U16_MAX_OP_PIX_CLK_DIV CCI_REG16(0x116e) |
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| 409 | #define SMIAPP_REG_F32_MIN_OP_PIX_CLK_FREQ_HZ (CCI_REG32(0x1170) | CCS_FL_FLOAT_IREAL) |
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| 410 | #define SMIAPP_REG_F32_MAX_OP_PIX_CLK_FREQ_HZ (CCI_REG32(0x1174) | CCS_FL_FLOAT_IREAL) |
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| 411 | #define SMIAPP_REG_U16_X_ADDR_MIN CCI_REG16(0x1180) |
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| 412 | #define SMIAPP_REG_U16_Y_ADDR_MIN CCI_REG16(0x1182) |
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| 413 | #define SMIAPP_REG_U16_X_ADDR_MAX CCI_REG16(0x1184) |
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| 414 | #define SMIAPP_REG_U16_Y_ADDR_MAX CCI_REG16(0x1186) |
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| 415 | #define SMIAPP_REG_U16_MIN_X_OUTPUT_SIZE CCI_REG16(0x1188) |
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| 416 | #define SMIAPP_REG_U16_MIN_Y_OUTPUT_SIZE CCI_REG16(0x118a) |
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| 417 | #define SMIAPP_REG_U16_MAX_X_OUTPUT_SIZE CCI_REG16(0x118c) |
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| 418 | #define SMIAPP_REG_U16_MAX_Y_OUTPUT_SIZE CCI_REG16(0x118e) |
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| 419 | #define SMIAPP_REG_U16_MIN_EVEN_INC CCI_REG16(0x11c0) |
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| 420 | #define SMIAPP_REG_U16_MAX_EVEN_INC CCI_REG16(0x11c2) |
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| 421 | #define SMIAPP_REG_U16_MIN_ODD_INC CCI_REG16(0x11c4) |
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| 422 | #define SMIAPP_REG_U16_MAX_ODD_INC CCI_REG16(0x11c6) |
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| 423 | #define SMIAPP_REG_U16_SCALING_CAPABILITY CCI_REG16(0x1200) |
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| 424 | #define SMIAPP_REG_U16_SCALER_M_MIN CCI_REG16(0x1204) |
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| 425 | #define SMIAPP_REG_U16_SCALER_M_MAX CCI_REG16(0x1206) |
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| 426 | #define SMIAPP_REG_U16_SCALER_N_MIN CCI_REG16(0x1208) |
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| 427 | #define SMIAPP_REG_U16_SCALER_N_MAX CCI_REG16(0x120a) |
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| 428 | #define SMIAPP_REG_U16_SPATIAL_SAMPLING_CAPABILITY CCI_REG16(0x120c) |
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| 429 | #define SMIAPP_REG_U8_DIGITAL_CROP_CAPABILITY CCI_REG8(0x120e) |
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| 430 | #define SMIAPP_REG_U16_COMPRESSION_CAPABILITY CCI_REG16(0x1300) |
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| 431 | #define SMIAPP_REG_U16_MATRIX_ELEMENT_REDINRED CCI_REG16(0x1400) |
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| 432 | #define SMIAPP_REG_U16_MATRIX_ELEMENT_GREENINRED CCI_REG16(0x1402) |
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| 433 | #define SMIAPP_REG_U16_MATRIX_ELEMENT_BLUEINRED CCI_REG16(0x1404) |
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| 434 | #define SMIAPP_REG_U16_MATRIX_ELEMENT_REDINGREEN CCI_REG16(0x1406) |
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| 435 | #define SMIAPP_REG_U16_MATRIX_ELEMENT_GREENINGREEN CCI_REG16(0x1408) |
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| 436 | #define SMIAPP_REG_U16_MATRIX_ELEMENT_BLUEINGREEN CCI_REG16(0x140a) |
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| 437 | #define SMIAPP_REG_U16_MATRIX_ELEMENT_REDINBLUE CCI_REG16(0x140c) |
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| 438 | #define SMIAPP_REG_U16_MATRIX_ELEMENT_GREENINBLUE CCI_REG16(0x140e) |
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| 439 | #define SMIAPP_REG_U16_MATRIX_ELEMENT_BLUEINBLUE CCI_REG16(0x1410) |
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| 440 | #define SMIAPP_REG_U16_FIFO_SIZE_PIXELS CCI_REG16(0x1500) |
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| 441 | #define SMIAPP_REG_U8_FIFO_SUPPORT_CAPABILITY CCI_REG8(0x1502) |
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| 442 | #define SMIAPP_REG_U8_DPHY_CTRL_CAPABILITY CCI_REG8(0x1600) |
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| 443 | #define SMIAPP_REG_U8_CSI_LANE_MODE_CAPABILITY CCI_REG8(0x1601) |
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| 444 | #define SMIAPP_REG_U8_CSI_SIGNALLING_MODE_CAPABILITY CCI_REG8(0x1602) |
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| 445 | #define SMIAPP_REG_U8_FAST_STANDBY_CAPABILITY CCI_REG8(0x1603) |
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| 446 | #define SMIAPP_REG_U8_CCI_ADDRESS_CONTROL_CAPABILITY CCI_REG8(0x1604) |
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| 447 | #define SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_1_LANE_MODE_MBPS CCI_REG32(0x1608) |
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| 448 | #define SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_2_LANE_MODE_MBPS CCI_REG32(0x160c) |
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| 449 | #define SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_3_LANE_MODE_MBPS CCI_REG32(0x1610) |
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| 450 | #define SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_4_LANE_MODE_MBPS CCI_REG32(0x1614) |
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| 451 | #define SMIAPP_REG_U8_TEMP_SENSOR_CAPABILITY CCI_REG8(0x1618) |
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| 452 | #define SMIAPP_REG_U16_MIN_FRAME_LENGTH_LINES_BIN CCI_REG16(0x1700) |
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| 453 | #define SMIAPP_REG_U16_MAX_FRAME_LENGTH_LINES_BIN CCI_REG16(0x1702) |
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| 454 | #define SMIAPP_REG_U16_MIN_LINE_LENGTH_PCK_BIN CCI_REG16(0x1704) |
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| 455 | #define SMIAPP_REG_U16_MAX_LINE_LENGTH_PCK_BIN CCI_REG16(0x1706) |
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| 456 | #define SMIAPP_REG_U16_MIN_LINE_BLANKING_PCK_BIN CCI_REG16(0x1708) |
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| 457 | #define SMIAPP_REG_U16_FINE_INTEGRATION_TIME_MIN_BIN CCI_REG16(0x170a) |
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| 458 | #define SMIAPP_REG_U16_FINE_INTEGRATION_TIME_MAX_MARGIN_BIN CCI_REG16(0x170c) |
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| 459 | #define SMIAPP_REG_U8_BINNING_CAPABILITY CCI_REG8(0x1710) |
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| 460 | #define SMIAPP_REG_U8_BINNING_WEIGHTING_CAPABILITY CCI_REG8(0x1711) |
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| 461 | #define SMIAPP_REG_U8_BINNING_SUBTYPES CCI_REG8(0x1712) |
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| 462 | #define SMIAPP_REG_U8_BINNING_TYPE_n(n) CCI_REG8(0x1713 + (n)) /* 1 <= n <= 237 */ |
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| 463 | #define SMIAPP_REG_U8_DATA_TRANSFER_IF_CAPABILITY CCI_REG8(0x1800) |
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| 464 | #define SMIAPP_REG_U8_SHADING_CORRECTION_CAPABILITY CCI_REG8(0x1900) |
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| 465 | #define SMIAPP_REG_U8_GREEN_IMBALANCE_CAPABILITY CCI_REG8(0x1901) |
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| 466 | #define SMIAPP_REG_U8_BLACK_LEVEL_CAPABILITY CCI_REG8(0x1902) |
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| 467 | #define SMIAPP_REG_U8_MODULE_SPECIFIC_CORRECTION_CAPABILITY CCI_REG8(0x1903) |
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| 468 | #define SMIAPP_REG_U16_DEFECT_CORRECTION_CAPABILITY CCI_REG16(0x1904) |
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| 469 | #define SMIAPP_REG_U16_DEFECT_CORRECTION_CAPABILITY_2 CCI_REG16(0x1906) |
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| 470 | #define SMIAPP_REG_U8_EDOF_CAPABILITY CCI_REG8(0x1980) |
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| 471 | #define SMIAPP_REG_U8_ESTIMATION_FRAMES CCI_REG8(0x1981) |
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| 472 | #define SMIAPP_REG_U8_SUPPORTS_SHARPNESS_ADJ CCI_REG8(0x1982) |
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| 473 | #define SMIAPP_REG_U8_SUPPORTS_DENOISING_ADJ CCI_REG8(0x1983) |
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| 474 | #define SMIAPP_REG_U8_SUPPORTS_MODULE_SPECIFIC_ADJ CCI_REG8(0x1984) |
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| 475 | #define SMIAPP_REG_U8_SUPPORTS_DEPTH_OF_FIELD_ADJ CCI_REG8(0x1985) |
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| 476 | #define SMIAPP_REG_U8_SUPPORTS_FOCUS_DISTANCE_ADJ CCI_REG8(0x1986) |
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| 477 | #define SMIAPP_REG_U8_COLOUR_FEEDBACK_CAPABILITY CCI_REG8(0x1987) |
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| 478 | #define SMIAPP_REG_U8_EDOF_SUPPORT_AB_NXM CCI_REG8(0x1988) |
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| 479 | #define SMIAPP_REG_U8_ESTIMATION_MODE_CAPABILITY CCI_REG8(0x19c0) |
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| 480 | #define SMIAPP_REG_U8_ESTIMATION_ZONE_CAPABILITY CCI_REG8(0x19c1) |
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| 481 | #define SMIAPP_REG_U16_EST_DEPTH_OF_FIELD CCI_REG16(0x19c2) |
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| 482 | #define SMIAPP_REG_U16_EST_FOCUS_DISTANCE CCI_REG16(0x19c4) |
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| 483 | #define SMIAPP_REG_U16_CAPABILITY_TRDY_MIN CCI_REG16(0x1a00) |
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| 484 | #define SMIAPP_REG_U8_FLASH_MODE_CAPABILITY CCI_REG8(0x1a02) |
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| 485 | #define SMIAPP_REG_U16_MECH_SHUT_AND_ACT_START_ADDR CCI_REG16(0x1b02) |
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| 486 | #define SMIAPP_REG_U8_ACTUATOR_CAPABILITY CCI_REG8(0x1b04) |
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| 487 | #define SMIAPP_REG_U16_ACTUATOR_TYPE CCI_REG16(0x1b40) |
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| 488 | #define SMIAPP_REG_U8_AF_DEVICE_ADDRESS CCI_REG8(0x1b42) |
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| 489 | #define SMIAPP_REG_U16_FOCUS_CHANGE_ADDRESS CCI_REG16(0x1b44) |
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| 490 | #define SMIAPP_REG_U8_BRACKETING_LUT_CAPABILITY_1 CCI_REG8(0x1c00) |
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| 491 | #define SMIAPP_REG_U8_BRACKETING_LUT_CAPABILITY_2 CCI_REG8(0x1c01) |
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| 492 | #define SMIAPP_REG_U8_BRACKETING_LUT_SIZE CCI_REG8(0x1c02) |
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| 493 | |
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| 494 | /* Register bit definitions */ |
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| 495 | #define SMIAPP_IMAGE_ORIENTATION_HFLIP BIT(0) |
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| 496 | #define SMIAPP_IMAGE_ORIENTATION_VFLIP BIT(1) |
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| 497 | |
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| 498 | #define SMIAPP_DATA_TRANSFER_IF_1_CTRL_EN BIT(0) |
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| 499 | #define SMIAPP_DATA_TRANSFER_IF_1_CTRL_WR_EN BIT(1) |
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| 500 | #define SMIAPP_DATA_TRANSFER_IF_1_CTRL_ERR_CLEAR BIT(2) |
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| 501 | #define SMIAPP_DATA_TRANSFER_IF_1_STATUS_RD_READY BIT(0) |
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| 502 | #define SMIAPP_DATA_TRANSFER_IF_1_STATUS_WR_READY BIT(1) |
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| 503 | #define SMIAPP_DATA_TRANSFER_IF_1_STATUS_EDATA BIT(2) |
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| 504 | #define SMIAPP_DATA_TRANSFER_IF_1_STATUS_EUSAGE BIT(3) |
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| 505 | |
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| 506 | #define SMIAPP_DATA_TRANSFER_IF_CAPABILITY_SUPPORTED BIT(0) |
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| 507 | #define SMIAPP_DATA_TRANSFER_IF_CAPABILITY_POLL BIT(2) |
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| 508 | |
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| 509 | #define SMIAPP_SOFTWARE_RESET BIT(0) |
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| 510 | |
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| 511 | #define SMIAPP_FLASH_MODE_CAPABILITY_SINGLE_STROBE BIT(0) |
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| 512 | #define SMIAPP_FLASH_MODE_CAPABILITY_MULTIPLE_STROBE BIT(1) |
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| 513 | |
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| 514 | #define SMIAPP_CSI_SIGNALLING_MODE_CCP2_DATA_CLOCK 0 |
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| 515 | #define SMIAPP_CSI_SIGNALLING_MODE_CCP2_DATA_STROBE 1 |
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| 516 | #define SMIAPP_CSI_SIGNALLING_MODE_CSI2 2 |
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| 517 | |
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| 518 | #define SMIAPP_DPHY_CTRL_AUTOMATIC 0 |
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| 519 | /* DPHY control based on REQUESTED_LINK_BIT_RATE_MBPS */ |
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| 520 | #define SMIAPP_DPHY_CTRL_UI 1 |
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| 521 | #define SMIAPP_DPHY_CTRL_REGISTER 2 |
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| 522 | |
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| 523 | #define SMIAPP_COMPRESSION_MODE_SIMPLE_PREDICTOR 1 |
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| 524 | #define SMIAPP_COMPRESSION_MODE_ADVANCED_PREDICTOR 2 |
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| 525 | |
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| 526 | #define SMIAPP_MODE_SELECT_SOFTWARE_STANDBY 0 |
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| 527 | #define SMIAPP_MODE_SELECT_STREAMING 1 |
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| 528 | |
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| 529 | #define SMIAPP_SCALING_MODE_NONE 0 |
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| 530 | #define SMIAPP_SCALING_MODE_HORIZONTAL 1 |
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| 531 | #define SMIAPP_SCALING_MODE_BOTH 2 |
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| 532 | |
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| 533 | #define SMIAPP_SCALING_CAPABILITY_NONE 0 |
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| 534 | #define SMIAPP_SCALING_CAPABILITY_HORIZONTAL 1 |
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| 535 | #define SMIAPP_SCALING_CAPABILITY_BOTH 2 /* horizontal/both */ |
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| 536 | |
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| 537 | /* digital crop right before scaler */ |
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| 538 | #define SMIAPP_DIGITAL_CROP_CAPABILITY_NONE 0 |
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| 539 | #define SMIAPP_DIGITAL_CROP_CAPABILITY_INPUT_CROP 1 |
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| 540 | |
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| 541 | #define SMIAPP_DIGITAL_GAIN_CAPABILITY_PER_CHANNEL 1 |
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| 542 | |
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| 543 | #define SMIAPP_BINNING_CAPABILITY_NO 0 |
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| 544 | #define SMIAPP_BINNING_CAPABILITY_YES 1 |
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| 545 | |
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| 546 | /* Maximum number of binning subtypes */ |
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| 547 | #define SMIAPP_BINNING_SUBTYPES 253 |
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| 548 | |
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| 549 | #define SMIAPP_PIXEL_ORDER_GRBG 0 |
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| 550 | #define SMIAPP_PIXEL_ORDER_RGGB 1 |
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| 551 | #define SMIAPP_PIXEL_ORDER_BGGR 2 |
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| 552 | #define SMIAPP_PIXEL_ORDER_GBRG 3 |
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| 553 | |
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| 554 | #define SMIAPP_DATA_FORMAT_MODEL_TYPE_NORMAL 1 |
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| 555 | #define SMIAPP_DATA_FORMAT_MODEL_TYPE_EXTENDED 2 |
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| 556 | #define SMIAPP_DATA_FORMAT_MODEL_TYPE_NORMAL_N 8 |
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| 557 | #define SMIAPP_DATA_FORMAT_MODEL_TYPE_EXTENDED_N 16 |
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| 558 | |
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| 559 | #define SMIAPP_FRAME_FORMAT_MODEL_TYPE_2BYTE 0x01 |
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| 560 | #define SMIAPP_FRAME_FORMAT_MODEL_TYPE_4BYTE 0x02 |
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| 561 | #define SMIAPP_FRAME_FORMAT_MODEL_SUBTYPE_NROWS_MASK 0x0f |
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| 562 | #define SMIAPP_FRAME_FORMAT_MODEL_SUBTYPE_NCOLS_MASK 0xf0 |
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| 563 | #define SMIAPP_FRAME_FORMAT_MODEL_SUBTYPE_NCOLS_SHIFT 4 |
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| 564 | |
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| 565 | #define SMIAPP_FRAME_FORMAT_DESC_2_PIXELCODE_MASK 0xf000 |
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| 566 | #define SMIAPP_FRAME_FORMAT_DESC_2_PIXELCODE_SHIFT 12 |
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| 567 | #define SMIAPP_FRAME_FORMAT_DESC_2_PIXELS_MASK 0x0fff |
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| 568 | |
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| 569 | #define SMIAPP_FRAME_FORMAT_DESC_4_PIXELCODE_MASK 0xf0000000 |
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| 570 | #define SMIAPP_FRAME_FORMAT_DESC_4_PIXELCODE_SHIFT 28 |
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| 571 | #define SMIAPP_FRAME_FORMAT_DESC_4_PIXELS_MASK 0x0000ffff |
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| 572 | |
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| 573 | #define SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_EMBEDDED 1 |
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| 574 | #define SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_DUMMY 2 |
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| 575 | #define SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_BLACK 3 |
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| 576 | #define SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_DARK 4 |
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| 577 | #define SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_VISIBLE 5 |
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| 578 | |
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| 579 | #define SMIAPP_FAST_STANDBY_CTRL_COMPLETE_FRAMES 0 |
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| 580 | #define SMIAPP_FAST_STANDBY_CTRL_IMMEDIATE 1 |
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| 581 | |
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| 582 | /* Scaling N factor */ |
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| 583 | #define SMIAPP_SCALE_N 16 |
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| 584 | |
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| 585 | #endif /* __SMIAPP_REG_DEFS_H__ */ |
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| 586 | |
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