1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* |
3 | * cx18 init/start/stop/exit stream functions |
4 | * |
5 | * Derived from ivtv-streams.c |
6 | * |
7 | * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> |
8 | * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> |
9 | */ |
10 | |
11 | #include "cx18-driver.h" |
12 | #include "cx18-io.h" |
13 | #include "cx18-fileops.h" |
14 | #include "cx18-mailbox.h" |
15 | #include "cx18-i2c.h" |
16 | #include "cx18-queue.h" |
17 | #include "cx18-ioctl.h" |
18 | #include "cx18-streams.h" |
19 | #include "cx18-cards.h" |
20 | #include "cx18-scb.h" |
21 | #include "cx18-dvb.h" |
22 | |
23 | #define CX18_DSP0_INTERRUPT_MASK 0xd0004C |
24 | |
25 | static const struct v4l2_file_operations cx18_v4l2_enc_fops = { |
26 | .owner = THIS_MODULE, |
27 | .read = cx18_v4l2_read, |
28 | .open = cx18_v4l2_open, |
29 | .unlocked_ioctl = video_ioctl2, |
30 | .release = cx18_v4l2_close, |
31 | .poll = cx18_v4l2_enc_poll, |
32 | }; |
33 | |
34 | static const struct v4l2_file_operations cx18_v4l2_enc_yuv_fops = { |
35 | .owner = THIS_MODULE, |
36 | .open = cx18_v4l2_open, |
37 | .unlocked_ioctl = video_ioctl2, |
38 | .release = cx18_v4l2_close, |
39 | .poll = vb2_fop_poll, |
40 | .read = vb2_fop_read, |
41 | .mmap = vb2_fop_mmap, |
42 | }; |
43 | |
44 | /* offset from 0 to register ts v4l2 minors on */ |
45 | #define CX18_V4L2_ENC_TS_OFFSET 16 |
46 | /* offset from 0 to register pcm v4l2 minors on */ |
47 | #define CX18_V4L2_ENC_PCM_OFFSET 24 |
48 | /* offset from 0 to register yuv v4l2 minors on */ |
49 | #define CX18_V4L2_ENC_YUV_OFFSET 32 |
50 | |
51 | static struct { |
52 | const char *name; |
53 | int vfl_type; |
54 | int num_offset; |
55 | int dma; |
56 | u32 caps; |
57 | } cx18_stream_info[] = { |
58 | { /* CX18_ENC_STREAM_TYPE_MPG */ |
59 | "encoder MPEG" , |
60 | VFL_TYPE_VIDEO, 0, |
61 | DMA_FROM_DEVICE, |
62 | V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE | |
63 | V4L2_CAP_AUDIO | V4L2_CAP_TUNER |
64 | }, |
65 | { /* CX18_ENC_STREAM_TYPE_TS */ |
66 | "TS" , |
67 | VFL_TYPE_VIDEO, -1, |
68 | DMA_FROM_DEVICE, |
69 | }, |
70 | { /* CX18_ENC_STREAM_TYPE_YUV */ |
71 | "encoder YUV" , |
72 | VFL_TYPE_VIDEO, CX18_V4L2_ENC_YUV_OFFSET, |
73 | DMA_FROM_DEVICE, |
74 | V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE | |
75 | V4L2_CAP_STREAMING | V4L2_CAP_AUDIO | V4L2_CAP_TUNER |
76 | }, |
77 | { /* CX18_ENC_STREAM_TYPE_VBI */ |
78 | "encoder VBI" , |
79 | VFL_TYPE_VBI, 0, |
80 | DMA_FROM_DEVICE, |
81 | V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE | |
82 | V4L2_CAP_READWRITE | V4L2_CAP_AUDIO | V4L2_CAP_TUNER |
83 | }, |
84 | { /* CX18_ENC_STREAM_TYPE_PCM */ |
85 | "encoder PCM audio" , |
86 | VFL_TYPE_VIDEO, CX18_V4L2_ENC_PCM_OFFSET, |
87 | DMA_FROM_DEVICE, |
88 | V4L2_CAP_TUNER | V4L2_CAP_AUDIO | V4L2_CAP_READWRITE, |
89 | }, |
90 | { /* CX18_ENC_STREAM_TYPE_IDX */ |
91 | "encoder IDX" , |
92 | VFL_TYPE_VIDEO, -1, |
93 | DMA_FROM_DEVICE, |
94 | }, |
95 | { /* CX18_ENC_STREAM_TYPE_RAD */ |
96 | "encoder radio" , |
97 | VFL_TYPE_RADIO, 0, |
98 | DMA_NONE, |
99 | V4L2_CAP_RADIO | V4L2_CAP_TUNER |
100 | }, |
101 | }; |
102 | |
103 | static int cx18_queue_setup(struct vb2_queue *vq, |
104 | unsigned int *nbuffers, unsigned int *nplanes, |
105 | unsigned int sizes[], struct device *alloc_devs[]) |
106 | { |
107 | unsigned int q_num_bufs = vb2_get_num_buffers(q: vq); |
108 | struct cx18_stream *s = vb2_get_drv_priv(q: vq); |
109 | struct cx18 *cx = s->cx; |
110 | unsigned int szimage; |
111 | |
112 | /* |
113 | * HM12 YUV size is (Y=(h*720) + UV=(h*(720/2))) |
114 | * UYUV YUV size is (Y=(h*720) + UV=(h*(720))) |
115 | */ |
116 | if (s->pixelformat == V4L2_PIX_FMT_NV12_16L16) |
117 | szimage = cx->cxhdl.height * 720 * 3 / 2; |
118 | else |
119 | szimage = cx->cxhdl.height * 720 * 2; |
120 | |
121 | /* |
122 | * Let's request at least three buffers: two for the |
123 | * DMA engine and one for userspace. |
124 | */ |
125 | if (q_num_bufs + *nbuffers < 3) |
126 | *nbuffers = 3 - q_num_bufs; |
127 | |
128 | if (*nplanes) { |
129 | if (*nplanes != 1 || sizes[0] < szimage) |
130 | return -EINVAL; |
131 | return 0; |
132 | } |
133 | |
134 | sizes[0] = szimage; |
135 | *nplanes = 1; |
136 | return 0; |
137 | } |
138 | |
139 | static void cx18_buf_queue(struct vb2_buffer *vb) |
140 | { |
141 | struct cx18_stream *s = vb2_get_drv_priv(q: vb->vb2_queue); |
142 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
143 | struct cx18_vb2_buffer *buf = |
144 | container_of(vbuf, struct cx18_vb2_buffer, vb); |
145 | unsigned long flags; |
146 | |
147 | spin_lock_irqsave(&s->vb_lock, flags); |
148 | list_add_tail(new: &buf->list, head: &s->vb_capture); |
149 | spin_unlock_irqrestore(lock: &s->vb_lock, flags); |
150 | } |
151 | |
152 | static int cx18_buf_prepare(struct vb2_buffer *vb) |
153 | { |
154 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
155 | struct cx18_stream *s = vb2_get_drv_priv(q: vb->vb2_queue); |
156 | struct cx18 *cx = s->cx; |
157 | unsigned int size; |
158 | |
159 | /* |
160 | * HM12 YUV size is (Y=(h*720) + UV=(h*(720/2))) |
161 | * UYUV YUV size is (Y=(h*720) + UV=(h*(720))) |
162 | */ |
163 | if (s->pixelformat == V4L2_PIX_FMT_NV12_16L16) |
164 | size = cx->cxhdl.height * 720 * 3 / 2; |
165 | else |
166 | size = cx->cxhdl.height * 720 * 2; |
167 | |
168 | if (vb2_plane_size(vb, plane_no: 0) < size) |
169 | return -EINVAL; |
170 | vb2_set_plane_payload(vb, plane_no: 0, size); |
171 | vbuf->field = V4L2_FIELD_INTERLACED; |
172 | return 0; |
173 | } |
174 | |
175 | void cx18_clear_queue(struct cx18_stream *s, enum vb2_buffer_state state) |
176 | { |
177 | while (!list_empty(head: &s->vb_capture)) { |
178 | struct cx18_vb2_buffer *buf; |
179 | |
180 | buf = list_first_entry(&s->vb_capture, |
181 | struct cx18_vb2_buffer, list); |
182 | list_del(entry: &buf->list); |
183 | vb2_buffer_done(vb: &buf->vb.vb2_buf, state); |
184 | } |
185 | } |
186 | |
187 | static int cx18_start_streaming(struct vb2_queue *vq, unsigned int count) |
188 | { |
189 | struct v4l2_fh *owner = vq->owner; |
190 | struct cx18_stream *s = vb2_get_drv_priv(q: vq); |
191 | unsigned long flags; |
192 | int rc; |
193 | |
194 | if (WARN_ON(!owner)) { |
195 | rc = -EIO; |
196 | goto clear_queue; |
197 | } |
198 | |
199 | s->sequence = 0; |
200 | rc = cx18_start_capture(id: fh2id(fh: owner)); |
201 | if (!rc) { |
202 | /* Establish a buffer timeout */ |
203 | mod_timer(timer: &s->vb_timeout, expires: msecs_to_jiffies(m: 2000) + jiffies); |
204 | return 0; |
205 | } |
206 | |
207 | clear_queue: |
208 | spin_lock_irqsave(&s->vb_lock, flags); |
209 | cx18_clear_queue(s, state: VB2_BUF_STATE_QUEUED); |
210 | spin_unlock_irqrestore(lock: &s->vb_lock, flags); |
211 | return rc; |
212 | } |
213 | |
214 | static void cx18_stop_streaming(struct vb2_queue *vq) |
215 | { |
216 | struct cx18_stream *s = vb2_get_drv_priv(q: vq); |
217 | unsigned long flags; |
218 | |
219 | cx18_stop_capture(s, gop_end: 0); |
220 | timer_delete_sync(timer: &s->vb_timeout); |
221 | spin_lock_irqsave(&s->vb_lock, flags); |
222 | cx18_clear_queue(s, state: VB2_BUF_STATE_ERROR); |
223 | spin_unlock_irqrestore(lock: &s->vb_lock, flags); |
224 | } |
225 | |
226 | static const struct vb2_ops cx18_vb2_qops = { |
227 | .queue_setup = cx18_queue_setup, |
228 | .buf_queue = cx18_buf_queue, |
229 | .buf_prepare = cx18_buf_prepare, |
230 | .start_streaming = cx18_start_streaming, |
231 | .stop_streaming = cx18_stop_streaming, |
232 | .wait_prepare = vb2_ops_wait_prepare, |
233 | .wait_finish = vb2_ops_wait_finish, |
234 | }; |
235 | |
236 | static int cx18_stream_init(struct cx18 *cx, int type) |
237 | { |
238 | struct cx18_stream *s = &cx->streams[type]; |
239 | int err = 0; |
240 | |
241 | memset(s, 0, sizeof(*s)); |
242 | |
243 | /* initialize cx18_stream fields */ |
244 | s->dvb = NULL; |
245 | s->cx = cx; |
246 | s->type = type; |
247 | s->name = cx18_stream_info[type].name; |
248 | s->handle = CX18_INVALID_TASK_HANDLE; |
249 | |
250 | s->dma = cx18_stream_info[type].dma; |
251 | s->v4l2_dev_caps = cx18_stream_info[type].caps; |
252 | s->buffers = cx->stream_buffers[type]; |
253 | s->buf_size = cx->stream_buf_size[type]; |
254 | INIT_LIST_HEAD(list: &s->buf_pool); |
255 | s->bufs_per_mdl = 1; |
256 | s->mdl_size = s->buf_size * s->bufs_per_mdl; |
257 | |
258 | init_waitqueue_head(&s->waitq); |
259 | s->id = -1; |
260 | spin_lock_init(&s->q_free.lock); |
261 | cx18_queue_init(q: &s->q_free); |
262 | spin_lock_init(&s->q_busy.lock); |
263 | cx18_queue_init(q: &s->q_busy); |
264 | spin_lock_init(&s->q_full.lock); |
265 | cx18_queue_init(q: &s->q_full); |
266 | spin_lock_init(&s->q_idle.lock); |
267 | cx18_queue_init(q: &s->q_idle); |
268 | |
269 | INIT_WORK(&s->out_work_order, cx18_out_work_handler); |
270 | |
271 | INIT_LIST_HEAD(list: &s->vb_capture); |
272 | timer_setup(&s->vb_timeout, cx18_vb_timeout, 0); |
273 | spin_lock_init(&s->vb_lock); |
274 | |
275 | if (type == CX18_ENC_STREAM_TYPE_YUV) { |
276 | s->vb_type = V4L2_BUF_TYPE_VIDEO_CAPTURE; |
277 | |
278 | /* Assume the previous pixel default */ |
279 | s->pixelformat = V4L2_PIX_FMT_NV12_16L16; |
280 | s->vb_bytes_per_frame = cx->cxhdl.height * 720 * 3 / 2; |
281 | s->vb_bytes_per_line = 720; |
282 | |
283 | s->vidq.io_modes = VB2_READ | VB2_MMAP | VB2_DMABUF; |
284 | s->vidq.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; |
285 | s->vidq.drv_priv = s; |
286 | s->vidq.buf_struct_size = sizeof(struct cx18_vb2_buffer); |
287 | s->vidq.ops = &cx18_vb2_qops; |
288 | s->vidq.mem_ops = &vb2_vmalloc_memops; |
289 | s->vidq.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; |
290 | s->vidq.min_queued_buffers = 2; |
291 | s->vidq.gfp_flags = GFP_DMA32; |
292 | s->vidq.dev = &cx->pci_dev->dev; |
293 | s->vidq.lock = &cx->serialize_lock; |
294 | |
295 | err = vb2_queue_init(q: &s->vidq); |
296 | if (err) |
297 | v4l2_err(&cx->v4l2_dev, "cannot init vb2 queue\n" ); |
298 | s->video_dev.queue = &s->vidq; |
299 | } |
300 | return err; |
301 | } |
302 | |
303 | static int cx18_prep_dev(struct cx18 *cx, int type) |
304 | { |
305 | struct cx18_stream *s = &cx->streams[type]; |
306 | u32 cap = cx->v4l2_cap; |
307 | int num_offset = cx18_stream_info[type].num_offset; |
308 | int num = cx->instance + cx18_first_minor + num_offset; |
309 | int err; |
310 | |
311 | /* |
312 | * These five fields are always initialized. |
313 | * For analog capture related streams, if video_dev.v4l2_dev == NULL then the |
314 | * stream is not in use. |
315 | * For the TS stream, if dvb == NULL then the stream is not in use. |
316 | * In those cases no other fields but these four can be used. |
317 | */ |
318 | s->video_dev.v4l2_dev = NULL; |
319 | s->dvb = NULL; |
320 | s->cx = cx; |
321 | s->type = type; |
322 | s->name = cx18_stream_info[type].name; |
323 | |
324 | /* Check whether the radio is supported */ |
325 | if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO)) |
326 | return 0; |
327 | |
328 | /* Check whether VBI is supported */ |
329 | if (type == CX18_ENC_STREAM_TYPE_VBI && |
330 | !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE))) |
331 | return 0; |
332 | |
333 | /* User explicitly selected 0 buffers for these streams, so don't |
334 | create them. */ |
335 | if (cx18_stream_info[type].dma != DMA_NONE && |
336 | cx->stream_buffers[type] == 0) { |
337 | CX18_INFO("Disabled %s device\n" , cx18_stream_info[type].name); |
338 | return 0; |
339 | } |
340 | |
341 | err = cx18_stream_init(cx, type); |
342 | if (err) |
343 | return err; |
344 | |
345 | /* Allocate the cx18_dvb struct only for the TS on cards with DTV */ |
346 | if (type == CX18_ENC_STREAM_TYPE_TS) { |
347 | if (cx->card->hw_all & CX18_HW_DVB) { |
348 | s->dvb = kzalloc(size: sizeof(struct cx18_dvb), GFP_KERNEL); |
349 | if (s->dvb == NULL) { |
350 | CX18_ERR("Couldn't allocate cx18_dvb structure for %s\n" , |
351 | s->name); |
352 | return -ENOMEM; |
353 | } |
354 | } else { |
355 | /* Don't need buffers for the TS, if there is no DVB */ |
356 | s->buffers = 0; |
357 | } |
358 | } |
359 | |
360 | if (num_offset == -1) |
361 | return 0; |
362 | |
363 | /* initialize the v4l2 video device structure */ |
364 | snprintf(buf: s->video_dev.name, size: sizeof(s->video_dev.name), fmt: "%s %s" , |
365 | cx->v4l2_dev.name, s->name); |
366 | |
367 | s->video_dev.num = num; |
368 | s->video_dev.v4l2_dev = &cx->v4l2_dev; |
369 | if (type == CX18_ENC_STREAM_TYPE_YUV) |
370 | s->video_dev.fops = &cx18_v4l2_enc_yuv_fops; |
371 | else |
372 | s->video_dev.fops = &cx18_v4l2_enc_fops; |
373 | s->video_dev.release = video_device_release_empty; |
374 | if (cx->card->video_inputs->video_type == CX18_CARD_INPUT_VID_TUNER) |
375 | s->video_dev.tvnorms = cx->tuner_std; |
376 | else |
377 | s->video_dev.tvnorms = V4L2_STD_ALL; |
378 | s->video_dev.lock = &cx->serialize_lock; |
379 | cx18_set_funcs(vdev: &s->video_dev); |
380 | return 0; |
381 | } |
382 | |
383 | /* Initialize v4l2 variables and register v4l2 devices */ |
384 | int cx18_streams_setup(struct cx18 *cx) |
385 | { |
386 | int type, ret; |
387 | |
388 | /* Setup V4L2 Devices */ |
389 | for (type = 0; type < CX18_MAX_STREAMS; type++) { |
390 | /* Prepare device */ |
391 | ret = cx18_prep_dev(cx, type); |
392 | if (ret < 0) |
393 | break; |
394 | |
395 | /* Allocate Stream */ |
396 | ret = cx18_stream_alloc(s: &cx->streams[type]); |
397 | if (ret < 0) |
398 | break; |
399 | } |
400 | if (type == CX18_MAX_STREAMS) |
401 | return 0; |
402 | |
403 | /* One or more streams could not be initialized. Clean 'em all up. */ |
404 | cx18_streams_cleanup(cx, unregister: 0); |
405 | return ret; |
406 | } |
407 | |
408 | static int cx18_reg_dev(struct cx18 *cx, int type) |
409 | { |
410 | struct cx18_stream *s = &cx->streams[type]; |
411 | int vfl_type = cx18_stream_info[type].vfl_type; |
412 | const char *name; |
413 | int num, ret; |
414 | |
415 | if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) { |
416 | ret = cx18_dvb_register(stream: s); |
417 | if (ret < 0) { |
418 | CX18_ERR("DVB failed to register\n" ); |
419 | return ret; |
420 | } |
421 | } |
422 | |
423 | if (s->video_dev.v4l2_dev == NULL) |
424 | return 0; |
425 | |
426 | num = s->video_dev.num; |
427 | s->video_dev.device_caps = s->v4l2_dev_caps; /* device capabilities */ |
428 | /* card number + user defined offset + device offset */ |
429 | if (type != CX18_ENC_STREAM_TYPE_MPG) { |
430 | struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG]; |
431 | |
432 | if (s_mpg->video_dev.v4l2_dev) |
433 | num = s_mpg->video_dev.num |
434 | + cx18_stream_info[type].num_offset; |
435 | } |
436 | video_set_drvdata(vdev: &s->video_dev, data: s); |
437 | |
438 | /* Register device. First try the desired minor, then any free one. */ |
439 | ret = video_register_device_no_warn(vdev: &s->video_dev, type: vfl_type, nr: num); |
440 | if (ret < 0) { |
441 | CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n" , |
442 | s->name, num); |
443 | s->video_dev.v4l2_dev = NULL; |
444 | return ret; |
445 | } |
446 | |
447 | name = video_device_node_name(vdev: &s->video_dev); |
448 | |
449 | switch (vfl_type) { |
450 | case VFL_TYPE_VIDEO: |
451 | CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n" , |
452 | name, s->name, cx->stream_buffers[type], |
453 | cx->stream_buf_size[type] / 1024, |
454 | (cx->stream_buf_size[type] * 100 / 1024) % 100); |
455 | break; |
456 | |
457 | case VFL_TYPE_RADIO: |
458 | CX18_INFO("Registered device %s for %s\n" , name, s->name); |
459 | break; |
460 | |
461 | case VFL_TYPE_VBI: |
462 | if (cx->stream_buffers[type]) |
463 | CX18_INFO("Registered device %s for %s (%d x %d bytes)\n" , |
464 | name, s->name, cx->stream_buffers[type], |
465 | cx->stream_buf_size[type]); |
466 | else |
467 | CX18_INFO("Registered device %s for %s\n" , |
468 | name, s->name); |
469 | break; |
470 | } |
471 | |
472 | return 0; |
473 | } |
474 | |
475 | /* Register v4l2 devices */ |
476 | int cx18_streams_register(struct cx18 *cx) |
477 | { |
478 | int type; |
479 | int err; |
480 | int ret = 0; |
481 | |
482 | /* Register V4L2 devices */ |
483 | for (type = 0; type < CX18_MAX_STREAMS; type++) { |
484 | err = cx18_reg_dev(cx, type); |
485 | if (err && ret == 0) |
486 | ret = err; |
487 | } |
488 | |
489 | if (ret == 0) |
490 | return 0; |
491 | |
492 | /* One or more streams could not be initialized. Clean 'em all up. */ |
493 | cx18_streams_cleanup(cx, unregister: 1); |
494 | return ret; |
495 | } |
496 | |
497 | /* Unregister v4l2 devices */ |
498 | void cx18_streams_cleanup(struct cx18 *cx, int unregister) |
499 | { |
500 | struct video_device *vdev; |
501 | int type; |
502 | |
503 | /* Teardown all streams */ |
504 | for (type = 0; type < CX18_MAX_STREAMS; type++) { |
505 | |
506 | /* The TS has a cx18_dvb structure, not a video_device */ |
507 | if (type == CX18_ENC_STREAM_TYPE_TS) { |
508 | if (cx->streams[type].dvb != NULL) { |
509 | if (unregister) |
510 | cx18_dvb_unregister(stream: &cx->streams[type]); |
511 | kfree(objp: cx->streams[type].dvb); |
512 | cx->streams[type].dvb = NULL; |
513 | cx18_stream_free(s: &cx->streams[type]); |
514 | } |
515 | continue; |
516 | } |
517 | |
518 | /* No struct video_device, but can have buffers allocated */ |
519 | if (type == CX18_ENC_STREAM_TYPE_IDX) { |
520 | /* If the module params didn't inhibit IDX ... */ |
521 | if (cx->stream_buffers[type] != 0) { |
522 | cx->stream_buffers[type] = 0; |
523 | /* |
524 | * Before calling cx18_stream_free(), |
525 | * check if the IDX stream was actually set up. |
526 | * Needed, since the cx18_probe() error path |
527 | * exits through here as well as normal clean up |
528 | */ |
529 | if (cx->streams[type].buffers != 0) |
530 | cx18_stream_free(s: &cx->streams[type]); |
531 | } |
532 | continue; |
533 | } |
534 | |
535 | /* If struct video_device exists, can have buffers allocated */ |
536 | vdev = &cx->streams[type].video_dev; |
537 | |
538 | if (vdev->v4l2_dev == NULL) |
539 | continue; |
540 | |
541 | cx18_stream_free(s: &cx->streams[type]); |
542 | |
543 | if (type == CX18_ENC_STREAM_TYPE_YUV) |
544 | vb2_video_unregister_device(vdev); |
545 | else |
546 | video_unregister_device(vdev); |
547 | } |
548 | } |
549 | |
550 | static void cx18_vbi_setup(struct cx18_stream *s) |
551 | { |
552 | struct cx18 *cx = s->cx; |
553 | int raw = cx18_raw_vbi(cx); |
554 | u32 data[CX2341X_MBOX_MAX_DATA]; |
555 | int lines; |
556 | |
557 | if (cx->is_60hz) { |
558 | cx->vbi.count = 12; |
559 | cx->vbi.start[0] = 10; |
560 | cx->vbi.start[1] = 273; |
561 | } else { /* PAL/SECAM */ |
562 | cx->vbi.count = 18; |
563 | cx->vbi.start[0] = 6; |
564 | cx->vbi.start[1] = 318; |
565 | } |
566 | |
567 | /* setup VBI registers */ |
568 | if (raw) |
569 | v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi); |
570 | else |
571 | v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced); |
572 | |
573 | /* |
574 | * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw |
575 | * VBI when the first analog capture channel starts, as once it starts |
576 | * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup |
577 | * (i.e. for the VBI capture channels). We also send it for each |
578 | * analog capture channel anyway just to make sure we get the proper |
579 | * behavior |
580 | */ |
581 | if (raw) { |
582 | lines = cx->vbi.count * 2; |
583 | } else { |
584 | /* |
585 | * For 525/60 systems, according to the VIP 2 & BT.656 std: |
586 | * The EAV RP code's Field bit toggles on line 4, a few lines |
587 | * after the Vertcal Blank bit has already toggled. |
588 | * Tell the encoder to capture 21-4+1=18 lines per field, |
589 | * since we want lines 10 through 21. |
590 | * |
591 | * For 625/50 systems, according to the VIP 2 & BT.656 std: |
592 | * The EAV RP code's Field bit toggles on line 1, a few lines |
593 | * after the Vertcal Blank bit has already toggled. |
594 | * (We've actually set the digitizer so that the Field bit |
595 | * toggles on line 2.) Tell the encoder to capture 23-2+1=22 |
596 | * lines per field, since we want lines 6 through 23. |
597 | */ |
598 | lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2; |
599 | } |
600 | |
601 | data[0] = s->handle; |
602 | /* Lines per field */ |
603 | data[1] = (lines / 2) | ((lines / 2) << 16); |
604 | /* bytes per line */ |
605 | data[2] = (raw ? VBI_ACTIVE_SAMPLES |
606 | : (cx->is_60hz ? VBI_HBLANK_SAMPLES_60HZ |
607 | : VBI_HBLANK_SAMPLES_50HZ)); |
608 | /* Every X number of frames a VBI interrupt arrives |
609 | (frames as in 25 or 30 fps) */ |
610 | data[3] = 1; |
611 | /* |
612 | * Set the SAV/EAV RP codes to look for as start/stop points |
613 | * when in VIP-1.1 mode |
614 | */ |
615 | if (raw) { |
616 | /* |
617 | * Start codes for beginning of "active" line in vertical blank |
618 | * 0x20 ( VerticalBlank ) |
619 | * 0x60 ( EvenField VerticalBlank ) |
620 | */ |
621 | data[4] = 0x20602060; |
622 | /* |
623 | * End codes for end of "active" raw lines and regular lines |
624 | * 0x30 ( VerticalBlank HorizontalBlank) |
625 | * 0x70 ( EvenField VerticalBlank HorizontalBlank) |
626 | * 0x90 (Task HorizontalBlank) |
627 | * 0xd0 (Task EvenField HorizontalBlank) |
628 | */ |
629 | data[5] = 0x307090d0; |
630 | } else { |
631 | /* |
632 | * End codes for active video, we want data in the hblank region |
633 | * 0xb0 (Task 0 VerticalBlank HorizontalBlank) |
634 | * 0xf0 (Task EvenField VerticalBlank HorizontalBlank) |
635 | * |
636 | * Since the V bit is only allowed to toggle in the EAV RP code, |
637 | * just before the first active region line, these two |
638 | * are problematic: |
639 | * 0x90 (Task HorizontalBlank) |
640 | * 0xd0 (Task EvenField HorizontalBlank) |
641 | * |
642 | * We have set the digitzer such that we don't have to worry |
643 | * about these problem codes. |
644 | */ |
645 | data[4] = 0xB0F0B0F0; |
646 | /* |
647 | * Start codes for beginning of active line in vertical blank |
648 | * 0xa0 (Task VerticalBlank ) |
649 | * 0xe0 (Task EvenField VerticalBlank ) |
650 | */ |
651 | data[5] = 0xA0E0A0E0; |
652 | } |
653 | |
654 | CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n" , |
655 | data[0], data[1], data[2], data[3], data[4], data[5]); |
656 | |
657 | cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, args: 6, data); |
658 | } |
659 | |
660 | void cx18_stream_rotate_idx_mdls(struct cx18 *cx) |
661 | { |
662 | struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX]; |
663 | struct cx18_mdl *mdl; |
664 | |
665 | if (!cx18_stream_enabled(s)) |
666 | return; |
667 | |
668 | /* Return if the firmware is not running low on MDLs */ |
669 | if ((atomic_read(v: &s->q_free.depth) + atomic_read(v: &s->q_busy.depth)) >= |
670 | CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN) |
671 | return; |
672 | |
673 | /* Return if there are no MDLs to rotate back to the firmware */ |
674 | if (atomic_read(v: &s->q_full.depth) < 2) |
675 | return; |
676 | |
677 | /* |
678 | * Take the oldest IDX MDL still holding data, and discard its index |
679 | * entries by scheduling the MDL to go back to the firmware |
680 | */ |
681 | mdl = cx18_dequeue(s, q: &s->q_full); |
682 | if (mdl != NULL) |
683 | cx18_enqueue(s, mdl, q: &s->q_free); |
684 | } |
685 | |
686 | static |
687 | struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s, |
688 | struct cx18_mdl *mdl) |
689 | { |
690 | struct cx18 *cx = s->cx; |
691 | struct cx18_queue *q; |
692 | |
693 | /* Don't give it to the firmware, if we're not running a capture */ |
694 | if (s->handle == CX18_INVALID_TASK_HANDLE || |
695 | test_bit(CX18_F_S_STOPPING, &s->s_flags) || |
696 | !test_bit(CX18_F_S_STREAMING, &s->s_flags)) |
697 | return cx18_enqueue(s, mdl, q: &s->q_free); |
698 | |
699 | q = cx18_enqueue(s, mdl, q: &s->q_busy); |
700 | if (q != &s->q_busy) |
701 | return q; /* The firmware has the max MDLs it can handle */ |
702 | |
703 | cx18_mdl_sync_for_device(s, mdl); |
704 | cx18_vapi(cx, CX18_CPU_DE_SET_MDL, args: 5, s->handle, |
705 | (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem, |
706 | s->bufs_per_mdl, mdl->id, s->mdl_size); |
707 | return q; |
708 | } |
709 | |
710 | static |
711 | void _cx18_stream_load_fw_queue(struct cx18_stream *s) |
712 | { |
713 | struct cx18_queue *q; |
714 | struct cx18_mdl *mdl; |
715 | |
716 | if (atomic_read(v: &s->q_free.depth) == 0 || |
717 | atomic_read(v: &s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM) |
718 | return; |
719 | |
720 | /* Move from q_free to q_busy notifying the firmware, until the limit */ |
721 | do { |
722 | mdl = cx18_dequeue(s, q: &s->q_free); |
723 | if (mdl == NULL) |
724 | break; |
725 | q = _cx18_stream_put_mdl_fw(s, mdl); |
726 | } while (atomic_read(v: &s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM |
727 | && q == &s->q_busy); |
728 | } |
729 | |
730 | void cx18_out_work_handler(struct work_struct *work) |
731 | { |
732 | struct cx18_stream *s = |
733 | container_of(work, struct cx18_stream, out_work_order); |
734 | |
735 | _cx18_stream_load_fw_queue(s); |
736 | } |
737 | |
738 | static void cx18_stream_configure_mdls(struct cx18_stream *s) |
739 | { |
740 | cx18_unload_queues(s); |
741 | |
742 | switch (s->type) { |
743 | case CX18_ENC_STREAM_TYPE_YUV: |
744 | /* |
745 | * Height should be a multiple of 32 lines. |
746 | * Set the MDL size to the exact size needed for one frame. |
747 | * Use enough buffers per MDL to cover the MDL size |
748 | */ |
749 | if (s->pixelformat == V4L2_PIX_FMT_NV12_16L16) |
750 | s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2; |
751 | else |
752 | s->mdl_size = 720 * s->cx->cxhdl.height * 2; |
753 | s->bufs_per_mdl = s->mdl_size / s->buf_size; |
754 | if (s->mdl_size % s->buf_size) |
755 | s->bufs_per_mdl++; |
756 | break; |
757 | case CX18_ENC_STREAM_TYPE_VBI: |
758 | s->bufs_per_mdl = 1; |
759 | if (cx18_raw_vbi(cx: s->cx)) { |
760 | s->mdl_size = (s->cx->is_60hz ? 12 : 18) |
761 | * 2 * VBI_ACTIVE_SAMPLES; |
762 | } else { |
763 | /* |
764 | * See comment in cx18_vbi_setup() below about the |
765 | * extra lines we capture in sliced VBI mode due to |
766 | * the lines on which EAV RP codes toggle. |
767 | */ |
768 | s->mdl_size = s->cx->is_60hz |
769 | ? (21 - 4 + 1) * 2 * VBI_HBLANK_SAMPLES_60HZ |
770 | : (23 - 2 + 1) * 2 * VBI_HBLANK_SAMPLES_50HZ; |
771 | } |
772 | break; |
773 | default: |
774 | s->bufs_per_mdl = 1; |
775 | s->mdl_size = s->buf_size * s->bufs_per_mdl; |
776 | break; |
777 | } |
778 | |
779 | cx18_load_queues(s); |
780 | } |
781 | |
782 | int cx18_start_v4l2_encode_stream(struct cx18_stream *s) |
783 | { |
784 | u32 data[MAX_MB_ARGUMENTS]; |
785 | struct cx18 *cx = s->cx; |
786 | int captype = 0; |
787 | struct cx18_stream *s_idx; |
788 | |
789 | if (!cx18_stream_enabled(s)) |
790 | return -EINVAL; |
791 | |
792 | CX18_DEBUG_INFO("Start encoder stream %s\n" , s->name); |
793 | |
794 | switch (s->type) { |
795 | case CX18_ENC_STREAM_TYPE_MPG: |
796 | captype = CAPTURE_CHANNEL_TYPE_MPEG; |
797 | cx->mpg_data_received = cx->vbi_data_inserted = 0; |
798 | cx->dualwatch_jiffies = jiffies; |
799 | cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(ctrl: cx->cxhdl.audio_mode); |
800 | cx->search_pack_header = 0; |
801 | break; |
802 | |
803 | case CX18_ENC_STREAM_TYPE_IDX: |
804 | captype = CAPTURE_CHANNEL_TYPE_INDEX; |
805 | break; |
806 | case CX18_ENC_STREAM_TYPE_TS: |
807 | captype = CAPTURE_CHANNEL_TYPE_TS; |
808 | break; |
809 | case CX18_ENC_STREAM_TYPE_YUV: |
810 | captype = CAPTURE_CHANNEL_TYPE_YUV; |
811 | break; |
812 | case CX18_ENC_STREAM_TYPE_PCM: |
813 | captype = CAPTURE_CHANNEL_TYPE_PCM; |
814 | break; |
815 | case CX18_ENC_STREAM_TYPE_VBI: |
816 | #ifdef CX18_ENCODER_PARSES_SLICED |
817 | captype = cx18_raw_vbi(cx) ? |
818 | CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI; |
819 | #else |
820 | /* |
821 | * Currently we set things up so that Sliced VBI from the |
822 | * digitizer is handled as Raw VBI by the encoder |
823 | */ |
824 | captype = CAPTURE_CHANNEL_TYPE_VBI; |
825 | #endif |
826 | cx->vbi.frame = 0; |
827 | cx->vbi.inserted_frame = 0; |
828 | memset(cx->vbi.sliced_mpeg_size, |
829 | 0, sizeof(cx->vbi.sliced_mpeg_size)); |
830 | break; |
831 | default: |
832 | return -EINVAL; |
833 | } |
834 | |
835 | /* Clear Streamoff flags in case left from last capture */ |
836 | clear_bit(CX18_F_S_STREAMOFF, addr: &s->s_flags); |
837 | |
838 | cx18_vapi_result(cx, data, CX18_CREATE_TASK, args: 1, CPU_CMD_MASK_CAPTURE); |
839 | s->handle = data[0]; |
840 | cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, args: 2, s->handle, captype); |
841 | |
842 | /* |
843 | * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and |
844 | * set up all the parameters, as it is not obvious which parameters the |
845 | * firmware shares across capture channel types and which it does not. |
846 | * |
847 | * Some of the cx18_vapi() calls below apply to only certain capture |
848 | * channel types. We're hoping there's no harm in calling most of them |
849 | * anyway, as long as the values are all consistent. Setting some |
850 | * shared parameters will have no effect once an analog capture channel |
851 | * has started streaming. |
852 | */ |
853 | if (captype != CAPTURE_CHANNEL_TYPE_TS) { |
854 | cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, args: 2, s->handle, 0); |
855 | cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, args: 3, s->handle, 3, 1); |
856 | cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, args: 3, s->handle, 8, 0); |
857 | cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, args: 3, s->handle, 4, 1); |
858 | |
859 | /* |
860 | * Audio related reset according to |
861 | * Documentation/driver-api/media/drivers/cx2341x-devel.rst |
862 | */ |
863 | if (atomic_read(v: &cx->ana_capturing) == 0) |
864 | cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, args: 2, |
865 | s->handle, 12); |
866 | |
867 | /* |
868 | * Number of lines for Field 1 & Field 2 according to |
869 | * Documentation/driver-api/media/drivers/cx2341x-devel.rst |
870 | * Field 1 is 312 for 625 line systems in BT.656 |
871 | * Field 2 is 313 for 625 line systems in BT.656 |
872 | */ |
873 | cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, args: 3, |
874 | s->handle, 312, 313); |
875 | |
876 | if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE) |
877 | cx18_vbi_setup(s); |
878 | |
879 | /* |
880 | * Select to receive I, P, and B frame index entries, if the |
881 | * index stream is enabled. Otherwise disable index entry |
882 | * generation. |
883 | */ |
884 | s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX]; |
885 | cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, args: 2, |
886 | s->handle, cx18_stream_enabled(s: s_idx) ? 7 : 0); |
887 | |
888 | /* Call out to the common CX2341x API setup for user controls */ |
889 | cx->cxhdl.priv = s; |
890 | cx2341x_handler_setup(cxhdl: &cx->cxhdl); |
891 | |
892 | /* |
893 | * When starting a capture and we're set for radio, |
894 | * ensure the video is muted, despite the user control. |
895 | */ |
896 | if (!cx->cxhdl.video_mute && |
897 | test_bit(CX18_F_I_RADIO_USER, &cx->i_flags)) |
898 | cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, args: 2, s->handle, |
899 | (v4l2_ctrl_g_ctrl(ctrl: cx->cxhdl.video_mute_yuv) << 8) | 1); |
900 | |
901 | /* Enable the Video Format Converter for UYVY 4:2:2 support, |
902 | * rather than the default HM12 Macroblovk 4:2:0 support. |
903 | */ |
904 | if (captype == CAPTURE_CHANNEL_TYPE_YUV) { |
905 | if (s->pixelformat == V4L2_PIX_FMT_UYVY) |
906 | cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, args: 2, |
907 | s->handle, 1); |
908 | else |
909 | /* If in doubt, default to HM12 */ |
910 | cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, args: 2, |
911 | s->handle, 0); |
912 | } |
913 | } |
914 | |
915 | if (atomic_read(v: &cx->tot_capturing) == 0) { |
916 | cx2341x_handler_set_busy(cxhdl: &cx->cxhdl, busy: 1); |
917 | clear_bit(CX18_F_I_EOS, addr: &cx->i_flags); |
918 | cx18_write_reg(cx, val: 7, CX18_DSP0_INTERRUPT_MASK); |
919 | } |
920 | |
921 | cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, args: 3, s->handle, |
922 | (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem, |
923 | (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem); |
924 | |
925 | /* Init all the cpu_mdls for this stream */ |
926 | cx18_stream_configure_mdls(s); |
927 | _cx18_stream_load_fw_queue(s); |
928 | |
929 | /* begin_capture */ |
930 | if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, args: 1, s->handle)) { |
931 | CX18_DEBUG_WARN("Error starting capture!\n" ); |
932 | /* Ensure we're really not capturing before releasing MDLs */ |
933 | set_bit(CX18_F_S_STOPPING, addr: &s->s_flags); |
934 | if (s->type == CX18_ENC_STREAM_TYPE_MPG) |
935 | cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, args: 2, s->handle, 1); |
936 | else |
937 | cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, args: 1, s->handle); |
938 | clear_bit(CX18_F_S_STREAMING, addr: &s->s_flags); |
939 | /* FIXME - CX18_F_S_STREAMOFF as well? */ |
940 | cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, args: 1, s->handle); |
941 | cx18_vapi(cx, CX18_DESTROY_TASK, args: 1, s->handle); |
942 | s->handle = CX18_INVALID_TASK_HANDLE; |
943 | clear_bit(CX18_F_S_STOPPING, addr: &s->s_flags); |
944 | if (atomic_read(v: &cx->tot_capturing) == 0) { |
945 | set_bit(CX18_F_I_EOS, addr: &cx->i_flags); |
946 | cx18_write_reg(cx, val: 5, CX18_DSP0_INTERRUPT_MASK); |
947 | } |
948 | return -EINVAL; |
949 | } |
950 | |
951 | /* you're live! sit back and await interrupts :) */ |
952 | if (captype != CAPTURE_CHANNEL_TYPE_TS) |
953 | atomic_inc(v: &cx->ana_capturing); |
954 | atomic_inc(v: &cx->tot_capturing); |
955 | return 0; |
956 | } |
957 | EXPORT_SYMBOL(cx18_start_v4l2_encode_stream); |
958 | |
959 | void cx18_stop_all_captures(struct cx18 *cx) |
960 | { |
961 | int i; |
962 | |
963 | for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) { |
964 | struct cx18_stream *s = &cx->streams[i]; |
965 | |
966 | if (!cx18_stream_enabled(s)) |
967 | continue; |
968 | if (test_bit(CX18_F_S_STREAMING, &s->s_flags)) |
969 | cx18_stop_v4l2_encode_stream(s, gop_end: 0); |
970 | } |
971 | } |
972 | |
973 | int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end) |
974 | { |
975 | struct cx18 *cx = s->cx; |
976 | |
977 | if (!cx18_stream_enabled(s)) |
978 | return -EINVAL; |
979 | |
980 | /* This function assumes that you are allowed to stop the capture |
981 | and that we are actually capturing */ |
982 | |
983 | CX18_DEBUG_INFO("Stop Capture\n" ); |
984 | |
985 | if (atomic_read(v: &cx->tot_capturing) == 0) |
986 | return 0; |
987 | |
988 | set_bit(CX18_F_S_STOPPING, addr: &s->s_flags); |
989 | if (s->type == CX18_ENC_STREAM_TYPE_MPG) |
990 | cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, args: 2, s->handle, !gop_end); |
991 | else |
992 | cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, args: 1, s->handle); |
993 | |
994 | if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) { |
995 | CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n" ); |
996 | } |
997 | |
998 | if (s->type != CX18_ENC_STREAM_TYPE_TS) |
999 | atomic_dec(v: &cx->ana_capturing); |
1000 | atomic_dec(v: &cx->tot_capturing); |
1001 | |
1002 | /* Clear capture and no-read bits */ |
1003 | clear_bit(CX18_F_S_STREAMING, addr: &s->s_flags); |
1004 | |
1005 | /* Tell the CX23418 it can't use our buffers anymore */ |
1006 | cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, args: 1, s->handle); |
1007 | |
1008 | cx18_vapi(cx, CX18_DESTROY_TASK, args: 1, s->handle); |
1009 | s->handle = CX18_INVALID_TASK_HANDLE; |
1010 | clear_bit(CX18_F_S_STOPPING, addr: &s->s_flags); |
1011 | |
1012 | if (atomic_read(v: &cx->tot_capturing) > 0) |
1013 | return 0; |
1014 | |
1015 | cx2341x_handler_set_busy(cxhdl: &cx->cxhdl, busy: 0); |
1016 | cx18_write_reg(cx, val: 5, CX18_DSP0_INTERRUPT_MASK); |
1017 | wake_up(&s->waitq); |
1018 | |
1019 | return 0; |
1020 | } |
1021 | EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream); |
1022 | |
1023 | u32 cx18_find_handle(struct cx18 *cx) |
1024 | { |
1025 | int i; |
1026 | |
1027 | /* find first available handle to be used for global settings */ |
1028 | for (i = 0; i < CX18_MAX_STREAMS; i++) { |
1029 | struct cx18_stream *s = &cx->streams[i]; |
1030 | |
1031 | if (s->video_dev.v4l2_dev && (s->handle != CX18_INVALID_TASK_HANDLE)) |
1032 | return s->handle; |
1033 | } |
1034 | return CX18_INVALID_TASK_HANDLE; |
1035 | } |
1036 | |
1037 | struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle) |
1038 | { |
1039 | int i; |
1040 | struct cx18_stream *s; |
1041 | |
1042 | if (handle == CX18_INVALID_TASK_HANDLE) |
1043 | return NULL; |
1044 | |
1045 | for (i = 0; i < CX18_MAX_STREAMS; i++) { |
1046 | s = &cx->streams[i]; |
1047 | if (s->handle != handle) |
1048 | continue; |
1049 | if (cx18_stream_enabled(s)) |
1050 | return s; |
1051 | } |
1052 | return NULL; |
1053 | } |
1054 | |