1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
2 | /* |
3 | * Afatech AF9035 DVB USB driver |
4 | * |
5 | * Copyright (C) 2009 Antti Palosaari <crope@iki.fi> |
6 | * Copyright (C) 2012 Antti Palosaari <crope@iki.fi> |
7 | */ |
8 | |
9 | #ifndef AF9035_H |
10 | #define AF9035_H |
11 | |
12 | #include <linux/platform_device.h> |
13 | #include "dvb_usb.h" |
14 | #include "af9033.h" |
15 | #include "tua9001.h" |
16 | #include "fc0011.h" |
17 | #include "fc0012.h" |
18 | #include "mxl5007t.h" |
19 | #include "tda18218.h" |
20 | #include "fc2580.h" |
21 | #include "it913x.h" |
22 | #include "si2168.h" |
23 | #include "si2157.h" |
24 | |
25 | struct reg_val { |
26 | u32 reg; |
27 | u8 val; |
28 | }; |
29 | |
30 | struct reg_val_mask { |
31 | u32 reg; |
32 | u8 val; |
33 | u8 mask; |
34 | }; |
35 | |
36 | struct usb_req { |
37 | u8 cmd; |
38 | u8 mbox; |
39 | u8 wlen; |
40 | u8 *wbuf; |
41 | u8 rlen; |
42 | u8 *rbuf; |
43 | }; |
44 | |
45 | struct state { |
46 | #define BUF_LEN 64 |
47 | u8 buf[BUF_LEN]; |
48 | u8 seq; /* packet sequence number */ |
49 | u8 prechip_version; |
50 | u8 chip_version; |
51 | u16 chip_type; |
52 | u8 eeprom[256]; |
53 | bool no_eeprom; |
54 | u8 ir_mode; |
55 | u8 ir_type; |
56 | u8 dual_mode:1; |
57 | u8 no_read:1; |
58 | u8 af9033_i2c_addr[2]; |
59 | u8 it930x_addresses; |
60 | struct af9033_config af9033_config[2]; |
61 | struct af9033_ops ops; |
62 | #define AF9035_I2C_CLIENT_MAX 4 |
63 | struct i2c_client *i2c_client[AF9035_I2C_CLIENT_MAX]; |
64 | struct i2c_adapter *i2c_adapter_demod; |
65 | struct platform_device *platform_device_tuner[2]; |
66 | }; |
67 | |
68 | struct address_table { |
69 | u8 frontend_i2c_addr; |
70 | u8 tuner_i2c_addr; |
71 | u8 tuner_if_port; |
72 | }; |
73 | |
74 | static const struct address_table it930x_addresses_table[] = { |
75 | { 0x67, 0x63, 1 }, |
76 | { 0x64, 0x60, 0 }, |
77 | }; |
78 | |
79 | static const u32 clock_lut_af9035[] = { |
80 | 20480000, /* FPGA */ |
81 | 16384000, /* 16.38 MHz */ |
82 | 20480000, /* 20.48 MHz */ |
83 | 36000000, /* 36.00 MHz */ |
84 | 30000000, /* 30.00 MHz */ |
85 | 26000000, /* 26.00 MHz */ |
86 | 28000000, /* 28.00 MHz */ |
87 | 32000000, /* 32.00 MHz */ |
88 | 34000000, /* 34.00 MHz */ |
89 | 24000000, /* 24.00 MHz */ |
90 | 22000000, /* 22.00 MHz */ |
91 | 12000000, /* 12.00 MHz */ |
92 | }; |
93 | |
94 | static const u32 clock_lut_it9135[] = { |
95 | 12000000, /* 12.00 MHz */ |
96 | 20480000, /* 20.48 MHz */ |
97 | 36000000, /* 36.00 MHz */ |
98 | 30000000, /* 30.00 MHz */ |
99 | 26000000, /* 26.00 MHz */ |
100 | 28000000, /* 28.00 MHz */ |
101 | 32000000, /* 32.00 MHz */ |
102 | 34000000, /* 34.00 MHz */ |
103 | 24000000, /* 24.00 MHz */ |
104 | 22000000, /* 22.00 MHz */ |
105 | }; |
106 | |
107 | #define AF9035_FIRMWARE_AF9035 "dvb-usb-af9035-02.fw" |
108 | #define AF9035_FIRMWARE_IT9135_V1 "dvb-usb-it9135-01.fw" |
109 | #define AF9035_FIRMWARE_IT9135_V2 "dvb-usb-it9135-02.fw" |
110 | #define AF9035_FIRMWARE_IT9303 "dvb-usb-it9303-01.fw" |
111 | |
112 | /* |
113 | * eeprom is memory mapped as read only. Writing that memory mapped address |
114 | * will not corrupt eeprom. |
115 | * |
116 | * TS mode: |
117 | * 0 TS |
118 | * 1 DCA + PIP |
119 | * 3 PIP |
120 | * 5 DCA + PIP (AF9035 only) |
121 | * n DCA |
122 | * |
123 | * Values 0, 3 and 5 are seen to this day. 0 for single TS and 3/5 for dual TS. |
124 | */ |
125 | |
126 | #define EEPROM_BASE_AF9035 0x42f5 |
127 | #define EEPROM_BASE_IT9135 0x4994 |
128 | #define EEPROM_SHIFT 0x10 |
129 | |
130 | #define EEPROM_IR_MODE 0x18 |
131 | #define EEPROM_TS_MODE 0x31 |
132 | #define EEPROM_2ND_DEMOD_ADDR 0x32 |
133 | #define EEPROM_IR_TYPE 0x34 |
134 | #define EEPROM_1_IF_L 0x38 |
135 | #define EEPROM_1_IF_H 0x39 |
136 | #define EEPROM_1_TUNER_ID 0x3c |
137 | #define EEPROM_2_IF_L 0x48 |
138 | #define EEPROM_2_IF_H 0x49 |
139 | #define EEPROM_2_TUNER_ID 0x4c |
140 | |
141 | /* USB commands */ |
142 | #define CMD_MEM_RD 0x00 |
143 | #define CMD_MEM_WR 0x01 |
144 | #define CMD_I2C_RD 0x02 |
145 | #define CMD_I2C_WR 0x03 |
146 | #define CMD_IR_GET 0x18 |
147 | #define CMD_FW_DL 0x21 |
148 | #define CMD_FW_QUERYINFO 0x22 |
149 | #define CMD_FW_BOOT 0x23 |
150 | #define CMD_FW_DL_BEGIN 0x24 |
151 | #define CMD_FW_DL_END 0x25 |
152 | #define CMD_FW_SCATTER_WR 0x29 |
153 | #define CMD_GENERIC_I2C_RD 0x2a |
154 | #define CMD_GENERIC_I2C_WR 0x2b |
155 | |
156 | #endif |
157 | |