| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
|---|
| 2 | /* |
|---|
| 3 | * Copyright (c) 2015-2020, NVIDIA CORPORATION. All rights reserved. |
|---|
| 4 | */ |
|---|
| 5 | |
|---|
| 6 | #ifndef TEGRA210_MC_H |
|---|
| 7 | #define TEGRA210_MC_H |
|---|
| 8 | |
|---|
| 9 | #include "mc.h" |
|---|
| 10 | |
|---|
| 11 | /* register definitions */ |
|---|
| 12 | #define MC_LATENCY_ALLOWANCE_AVPC_0 0x2e4 |
|---|
| 13 | #define MC_LATENCY_ALLOWANCE_HC_0 0x310 |
|---|
| 14 | #define MC_LATENCY_ALLOWANCE_HC_1 0x314 |
|---|
| 15 | #define MC_LATENCY_ALLOWANCE_MPCORE_0 0x320 |
|---|
| 16 | #define MC_LATENCY_ALLOWANCE_NVENC_0 0x328 |
|---|
| 17 | #define MC_LATENCY_ALLOWANCE_PPCS_0 0x344 |
|---|
| 18 | #define MC_LATENCY_ALLOWANCE_PPCS_1 0x348 |
|---|
| 19 | #define MC_LATENCY_ALLOWANCE_ISP2_0 0x370 |
|---|
| 20 | #define MC_LATENCY_ALLOWANCE_ISP2_1 0x374 |
|---|
| 21 | #define MC_LATENCY_ALLOWANCE_XUSB_0 0x37c |
|---|
| 22 | #define MC_LATENCY_ALLOWANCE_XUSB_1 0x380 |
|---|
| 23 | #define MC_LATENCY_ALLOWANCE_TSEC_0 0x390 |
|---|
| 24 | #define MC_LATENCY_ALLOWANCE_VIC_0 0x394 |
|---|
| 25 | #define MC_LATENCY_ALLOWANCE_VI2_0 0x398 |
|---|
| 26 | #define MC_LATENCY_ALLOWANCE_GPU_0 0x3ac |
|---|
| 27 | #define MC_LATENCY_ALLOWANCE_SDMMCA_0 0x3b8 |
|---|
| 28 | #define MC_LATENCY_ALLOWANCE_SDMMCAA_0 0x3bc |
|---|
| 29 | #define MC_LATENCY_ALLOWANCE_SDMMC_0 0x3c0 |
|---|
| 30 | #define MC_LATENCY_ALLOWANCE_SDMMCAB_0 0x3c4 |
|---|
| 31 | #define MC_LATENCY_ALLOWANCE_GPU2_0 0x3e8 |
|---|
| 32 | #define MC_LATENCY_ALLOWANCE_NVDEC_0 0x3d8 |
|---|
| 33 | #define MC_MLL_MPCORER_PTSA_RATE 0x44c |
|---|
| 34 | #define MC_FTOP_PTSA_RATE 0x50c |
|---|
| 35 | #define MC_EMEM_ARB_TIMING_RFCPB 0x6c0 |
|---|
| 36 | #define MC_EMEM_ARB_TIMING_CCDMW 0x6c4 |
|---|
| 37 | #define MC_EMEM_ARB_REFPB_HP_CTRL 0x6f0 |
|---|
| 38 | #define MC_EMEM_ARB_REFPB_BANK_CTRL 0x6f4 |
|---|
| 39 | #define MC_PTSA_GRANT_DECREMENT 0x960 |
|---|
| 40 | #define MC_EMEM_ARB_DHYST_CTRL 0xbcc |
|---|
| 41 | #define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_0 0xbd0 |
|---|
| 42 | #define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_1 0xbd4 |
|---|
| 43 | #define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_2 0xbd8 |
|---|
| 44 | #define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_3 0xbdc |
|---|
| 45 | #define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_4 0xbe0 |
|---|
| 46 | #define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_5 0xbe4 |
|---|
| 47 | #define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_6 0xbe8 |
|---|
| 48 | #define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_7 0xbec |
|---|
| 49 | |
|---|
| 50 | #endif |
|---|
| 51 | |
|---|
