1/* SPDX-License-Identifier: GPL-2.0+ */
2/* Microchip Sparx5 Switch driver VCAP implementation
3 *
4 * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
5 *
6 * The Sparx5 Chip Register Model can be browsed at this location:
7 * https://github.com/microchip-ung/sparx-5_reginfo
8 */
9
10#ifndef __SPARX5_VCAP_IMPL_H__
11#define __SPARX5_VCAP_IMPL_H__
12
13#include <linux/types.h>
14#include <linux/list.h>
15
16#include "vcap_api.h"
17#include "vcap_api_client.h"
18
19#define SPARX5_VCAP_CID_IS0_L0 VCAP_CID_INGRESS_L0 /* IS0/CLM lookup 0 */
20#define SPARX5_VCAP_CID_IS0_L1 VCAP_CID_INGRESS_L1 /* IS0/CLM lookup 1 */
21#define SPARX5_VCAP_CID_IS0_L2 VCAP_CID_INGRESS_L2 /* IS0/CLM lookup 2 */
22#define SPARX5_VCAP_CID_IS0_L3 VCAP_CID_INGRESS_L3 /* IS0/CLM lookup 3 */
23#define SPARX5_VCAP_CID_IS0_L4 VCAP_CID_INGRESS_L4 /* IS0/CLM lookup 4 */
24#define SPARX5_VCAP_CID_IS0_L5 VCAP_CID_INGRESS_L5 /* IS0/CLM lookup 5 */
25#define SPARX5_VCAP_CID_IS0_MAX \
26 (VCAP_CID_INGRESS_L5 + VCAP_CID_LOOKUP_SIZE - 1) /* IS0/CLM Max */
27
28#define SPARX5_VCAP_CID_IS2_L0 VCAP_CID_INGRESS_STAGE2_L0 /* IS2 lookup 0 */
29#define SPARX5_VCAP_CID_IS2_L1 VCAP_CID_INGRESS_STAGE2_L1 /* IS2 lookup 1 */
30#define SPARX5_VCAP_CID_IS2_L2 VCAP_CID_INGRESS_STAGE2_L2 /* IS2 lookup 2 */
31#define SPARX5_VCAP_CID_IS2_L3 VCAP_CID_INGRESS_STAGE2_L3 /* IS2 lookup 3 */
32#define SPARX5_VCAP_CID_IS2_MAX \
33 (VCAP_CID_INGRESS_STAGE2_L3 + VCAP_CID_LOOKUP_SIZE - 1) /* IS2 Max */
34
35#define SPARX5_VCAP_CID_ES0_L0 VCAP_CID_EGRESS_L0 /* ES0 lookup 0 */
36#define SPARX5_VCAP_CID_ES0_MAX (VCAP_CID_EGRESS_L1 - 1) /* ES0 Max */
37
38#define SPARX5_VCAP_CID_ES2_L0 VCAP_CID_EGRESS_STAGE2_L0 /* ES2 lookup 0 */
39#define SPARX5_VCAP_CID_ES2_L1 VCAP_CID_EGRESS_STAGE2_L1 /* ES2 lookup 1 */
40#define SPARX5_VCAP_CID_ES2_MAX \
41 (VCAP_CID_EGRESS_STAGE2_L1 + VCAP_CID_LOOKUP_SIZE - 1) /* ES2 Max */
42
43/* IS0 port keyset selection control */
44
45/* IS0 ethernet, IPv4, IPv6 traffic type keyset generation */
46enum vcap_is0_port_sel_etype {
47 VCAP_IS0_PS_ETYPE_DEFAULT, /* None or follow depending on class */
48 VCAP_IS0_PS_ETYPE_MLL,
49 VCAP_IS0_PS_ETYPE_SGL_MLBS,
50 VCAP_IS0_PS_ETYPE_DBL_MLBS,
51 VCAP_IS0_PS_ETYPE_TRI_MLBS,
52 VCAP_IS0_PS_ETYPE_TRI_VID,
53 VCAP_IS0_PS_ETYPE_LL_FULL,
54 VCAP_IS0_PS_ETYPE_NORMAL_SRC,
55 VCAP_IS0_PS_ETYPE_NORMAL_DST,
56 VCAP_IS0_PS_ETYPE_NORMAL_7TUPLE,
57 VCAP_IS0_PS_ETYPE_NORMAL_5TUPLE_IP4,
58 VCAP_IS0_PS_ETYPE_PURE_5TUPLE_IP4,
59 VCAP_IS0_PS_ETYPE_DBL_VID_IDX,
60 VCAP_IS0_PS_ETYPE_ETAG,
61 VCAP_IS0_PS_ETYPE_NO_LOOKUP,
62};
63
64/* IS0 MPLS traffic type keyset generation */
65enum vcap_is0_port_sel_mpls_uc_mc {
66 VCAP_IS0_PS_MPLS_FOLLOW_ETYPE,
67 VCAP_IS0_PS_MPLS_MLL,
68 VCAP_IS0_PS_MPLS_SGL_MLBS,
69 VCAP_IS0_PS_MPLS_DBL_MLBS,
70 VCAP_IS0_PS_MPLS_TRI_MLBS,
71 VCAP_IS0_PS_MPLS_TRI_VID,
72 VCAP_IS0_PS_MPLS_LL_FULL,
73 VCAP_IS0_PS_MPLS_NORMAL_SRC,
74 VCAP_IS0_PS_MPLS_NORMAL_DST,
75 VCAP_IS0_PS_MPLS_NORMAL_7TUPLE,
76 VCAP_IS0_PS_MPLS_NORMAL_5TUPLE_IP4,
77 VCAP_IS0_PS_MPLS_PURE_5TUPLE_IP4,
78 VCAP_IS0_PS_MPLS_DBL_VID_IDX,
79 VCAP_IS0_PS_MPLS_ETAG,
80 VCAP_IS0_PS_MPLS_NO_LOOKUP,
81};
82
83/* IS0 MBLS traffic type keyset generation */
84enum vcap_is0_port_sel_mlbs {
85 VCAP_IS0_PS_MLBS_FOLLOW_ETYPE,
86 VCAP_IS0_PS_MLBS_SGL_MLBS,
87 VCAP_IS0_PS_MLBS_DBL_MLBS,
88 VCAP_IS0_PS_MLBS_TRI_MLBS,
89 VCAP_IS0_PS_MLBS_NO_LOOKUP = 17,
90};
91
92/* IS2 port keyset selection control */
93
94/* IS2 non-ethernet traffic type keyset generation */
95enum vcap_is2_port_sel_noneth {
96 VCAP_IS2_PS_NONETH_MAC_ETYPE,
97 VCAP_IS2_PS_NONETH_CUSTOM_1,
98 VCAP_IS2_PS_NONETH_CUSTOM_2,
99 VCAP_IS2_PS_NONETH_NO_LOOKUP
100};
101
102/* IS2 IPv4 unicast traffic type keyset generation */
103enum vcap_is2_port_sel_ipv4_uc {
104 VCAP_IS2_PS_IPV4_UC_MAC_ETYPE,
105 VCAP_IS2_PS_IPV4_UC_IP4_TCP_UDP_OTHER,
106 VCAP_IS2_PS_IPV4_UC_IP_7TUPLE,
107};
108
109/* IS2 IPv4 multicast traffic type keyset generation */
110enum vcap_is2_port_sel_ipv4_mc {
111 VCAP_IS2_PS_IPV4_MC_MAC_ETYPE,
112 VCAP_IS2_PS_IPV4_MC_IP4_TCP_UDP_OTHER,
113 VCAP_IS2_PS_IPV4_MC_IP_7TUPLE,
114 VCAP_IS2_PS_IPV4_MC_IP4_VID,
115};
116
117/* IS2 IPv6 unicast traffic type keyset generation */
118enum vcap_is2_port_sel_ipv6_uc {
119 VCAP_IS2_PS_IPV6_UC_MAC_ETYPE,
120 VCAP_IS2_PS_IPV6_UC_IP_7TUPLE,
121 VCAP_IS2_PS_IPV6_UC_IP6_STD,
122 VCAP_IS2_PS_IPV6_UC_IP4_TCP_UDP_OTHER,
123};
124
125/* IS2 IPv6 multicast traffic type keyset generation */
126enum vcap_is2_port_sel_ipv6_mc {
127 VCAP_IS2_PS_IPV6_MC_MAC_ETYPE,
128 VCAP_IS2_PS_IPV6_MC_IP_7TUPLE,
129 VCAP_IS2_PS_IPV6_MC_IP6_VID,
130 VCAP_IS2_PS_IPV6_MC_IP6_STD,
131 VCAP_IS2_PS_IPV6_MC_IP4_TCP_UDP_OTHER,
132};
133
134/* IS2 ARP traffic type keyset generation */
135enum vcap_is2_port_sel_arp {
136 VCAP_IS2_PS_ARP_MAC_ETYPE,
137 VCAP_IS2_PS_ARP_ARP,
138};
139
140/* ES0 port keyset selection control */
141
142/* ES0 Egress port traffic type classification */
143enum vcap_es0_port_sel {
144 VCAP_ES0_PS_NORMAL_SELECTION,
145 VCAP_ES0_PS_FORCE_ISDX_LOOKUPS,
146 VCAP_ES0_PS_FORCE_VID_LOOKUPS,
147 VCAP_ES0_PS_RESERVED,
148};
149
150/* ES2 port keyset selection control */
151
152/* ES2 IPv4 traffic type keyset generation */
153enum vcap_es2_port_sel_ipv4 {
154 VCAP_ES2_PS_IPV4_MAC_ETYPE,
155 VCAP_ES2_PS_IPV4_IP_7TUPLE,
156 VCAP_ES2_PS_IPV4_IP4_TCP_UDP_VID,
157 VCAP_ES2_PS_IPV4_IP4_TCP_UDP_OTHER,
158 VCAP_ES2_PS_IPV4_IP4_VID,
159 VCAP_ES2_PS_IPV4_IP4_OTHER,
160};
161
162/* ES2 IPv6 traffic type keyset generation */
163enum vcap_es2_port_sel_ipv6 {
164 VCAP_ES2_PS_IPV6_MAC_ETYPE,
165 VCAP_ES2_PS_IPV6_IP_7TUPLE,
166 VCAP_ES2_PS_IPV6_IP_7TUPLE_VID,
167 VCAP_ES2_PS_IPV6_IP_7TUPLE_STD,
168 VCAP_ES2_PS_IPV6_IP6_VID,
169 VCAP_ES2_PS_IPV6_IP6_STD,
170 VCAP_ES2_PS_IPV6_IP4_DOWNGRADE,
171};
172
173/* ES2 ARP traffic type keyset generation */
174enum vcap_es2_port_sel_arp {
175 VCAP_ES2_PS_ARP_MAC_ETYPE,
176 VCAP_ES2_PS_ARP_ARP,
177};
178
179/* Selects TPID for ES0 matching */
180enum SPX5_TPID_SEL {
181 SPX5_TPID_SEL_UNTAGGED,
182 SPX5_TPID_SEL_8100,
183 SPX5_TPID_SEL_UNUSED_0,
184 SPX5_TPID_SEL_UNUSED_1,
185 SPX5_TPID_SEL_88A8,
186 SPX5_TPID_SEL_TPIDCFG_1,
187 SPX5_TPID_SEL_TPIDCFG_2,
188 SPX5_TPID_SEL_TPIDCFG_3,
189};
190
191/* Get the port keyset for the vcap lookup */
192int sparx5_vcap_get_port_keyset(struct net_device *ndev,
193 struct vcap_admin *admin,
194 int cid,
195 u16 l3_proto,
196 struct vcap_keyset_list *kslist);
197
198/* Change the port keyset for the lookup and protocol */
199void sparx5_vcap_set_port_keyset(struct net_device *ndev,
200 struct vcap_admin *admin, int cid,
201 u16 l3_proto, enum vcap_keyfield_set keyset,
202 struct vcap_keyset_list *orig);
203
204/* Check if the ethertype is supported by the vcap port classification */
205bool sparx5_vcap_is_known_etype(struct vcap_admin *admin, u16 etype);
206
207#endif /* __SPARX5_VCAP_IMPL_H__ */
208

source code of linux/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.h