1/* SPDX-License-Identifier: GPL-2.0-only */
2/******************************************************************************
3 PTP Header file
4
5 Copyright (C) 2013 Vayavya Labs Pvt Ltd
6
7
8 Author: Rayagond Kokatanur <rayagond@vayavyalabs.com>
9******************************************************************************/
10
11#ifndef __STMMAC_PTP_H__
12#define __STMMAC_PTP_H__
13
14#define PTP_XGMAC_OFFSET 0xd00
15#define PTP_GMAC4_OFFSET 0xb00
16#define PTP_GMAC3_X_OFFSET 0x700
17
18/* IEEE 1588 PTP register offsets */
19#define PTP_TCR 0x00 /* Timestamp Control Reg */
20#define PTP_SSIR 0x04 /* Sub-Second Increment Reg */
21#define PTP_STSR 0x08 /* System Time – Seconds Regr */
22#define PTP_STNSR 0x0c /* System Time – Nanoseconds Reg */
23#define PTP_STSUR 0x10 /* System Time – Seconds Update Reg */
24#define PTP_STNSUR 0x14 /* System Time – Nanoseconds Update Reg */
25#define PTP_TAR 0x18 /* Timestamp Addend Reg */
26#define PTP_ACR 0x40 /* Auxiliary Control Reg */
27#define PTP_ATNR 0x48 /* Auxiliary Timestamp - Nanoseconds Reg */
28#define PTP_ATSR 0x4c /* Auxiliary Timestamp - Seconds Reg */
29#define PTP_TS_INGR_CORR_NS 0x58 /* Ingress timestamp correction nanoseconds */
30#define PTP_TS_EGR_CORR_NS 0x5C /* Egress timestamp correction nanoseconds*/
31#define PTP_TS_INGR_CORR_SNS 0x60 /* Ingress timestamp correction subnanoseconds */
32#define PTP_TS_EGR_CORR_SNS 0x64 /* Egress timestamp correction subnanoseconds */
33#define PTP_TS_INGR_LAT 0x68 /* MAC internal Ingress Latency */
34#define PTP_TS_EGR_LAT 0x6c /* MAC internal Egress Latency */
35
36#define PTP_STNSUR_ADDSUB_SHIFT 31
37#define PTP_DIGITAL_ROLLOVER_MODE 0x3B9ACA00 /* 10e9-1 ns */
38#define PTP_BINARY_ROLLOVER_MODE 0x80000000 /* ~0.466 ns */
39
40/* PTP Timestamp control register defines */
41#define PTP_TCR_TSENA BIT(0) /* Timestamp Enable */
42#define PTP_TCR_TSCFUPDT BIT(1) /* Timestamp Fine/Coarse Update */
43#define PTP_TCR_TSINIT BIT(2) /* Timestamp Initialize */
44#define PTP_TCR_TSUPDT BIT(3) /* Timestamp Update */
45#define PTP_TCR_TSTRIG BIT(4) /* Timestamp Interrupt Trigger Enable */
46#define PTP_TCR_TSADDREG BIT(5) /* Addend Reg Update */
47#define PTP_TCR_TSENALL BIT(8) /* Enable Timestamp for All Frames */
48#define PTP_TCR_TSCTRLSSR BIT(9) /* Digital or Binary Rollover Control */
49/* Enable PTP packet Processing for Version 2 Format */
50#define PTP_TCR_TSVER2ENA BIT(10)
51/* Enable Processing of PTP over Ethernet Frames */
52#define PTP_TCR_TSIPENA BIT(11)
53/* Enable Processing of PTP Frames Sent over IPv6-UDP */
54#define PTP_TCR_TSIPV6ENA BIT(12)
55/* Enable Processing of PTP Frames Sent over IPv4-UDP */
56#define PTP_TCR_TSIPV4ENA BIT(13)
57/* Enable Timestamp Snapshot for Event Messages */
58#define PTP_TCR_TSEVNTENA BIT(14)
59/* Enable Snapshot for Messages Relevant to Master */
60#define PTP_TCR_TSMSTRENA BIT(15)
61/* Select PTP packets for Taking Snapshots
62 * On gmac4 specifically:
63 * Enable SYNC, Pdelay_Req, Pdelay_Resp when TSEVNTENA is enabled.
64 * or
65 * Enable SYNC, Follow_Up, Delay_Req, Delay_Resp, Pdelay_Req, Pdelay_Resp,
66 * Pdelay_Resp_Follow_Up if TSEVNTENA is disabled
67 */
68#define PTP_TCR_SNAPTYPSEL_1 BIT(16)
69/* Enable MAC address for PTP Frame Filtering */
70#define PTP_TCR_TSENMACADDR BIT(18)
71
72/* SSIR defines */
73#define PTP_SSIR_SSINC_MAX 0xff
74#define GMAC4_PTP_SSIR_SSINC_SHIFT 16
75
76/* Auxiliary Control defines */
77#define PTP_ACR_ATSFC BIT(0) /* Auxiliary Snapshot FIFO Clear */
78#define PTP_ACR_ATSEN0 BIT(4) /* Auxiliary Snapshot 0 Enable */
79#define PTP_ACR_ATSEN1 BIT(5) /* Auxiliary Snapshot 1 Enable */
80#define PTP_ACR_ATSEN2 BIT(6) /* Auxiliary Snapshot 2 Enable */
81#define PTP_ACR_ATSEN3 BIT(7) /* Auxiliary Snapshot 3 Enable */
82#define PTP_ACR_ATSEN(index) (PTP_ACR_ATSEN0 << (index))
83#define PTP_ACR_MASK GENMASK(7, 4) /* Aux Snapshot Mask */
84#define PMC_ART_VALUE0 0x01 /* PMC_ART[15:0] timer value */
85#define PMC_ART_VALUE1 0x02 /* PMC_ART[31:16] timer value */
86#define PMC_ART_VALUE2 0x03 /* PMC_ART[47:32] timer value */
87#define PMC_ART_VALUE3 0x04 /* PMC_ART[63:48] timer value */
88#define GMAC4_ART_TIME_SHIFT 16 /* ART TIME 16-bits shift */
89
90enum aux_snapshot {
91 AUX_SNAPSHOT0 = 0x10,
92 AUX_SNAPSHOT1 = 0x20,
93 AUX_SNAPSHOT2 = 0x40,
94 AUX_SNAPSHOT3 = 0x80,
95};
96
97struct ptp_clock_info;
98struct ptp_clock_request;
99struct stmmac_priv;
100
101int dwmac1000_ptp_enable(struct ptp_clock_info *ptp,
102 struct ptp_clock_request *rq, int on);
103
104void dwmac1000_get_ptptime(void __iomem *ptpaddr, u64 *ptp_time);
105void dwmac1000_timestamp_interrupt(struct stmmac_priv *priv);
106
107extern const struct ptp_clock_info stmmac_ptp_clock_ops;
108extern const struct ptp_clock_info dwmac1000_ptp_clock_ops;
109
110#endif /* __STMMAC_PTP_H__ */
111

source code of linux/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h