| 1 | // SPDX-License-Identifier: GPL-2.0 |
|---|---|
| 2 | /* |
| 3 | * Intel MID platform PM support |
| 4 | * |
| 5 | * Copyright (C) 2016, Intel Corporation |
| 6 | * |
| 7 | * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
| 8 | */ |
| 9 | |
| 10 | #include <linux/init.h> |
| 11 | #include <linux/pci.h> |
| 12 | |
| 13 | #include <asm/cpu_device_id.h> |
| 14 | #include <asm/intel-family.h> |
| 15 | #include <asm/intel-mid.h> |
| 16 | |
| 17 | #include "pci.h" |
| 18 | |
| 19 | static bool pci_mid_pm_enabled __read_mostly; |
| 20 | |
| 21 | bool pci_use_mid_pm(void) |
| 22 | { |
| 23 | return pci_mid_pm_enabled; |
| 24 | } |
| 25 | |
| 26 | int mid_pci_set_power_state(struct pci_dev *pdev, pci_power_t state) |
| 27 | { |
| 28 | return intel_mid_pci_set_power_state(pdev, state); |
| 29 | } |
| 30 | |
| 31 | pci_power_t mid_pci_get_power_state(struct pci_dev *pdev) |
| 32 | { |
| 33 | return intel_mid_pci_get_power_state(pdev); |
| 34 | } |
| 35 | |
| 36 | /* |
| 37 | * This table should be in sync with the one in |
| 38 | * arch/x86/platform/intel-mid/pwr.c. |
| 39 | */ |
| 40 | static const struct x86_cpu_id lpss_cpu_ids[] = { |
| 41 | X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, NULL), |
| 42 | X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, NULL), |
| 43 | {} |
| 44 | }; |
| 45 | |
| 46 | static int __init mid_pci_init(void) |
| 47 | { |
| 48 | const struct x86_cpu_id *id; |
| 49 | |
| 50 | id = x86_match_cpu(match: lpss_cpu_ids); |
| 51 | if (id) |
| 52 | pci_mid_pm_enabled = true; |
| 53 | |
| 54 | return 0; |
| 55 | } |
| 56 | arch_initcall(mid_pci_init); |
| 57 |