| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * Copyright (c) 2017, The Linux Foundation. All rights reserved. |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef QCOM_PHY_QMP_COMMON_H_ |
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| 7 | #define QCOM_PHY_QMP_COMMON_H_ |
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| 8 | |
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| 9 | struct qmp_phy_init_tbl { |
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| 10 | unsigned int offset; |
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| 11 | unsigned int val; |
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| 12 | /* |
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| 13 | * mask of lanes for which this register is written |
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| 14 | * for cases when second lane needs different values |
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| 15 | */ |
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| 16 | u8 lane_mask; |
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| 17 | }; |
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| 18 | |
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| 19 | #define QMP_PHY_INIT_CFG(o, v) \ |
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| 20 | { \ |
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| 21 | .offset = o, \ |
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| 22 | .val = v, \ |
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| 23 | .lane_mask = 0xff, \ |
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| 24 | } |
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| 25 | |
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| 26 | #define QMP_PHY_INIT_CFG_LANE(o, v, l) \ |
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| 27 | { \ |
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| 28 | .offset = o, \ |
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| 29 | .val = v, \ |
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| 30 | .lane_mask = l, \ |
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| 31 | } |
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| 32 | |
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| 33 | static inline void qmp_configure_lane(void __iomem *base, |
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| 34 | const struct qmp_phy_init_tbl tbl[], |
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| 35 | int num, |
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| 36 | u8 lane_mask) |
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| 37 | { |
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| 38 | int i; |
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| 39 | const struct qmp_phy_init_tbl *t = tbl; |
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| 40 | |
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| 41 | if (!t) |
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| 42 | return; |
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| 43 | |
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| 44 | for (i = 0; i < num; i++, t++) { |
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| 45 | if (!(t->lane_mask & lane_mask)) |
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| 46 | continue; |
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| 47 | |
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| 48 | writel(val: t->val, addr: base + t->offset); |
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| 49 | } |
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| 50 | } |
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| 51 | |
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| 52 | static inline void qmp_configure(void __iomem *base, |
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| 53 | const struct qmp_phy_init_tbl tbl[], |
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| 54 | int num) |
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| 55 | { |
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| 56 | qmp_configure_lane(base, tbl, num, lane_mask: 0xff); |
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| 57 | } |
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| 58 | |
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| 59 | #endif |
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| 60 | |
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