1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2016-2018,2020 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6
7#include <linux/module.h>
8#include <linux/of.h>
9#include <linux/platform_device.h>
10
11#include "pinctrl-msm.h"
12
13#define REG_SIZE 0x1000
14#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
15 { \
16 .grp = PINCTRL_PINGROUP("gpio" #id, \
17 gpio##id##_pins, \
18 ARRAY_SIZE(gpio##id##_pins)), \
19 .funcs = (int[]){ \
20 msm_mux_gpio, /* gpio mode */ \
21 msm_mux_##f1, \
22 msm_mux_##f2, \
23 msm_mux_##f3, \
24 msm_mux_##f4, \
25 msm_mux_##f5, \
26 msm_mux_##f6, \
27 msm_mux_##f7, \
28 msm_mux_##f8, \
29 msm_mux_##f9 \
30 }, \
31 .nfuncs = 10, \
32 .ctl_reg = REG_SIZE * id, \
33 .io_reg = 0x4 + REG_SIZE * id, \
34 .intr_cfg_reg = 0x8 + REG_SIZE * id, \
35 .intr_status_reg = 0xc + REG_SIZE * id, \
36 .intr_target_reg = 0x8 + REG_SIZE * id, \
37 .mux_bit = 2, \
38 .pull_bit = 0, \
39 .drv_bit = 6, \
40 .oe_bit = 9, \
41 .in_bit = 0, \
42 .out_bit = 1, \
43 .intr_enable_bit = 0, \
44 .intr_status_bit = 0, \
45 .intr_target_bit = 5, \
46 .intr_target_kpss_val = 3, \
47 .intr_raw_status_bit = 4, \
48 .intr_polarity_bit = 1, \
49 .intr_detection_bit = 2, \
50 .intr_detection_width = 2, \
51 }
52
53static const struct pinctrl_pin_desc ipq5424_pins[] = {
54 PINCTRL_PIN(0, "GPIO_0"),
55 PINCTRL_PIN(1, "GPIO_1"),
56 PINCTRL_PIN(2, "GPIO_2"),
57 PINCTRL_PIN(3, "GPIO_3"),
58 PINCTRL_PIN(4, "GPIO_4"),
59 PINCTRL_PIN(5, "GPIO_5"),
60 PINCTRL_PIN(6, "GPIO_6"),
61 PINCTRL_PIN(7, "GPIO_7"),
62 PINCTRL_PIN(8, "GPIO_8"),
63 PINCTRL_PIN(9, "GPIO_9"),
64 PINCTRL_PIN(10, "GPIO_10"),
65 PINCTRL_PIN(11, "GPIO_11"),
66 PINCTRL_PIN(12, "GPIO_12"),
67 PINCTRL_PIN(13, "GPIO_13"),
68 PINCTRL_PIN(14, "GPIO_14"),
69 PINCTRL_PIN(15, "GPIO_15"),
70 PINCTRL_PIN(16, "GPIO_16"),
71 PINCTRL_PIN(17, "GPIO_17"),
72 PINCTRL_PIN(18, "GPIO_18"),
73 PINCTRL_PIN(19, "GPIO_19"),
74 PINCTRL_PIN(20, "GPIO_20"),
75 PINCTRL_PIN(21, "GPIO_21"),
76 PINCTRL_PIN(22, "GPIO_22"),
77 PINCTRL_PIN(23, "GPIO_23"),
78 PINCTRL_PIN(24, "GPIO_24"),
79 PINCTRL_PIN(25, "GPIO_25"),
80 PINCTRL_PIN(26, "GPIO_26"),
81 PINCTRL_PIN(27, "GPIO_27"),
82 PINCTRL_PIN(28, "GPIO_28"),
83 PINCTRL_PIN(29, "GPIO_29"),
84 PINCTRL_PIN(30, "GPIO_30"),
85 PINCTRL_PIN(31, "GPIO_31"),
86 PINCTRL_PIN(32, "GPIO_32"),
87 PINCTRL_PIN(33, "GPIO_33"),
88 PINCTRL_PIN(34, "GPIO_34"),
89 PINCTRL_PIN(35, "GPIO_35"),
90 PINCTRL_PIN(36, "GPIO_36"),
91 PINCTRL_PIN(37, "GPIO_37"),
92 PINCTRL_PIN(38, "GPIO_38"),
93 PINCTRL_PIN(39, "GPIO_39"),
94 PINCTRL_PIN(40, "GPIO_40"),
95 PINCTRL_PIN(41, "GPIO_41"),
96 PINCTRL_PIN(42, "GPIO_42"),
97 PINCTRL_PIN(43, "GPIO_43"),
98 PINCTRL_PIN(44, "GPIO_44"),
99 PINCTRL_PIN(45, "GPIO_45"),
100 PINCTRL_PIN(46, "GPIO_46"),
101 PINCTRL_PIN(47, "GPIO_47"),
102 PINCTRL_PIN(48, "GPIO_48"),
103 PINCTRL_PIN(49, "GPIO_49"),
104};
105
106#define DECLARE_MSM_GPIO_PINS(pin) \
107 static const unsigned int gpio##pin##_pins[] = { pin }
108DECLARE_MSM_GPIO_PINS(0);
109DECLARE_MSM_GPIO_PINS(1);
110DECLARE_MSM_GPIO_PINS(2);
111DECLARE_MSM_GPIO_PINS(3);
112DECLARE_MSM_GPIO_PINS(4);
113DECLARE_MSM_GPIO_PINS(5);
114DECLARE_MSM_GPIO_PINS(6);
115DECLARE_MSM_GPIO_PINS(7);
116DECLARE_MSM_GPIO_PINS(8);
117DECLARE_MSM_GPIO_PINS(9);
118DECLARE_MSM_GPIO_PINS(10);
119DECLARE_MSM_GPIO_PINS(11);
120DECLARE_MSM_GPIO_PINS(12);
121DECLARE_MSM_GPIO_PINS(13);
122DECLARE_MSM_GPIO_PINS(14);
123DECLARE_MSM_GPIO_PINS(15);
124DECLARE_MSM_GPIO_PINS(16);
125DECLARE_MSM_GPIO_PINS(17);
126DECLARE_MSM_GPIO_PINS(18);
127DECLARE_MSM_GPIO_PINS(19);
128DECLARE_MSM_GPIO_PINS(20);
129DECLARE_MSM_GPIO_PINS(21);
130DECLARE_MSM_GPIO_PINS(22);
131DECLARE_MSM_GPIO_PINS(23);
132DECLARE_MSM_GPIO_PINS(24);
133DECLARE_MSM_GPIO_PINS(25);
134DECLARE_MSM_GPIO_PINS(26);
135DECLARE_MSM_GPIO_PINS(27);
136DECLARE_MSM_GPIO_PINS(28);
137DECLARE_MSM_GPIO_PINS(29);
138DECLARE_MSM_GPIO_PINS(30);
139DECLARE_MSM_GPIO_PINS(31);
140DECLARE_MSM_GPIO_PINS(32);
141DECLARE_MSM_GPIO_PINS(33);
142DECLARE_MSM_GPIO_PINS(34);
143DECLARE_MSM_GPIO_PINS(35);
144DECLARE_MSM_GPIO_PINS(36);
145DECLARE_MSM_GPIO_PINS(37);
146DECLARE_MSM_GPIO_PINS(38);
147DECLARE_MSM_GPIO_PINS(39);
148DECLARE_MSM_GPIO_PINS(40);
149DECLARE_MSM_GPIO_PINS(41);
150DECLARE_MSM_GPIO_PINS(42);
151DECLARE_MSM_GPIO_PINS(43);
152DECLARE_MSM_GPIO_PINS(44);
153DECLARE_MSM_GPIO_PINS(45);
154DECLARE_MSM_GPIO_PINS(46);
155DECLARE_MSM_GPIO_PINS(47);
156DECLARE_MSM_GPIO_PINS(48);
157DECLARE_MSM_GPIO_PINS(49);
158
159enum ipq5424_functions {
160 msm_mux_atest_char,
161 msm_mux_atest_char0,
162 msm_mux_atest_char1,
163 msm_mux_atest_char2,
164 msm_mux_atest_char3,
165 msm_mux_atest_tic,
166 msm_mux_audio_pri,
167 msm_mux_audio_pri0,
168 msm_mux_audio_pri1,
169 msm_mux_audio_sec,
170 msm_mux_audio_sec0,
171 msm_mux_audio_sec1,
172 msm_mux_core_voltage,
173 msm_mux_cri_trng0,
174 msm_mux_cri_trng1,
175 msm_mux_cri_trng2,
176 msm_mux_cri_trng3,
177 msm_mux_cxc_clk,
178 msm_mux_cxc_data,
179 msm_mux_dbg_out,
180 msm_mux_gcc_plltest,
181 msm_mux_gcc_tlmm,
182 msm_mux_gpio,
183 msm_mux_i2c0_scl,
184 msm_mux_i2c0_sda,
185 msm_mux_i2c1_scl,
186 msm_mux_i2c1_sda,
187 msm_mux_i2c11,
188 msm_mux_mac0,
189 msm_mux_mac1,
190 msm_mux_mdc_mst,
191 msm_mux_mdc_slv,
192 msm_mux_mdio_mst,
193 msm_mux_mdio_slv,
194 msm_mux_pcie0_clk,
195 msm_mux_pcie0_wake,
196 msm_mux_pcie1_clk,
197 msm_mux_pcie1_wake,
198 msm_mux_pcie2_clk,
199 msm_mux_pcie2_wake,
200 msm_mux_pcie3_clk,
201 msm_mux_pcie3_wake,
202 msm_mux_pll_test,
203 msm_mux_prng_rosc0,
204 msm_mux_prng_rosc1,
205 msm_mux_prng_rosc2,
206 msm_mux_prng_rosc3,
207 msm_mux_PTA0_0,
208 msm_mux_PTA0_1,
209 msm_mux_PTA0_2,
210 msm_mux_PTA10,
211 msm_mux_PTA11,
212 msm_mux_pwm0,
213 msm_mux_pwm1,
214 msm_mux_pwm2,
215 msm_mux_qdss_cti_trig_in_a0,
216 msm_mux_qdss_cti_trig_out_a0,
217 msm_mux_qdss_cti_trig_in_a1,
218 msm_mux_qdss_cti_trig_out_a1,
219 msm_mux_qdss_cti_trig_in_b0,
220 msm_mux_qdss_cti_trig_out_b0,
221 msm_mux_qdss_cti_trig_in_b1,
222 msm_mux_qdss_cti_trig_out_b1,
223 msm_mux_qdss_traceclk_a,
224 msm_mux_qdss_tracectl_a,
225 msm_mux_qdss_tracedata_a,
226 msm_mux_qspi_clk,
227 msm_mux_qspi_cs,
228 msm_mux_qspi_data,
229 msm_mux_resout,
230 msm_mux_rx0,
231 msm_mux_rx1,
232 msm_mux_rx2,
233 msm_mux_sdc_clk,
234 msm_mux_sdc_cmd,
235 msm_mux_sdc_data,
236 msm_mux_spi0_clk,
237 msm_mux_spi0_cs,
238 msm_mux_spi0_miso,
239 msm_mux_spi0_mosi,
240 msm_mux_spi1,
241 msm_mux_spi10,
242 msm_mux_spi11,
243 msm_mux_tsens_max,
244 msm_mux_uart0,
245 msm_mux_uart1,
246 msm_mux_wci_txd,
247 msm_mux_wci_rxd,
248 msm_mux_wsi_clk,
249 msm_mux_wsi_data,
250 msm_mux__,
251};
252
253static const char * const gpio_groups[] = {
254 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
255 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
256 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
257 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
258 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
259 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
260 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
261};
262
263static const char * const sdc_data_groups[] = {
264 "gpio0", "gpio1", "gpio2", "gpio3",
265};
266
267static const char * const qspi_data_groups[] = {
268 "gpio0", "gpio1", "gpio2", "gpio3",
269};
270
271static const char * const pwm2_groups[] = {
272 "gpio0", "gpio1", "gpio2", "gpio3",
273};
274
275static const char * const wci_txd_groups[] = {
276 "gpio0", "gpio1", "gpio8", "gpio10", "gpio11", "gpio40", "gpio41",
277};
278
279static const char * const wci_rxd_groups[] = {
280 "gpio0", "gpio1", "gpio8", "gpio10", "gpio11", "gpio40", "gpio41",
281};
282
283static const char * const sdc_cmd_groups[] = {
284 "gpio4",
285};
286
287static const char * const qspi_cs_groups[] = {
288 "gpio4",
289};
290
291static const char * const qdss_cti_trig_out_a1_groups[] = {
292 "gpio27",
293};
294
295static const char * const sdc_clk_groups[] = {
296 "gpio5",
297};
298
299static const char * const qspi_clk_groups[] = {
300 "gpio5",
301};
302
303static const char * const spi0_clk_groups[] = {
304 "gpio6",
305};
306
307static const char * const pwm1_groups[] = {
308 "gpio6", "gpio7", "gpio8", "gpio9",
309};
310
311static const char * const cri_trng0_groups[] = {
312 "gpio6",
313};
314
315static const char * const qdss_tracedata_a_groups[] = {
316 "gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11", "gpio12",
317 "gpio13", "gpio14", "gpio15", "gpio20", "gpio21", "gpio36", "gpio37",
318 "gpio38", "gpio39",
319};
320
321static const char * const spi0_cs_groups[] = {
322 "gpio7",
323};
324
325static const char * const cri_trng1_groups[] = {
326 "gpio7",
327};
328
329static const char * const spi0_miso_groups[] = {
330 "gpio8",
331};
332
333static const char * const cri_trng2_groups[] = {
334 "gpio8",
335};
336
337static const char * const spi0_mosi_groups[] = {
338 "gpio9",
339};
340
341static const char * const cri_trng3_groups[] = {
342 "gpio9",
343};
344
345static const char * const uart0_groups[] = {
346 "gpio10", "gpio11", "gpio12", "gpio13",
347};
348
349static const char * const pwm0_groups[] = {
350 "gpio10", "gpio11", "gpio12", "gpio13",
351};
352
353static const char * const prng_rosc0_groups[] = {
354 "gpio12",
355};
356
357static const char * const prng_rosc1_groups[] = {
358 "gpio13",
359};
360
361static const char * const i2c0_scl_groups[] = {
362 "gpio14",
363};
364
365static const char * const tsens_max_groups[] = {
366 "gpio14",
367};
368
369static const char * const prng_rosc2_groups[] = {
370 "gpio14",
371};
372
373static const char * const i2c0_sda_groups[] = {
374 "gpio15",
375};
376
377static const char * const prng_rosc3_groups[] = {
378 "gpio15",
379};
380
381static const char * const core_voltage_groups[] = {
382 "gpio16", "gpio17",
383};
384
385static const char * const i2c1_scl_groups[] = {
386 "gpio16",
387};
388
389static const char * const i2c1_sda_groups[] = {
390 "gpio17",
391};
392
393static const char * const mdc_slv_groups[] = {
394 "gpio20",
395};
396
397static const char * const atest_char0_groups[] = {
398 "gpio20",
399};
400
401static const char * const mdio_slv_groups[] = {
402 "gpio21",
403};
404
405static const char * const atest_char1_groups[] = {
406 "gpio21",
407};
408
409static const char * const mdc_mst_groups[] = {
410 "gpio22",
411};
412
413static const char * const atest_char2_groups[] = {
414 "gpio22",
415};
416
417static const char * const mdio_mst_groups[] = {
418 "gpio23",
419};
420
421static const char * const atest_char3_groups[] = {
422 "gpio23",
423};
424
425static const char * const pcie0_clk_groups[] = {
426 "gpio24",
427};
428
429static const char * const PTA10_groups[] = {
430 "gpio24", "gpio26", "gpio27",
431};
432
433static const char * const mac0_groups[] = {
434 "gpio24", "gpio26",
435};
436
437static const char * const atest_char_groups[] = {
438 "gpio24",
439};
440
441static const char * const pcie0_wake_groups[] = {
442 "gpio26",
443};
444
445static const char * const pcie1_clk_groups[] = {
446 "gpio27",
447};
448
449static const char * const i2c11_groups[] = {
450 "gpio27", "gpio29",
451};
452
453static const char * const pcie1_wake_groups[] = {
454 "gpio29",
455};
456
457static const char * const pcie2_clk_groups[] = {
458 "gpio30",
459};
460
461static const char * const mac1_groups[] = {
462 "gpio30", "gpio32",
463};
464
465static const char * const pcie2_wake_groups[] = {
466 "gpio32",
467};
468
469static const char * const PTA11_groups[] = {
470 "gpio30", "gpio32", "gpio33",
471};
472
473static const char * const audio_pri0_groups[] = {
474 "gpio32", "gpio32",
475};
476
477static const char * const pcie3_clk_groups[] = {
478 "gpio33",
479};
480
481static const char * const audio_pri1_groups[] = {
482 "gpio33", "gpio33",
483};
484
485static const char * const pcie3_wake_groups[] = {
486 "gpio35",
487};
488
489static const char * const audio_sec1_groups[] = {
490 "gpio35", "gpio35",
491};
492
493static const char * const audio_pri_groups[] = {
494 "gpio36", "gpio37", "gpio38", "gpio39",
495};
496
497static const char * const spi1_groups[] = {
498 "gpio11", "gpio36", "gpio37", "gpio38", "gpio46",
499};
500
501static const char * const audio_sec0_groups[] = {
502 "gpio36", "gpio36",
503};
504
505static const char * const rx1_groups[] = {
506 "gpio38", "gpio46",
507};
508
509static const char * const pll_test_groups[] = {
510 "gpio38",
511};
512
513static const char * const dbg_out_groups[] = {
514 "gpio46",
515};
516
517static const char * const PTA0_0_groups[] = {
518 "gpio40",
519};
520
521static const char * const atest_tic_groups[] = {
522 "gpio40",
523};
524
525static const char * const PTA0_1_groups[] = {
526 "gpio41",
527};
528
529static const char * const cxc_data_groups[] = {
530 "gpio41",
531};
532
533static const char * const PTA0_2_groups[] = {
534 "gpio42",
535};
536
537static const char * const cxc_clk_groups[] = {
538 "gpio42",
539};
540
541static const char * const uart1_groups[] = {
542 "gpio43", "gpio44",
543};
544
545static const char * const audio_sec_groups[] = {
546 "gpio45", "gpio46", "gpio47", "gpio48",
547};
548
549static const char * const gcc_plltest_groups[] = {
550 "gpio43", "gpio45",
551};
552
553static const char * const gcc_tlmm_groups[] = {
554 "gpio44",
555};
556
557static const char * const qdss_cti_trig_out_b1_groups[] = {
558 "gpio33",
559};
560
561static const char * const rx0_groups[] = {
562 "gpio39", "gpio47",
563};
564
565static const char * const qdss_traceclk_a_groups[] = {
566 "gpio45",
567};
568
569static const char * const qdss_tracectl_a_groups[] = {
570 "gpio46",
571};
572
573static const char * const qdss_cti_trig_out_a0_groups[] = {
574 "gpio24",
575};
576
577static const char * const qdss_cti_trig_in_a0_groups[] = {
578 "gpio26",
579};
580
581static const char * const resout_groups[] = {
582 "gpio49",
583};
584
585static const char * const qdss_cti_trig_in_a1_groups[] = {
586 "gpio29",
587};
588
589static const char * const qdss_cti_trig_out_b0_groups[] = {
590 "gpio30",
591};
592
593static const char * const qdss_cti_trig_in_b0_groups[] = {
594 "gpio32",
595};
596
597static const char * const qdss_cti_trig_in_b1_groups[] = {
598 "gpio35",
599};
600
601static const char * const spi10_groups[] = {
602 "gpio45", "gpio47", "gpio48",
603};
604
605static const char * const spi11_groups[] = {
606 "gpio10", "gpio12", "gpio13",
607};
608
609static const char * const wsi_clk_groups[] = {
610 "gpio24", "gpio27",
611};
612
613static const char * const wsi_data_groups[] = {
614 "gpio26", "gpio29",
615};
616
617static const char * const rx2_groups[] = {
618 "gpio37", "gpio45",
619};
620
621static const struct pinfunction ipq5424_functions[] = {
622 MSM_PIN_FUNCTION(atest_char),
623 MSM_PIN_FUNCTION(atest_char0),
624 MSM_PIN_FUNCTION(atest_char1),
625 MSM_PIN_FUNCTION(atest_char2),
626 MSM_PIN_FUNCTION(atest_char3),
627 MSM_PIN_FUNCTION(atest_tic),
628 MSM_PIN_FUNCTION(audio_pri),
629 MSM_PIN_FUNCTION(audio_pri0),
630 MSM_PIN_FUNCTION(audio_pri1),
631 MSM_PIN_FUNCTION(audio_sec),
632 MSM_PIN_FUNCTION(audio_sec0),
633 MSM_PIN_FUNCTION(audio_sec1),
634 MSM_PIN_FUNCTION(core_voltage),
635 MSM_PIN_FUNCTION(cri_trng0),
636 MSM_PIN_FUNCTION(cri_trng1),
637 MSM_PIN_FUNCTION(cri_trng2),
638 MSM_PIN_FUNCTION(cri_trng3),
639 MSM_PIN_FUNCTION(cxc_clk),
640 MSM_PIN_FUNCTION(cxc_data),
641 MSM_PIN_FUNCTION(dbg_out),
642 MSM_PIN_FUNCTION(gcc_plltest),
643 MSM_PIN_FUNCTION(gcc_tlmm),
644 MSM_GPIO_PIN_FUNCTION(gpio),
645 MSM_PIN_FUNCTION(i2c0_scl),
646 MSM_PIN_FUNCTION(i2c0_sda),
647 MSM_PIN_FUNCTION(i2c1_scl),
648 MSM_PIN_FUNCTION(i2c1_sda),
649 MSM_PIN_FUNCTION(i2c11),
650 MSM_PIN_FUNCTION(mac0),
651 MSM_PIN_FUNCTION(mac1),
652 MSM_PIN_FUNCTION(mdc_mst),
653 MSM_PIN_FUNCTION(mdc_slv),
654 MSM_PIN_FUNCTION(mdio_mst),
655 MSM_PIN_FUNCTION(mdio_slv),
656 MSM_PIN_FUNCTION(pcie0_clk),
657 MSM_PIN_FUNCTION(pcie0_wake),
658 MSM_PIN_FUNCTION(pcie1_clk),
659 MSM_PIN_FUNCTION(pcie1_wake),
660 MSM_PIN_FUNCTION(pcie2_clk),
661 MSM_PIN_FUNCTION(pcie2_wake),
662 MSM_PIN_FUNCTION(pcie3_clk),
663 MSM_PIN_FUNCTION(pcie3_wake),
664 MSM_PIN_FUNCTION(pll_test),
665 MSM_PIN_FUNCTION(prng_rosc0),
666 MSM_PIN_FUNCTION(prng_rosc1),
667 MSM_PIN_FUNCTION(prng_rosc2),
668 MSM_PIN_FUNCTION(prng_rosc3),
669 MSM_PIN_FUNCTION(PTA0_0),
670 MSM_PIN_FUNCTION(PTA0_1),
671 MSM_PIN_FUNCTION(PTA0_2),
672 MSM_PIN_FUNCTION(PTA10),
673 MSM_PIN_FUNCTION(PTA11),
674 MSM_PIN_FUNCTION(pwm0),
675 MSM_PIN_FUNCTION(pwm1),
676 MSM_PIN_FUNCTION(pwm2),
677 MSM_PIN_FUNCTION(qdss_cti_trig_in_a0),
678 MSM_PIN_FUNCTION(qdss_cti_trig_out_a0),
679 MSM_PIN_FUNCTION(qdss_cti_trig_in_a1),
680 MSM_PIN_FUNCTION(qdss_cti_trig_out_a1),
681 MSM_PIN_FUNCTION(qdss_cti_trig_in_b0),
682 MSM_PIN_FUNCTION(qdss_cti_trig_out_b0),
683 MSM_PIN_FUNCTION(qdss_cti_trig_in_b1),
684 MSM_PIN_FUNCTION(qdss_cti_trig_out_b1),
685 MSM_PIN_FUNCTION(qdss_traceclk_a),
686 MSM_PIN_FUNCTION(qdss_tracectl_a),
687 MSM_PIN_FUNCTION(qdss_tracedata_a),
688 MSM_PIN_FUNCTION(qspi_clk),
689 MSM_PIN_FUNCTION(qspi_cs),
690 MSM_PIN_FUNCTION(qspi_data),
691 MSM_PIN_FUNCTION(resout),
692 MSM_PIN_FUNCTION(rx0),
693 MSM_PIN_FUNCTION(rx1),
694 MSM_PIN_FUNCTION(rx2),
695 MSM_PIN_FUNCTION(sdc_clk),
696 MSM_PIN_FUNCTION(sdc_cmd),
697 MSM_PIN_FUNCTION(sdc_data),
698 MSM_PIN_FUNCTION(spi0_clk),
699 MSM_PIN_FUNCTION(spi0_cs),
700 MSM_PIN_FUNCTION(spi0_miso),
701 MSM_PIN_FUNCTION(spi0_mosi),
702 MSM_PIN_FUNCTION(spi1),
703 MSM_PIN_FUNCTION(spi10),
704 MSM_PIN_FUNCTION(spi11),
705 MSM_PIN_FUNCTION(tsens_max),
706 MSM_PIN_FUNCTION(uart0),
707 MSM_PIN_FUNCTION(uart1),
708 MSM_PIN_FUNCTION(wci_txd),
709 MSM_PIN_FUNCTION(wci_rxd),
710 MSM_PIN_FUNCTION(wsi_clk),
711 MSM_PIN_FUNCTION(wsi_data),
712};
713
714static const struct msm_pingroup ipq5424_groups[] = {
715 PINGROUP(0, sdc_data, qspi_data, pwm2, wci_txd, wci_rxd, _, _, _, _),
716 PINGROUP(1, sdc_data, qspi_data, pwm2, wci_txd, wci_rxd, _, _, _, _),
717 PINGROUP(2, sdc_data, qspi_data, pwm2, _, _, _, _, _, _),
718 PINGROUP(3, sdc_data, qspi_data, pwm2, _, _, _, _, _, _),
719 PINGROUP(4, sdc_cmd, qspi_cs, _, _, _, _, _, _, _),
720 PINGROUP(5, sdc_clk, qspi_clk, _, _, _, _, _, _, _),
721 PINGROUP(6, spi0_clk, pwm1, _, cri_trng0, qdss_tracedata_a, _, _, _, _),
722 PINGROUP(7, spi0_cs, pwm1, _, cri_trng1, qdss_tracedata_a, _, _, _, _),
723 PINGROUP(8, spi0_miso, pwm1, wci_txd, wci_rxd, _, cri_trng2, qdss_tracedata_a, _, _),
724 PINGROUP(9, spi0_mosi, pwm1, _, cri_trng3, qdss_tracedata_a, _, _, _, _),
725 PINGROUP(10, uart0, pwm0, spi11, _, wci_txd, wci_rxd, _, qdss_tracedata_a, _),
726 PINGROUP(11, uart0, pwm0, spi1, _, wci_txd, wci_rxd, _, qdss_tracedata_a, _),
727 PINGROUP(12, uart0, pwm0, spi11, _, prng_rosc0, qdss_tracedata_a, _, _, _),
728 PINGROUP(13, uart0, pwm0, spi11, _, prng_rosc1, qdss_tracedata_a, _, _, _),
729 PINGROUP(14, i2c0_scl, tsens_max, _, prng_rosc2, qdss_tracedata_a, _, _, _, _),
730 PINGROUP(15, i2c0_sda, _, prng_rosc3, qdss_tracedata_a, _, _, _, _, _),
731 PINGROUP(16, core_voltage, i2c1_scl, _, _, _, _, _, _, _),
732 PINGROUP(17, core_voltage, i2c1_sda, _, _, _, _, _, _, _),
733 PINGROUP(18, _, _, _, _, _, _, _, _, _),
734 PINGROUP(19, _, _, _, _, _, _, _, _, _),
735 PINGROUP(20, mdc_slv, atest_char0, _, qdss_tracedata_a, _, _, _, _, _),
736 PINGROUP(21, mdio_slv, atest_char1, _, qdss_tracedata_a, _, _, _, _, _),
737 PINGROUP(22, mdc_mst, atest_char2, _, _, _, _, _, _, _),
738 PINGROUP(23, mdio_mst, atest_char3, _, _, _, _, _, _, _),
739 PINGROUP(24, pcie0_clk, PTA10, mac0, _, wsi_clk, _, atest_char, qdss_cti_trig_out_a0, _),
740 PINGROUP(25, _, _, _, _, _, _, _, _, _),
741 PINGROUP(26, pcie0_wake, PTA10, mac0, _, wsi_data, _, qdss_cti_trig_in_a0, _, _),
742 PINGROUP(27, pcie1_clk, i2c11, PTA10, wsi_clk, qdss_cti_trig_out_a1, _, _, _, _),
743 PINGROUP(28, _, _, _, _, _, _, _, _, _),
744 PINGROUP(29, pcie1_wake, i2c11, wsi_data, qdss_cti_trig_in_a1, _, _, _, _, _),
745 PINGROUP(30, pcie2_clk, PTA11, mac1, qdss_cti_trig_out_b0, _, _, _, _, _),
746 PINGROUP(31, _, _, _, _, _, _, _, _, _),
747 PINGROUP(32, pcie2_wake, PTA11, mac1, audio_pri0, audio_pri0, qdss_cti_trig_in_b0, _, _, _),
748 PINGROUP(33, pcie3_clk, PTA11, audio_pri1, audio_pri1, qdss_cti_trig_out_b1, _, _, _, _),
749 PINGROUP(34, _, _, _, _, _, _, _, _, _),
750 PINGROUP(35, pcie3_wake, audio_sec1, audio_sec1, qdss_cti_trig_in_b1, _, _, _, _, _),
751 PINGROUP(36, audio_pri, spi1, audio_sec0, audio_sec0, qdss_tracedata_a, _, _, _, _),
752 PINGROUP(37, audio_pri, spi1, rx2, qdss_tracedata_a, _, _, _, _, _),
753 PINGROUP(38, audio_pri, spi1, pll_test, rx1, qdss_tracedata_a, _, _, _, _),
754 PINGROUP(39, audio_pri, rx0, _, qdss_tracedata_a, _, _, _, _, _),
755 PINGROUP(40, PTA0_0, wci_txd, wci_rxd, _, atest_tic, _, _, _, _),
756 PINGROUP(41, PTA0_1, wci_txd, wci_rxd, cxc_data, _, _, _, _, _),
757 PINGROUP(42, PTA0_2, cxc_clk, _, _, _, _, _, _, _),
758 PINGROUP(43, uart1, gcc_plltest, _, _, _, _, _, _, _),
759 PINGROUP(44, uart1, gcc_tlmm, _, _, _, _, _, _, _),
760 PINGROUP(45, spi10, rx2, audio_sec, gcc_plltest, _, qdss_traceclk_a, _, _, _),
761 PINGROUP(46, spi1, rx1, audio_sec, dbg_out, qdss_tracectl_a, _, _, _, _),
762 PINGROUP(47, spi10, rx0, audio_sec, _, _, _, _, _, _),
763 PINGROUP(48, spi10, audio_sec, _, _, _, _, _, _, _),
764 PINGROUP(49, resout, _, _, _, _, _, _, _, _),
765};
766
767static const struct msm_pinctrl_soc_data ipq5424_pinctrl = {
768 .pins = ipq5424_pins,
769 .npins = ARRAY_SIZE(ipq5424_pins),
770 .functions = ipq5424_functions,
771 .nfunctions = ARRAY_SIZE(ipq5424_functions),
772 .groups = ipq5424_groups,
773 .ngroups = ARRAY_SIZE(ipq5424_groups),
774 .ngpios = 50,
775};
776
777static int ipq5424_pinctrl_probe(struct platform_device *pdev)
778{
779 return msm_pinctrl_probe(pdev, soc_data: &ipq5424_pinctrl);
780}
781
782static const struct of_device_id ipq5424_pinctrl_of_match[] = {
783 { .compatible = "qcom,ipq5424-tlmm", },
784 { },
785};
786MODULE_DEVICE_TABLE(of, ipq5424_pinctrl_of_match);
787
788static struct platform_driver ipq5424_pinctrl_driver = {
789 .driver = {
790 .name = "ipq5424-tlmm",
791 .of_match_table = ipq5424_pinctrl_of_match,
792 },
793 .probe = ipq5424_pinctrl_probe,
794};
795
796static int __init ipq5424_pinctrl_init(void)
797{
798 return platform_driver_register(&ipq5424_pinctrl_driver);
799}
800arch_initcall(ipq5424_pinctrl_init);
801
802static void __exit ipq5424_pinctrl_exit(void)
803{
804 platform_driver_unregister(&ipq5424_pinctrl_driver);
805}
806module_exit(ipq5424_pinctrl_exit);
807
808MODULE_DESCRIPTION("QTI IPQ5424 TLMM driver");
809MODULE_LICENSE("GPL");
810

source code of linux/drivers/pinctrl/qcom/pinctrl-ipq5424.c