1 | // SPDX-License-Identifier: GPL-2.0 |
2 | // Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. |
3 | |
4 | #include <linux/module.h> |
5 | #include <linux/of.h> |
6 | #include <linux/platform_device.h> |
7 | |
8 | #include "pinctrl-msm.h" |
9 | |
10 | static const char * const sm8150_tiles[] = { |
11 | "north" , |
12 | "south" , |
13 | "east" , |
14 | "west" |
15 | }; |
16 | |
17 | enum { |
18 | NORTH, |
19 | SOUTH, |
20 | EAST, |
21 | WEST |
22 | }; |
23 | |
24 | #define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ |
25 | { \ |
26 | .grp = PINCTRL_PINGROUP("gpio" #id, \ |
27 | gpio##id##_pins, \ |
28 | ARRAY_SIZE(gpio##id##_pins)), \ |
29 | .funcs = (int[]){ \ |
30 | msm_mux_gpio, /* gpio mode */ \ |
31 | msm_mux_##f1, \ |
32 | msm_mux_##f2, \ |
33 | msm_mux_##f3, \ |
34 | msm_mux_##f4, \ |
35 | msm_mux_##f5, \ |
36 | msm_mux_##f6, \ |
37 | msm_mux_##f7, \ |
38 | msm_mux_##f8, \ |
39 | msm_mux_##f9 \ |
40 | }, \ |
41 | .nfuncs = 10, \ |
42 | .ctl_reg = 0x1000 * id, \ |
43 | .io_reg = 0x1000 * id + 0x4, \ |
44 | .intr_cfg_reg = 0x1000 * id + 0x8, \ |
45 | .intr_status_reg = 0x1000 * id + 0xc, \ |
46 | .intr_target_reg = 0x1000 * id + 0x8, \ |
47 | .tile = _tile, \ |
48 | .mux_bit = 2, \ |
49 | .pull_bit = 0, \ |
50 | .drv_bit = 6, \ |
51 | .oe_bit = 9, \ |
52 | .in_bit = 0, \ |
53 | .out_bit = 1, \ |
54 | .intr_enable_bit = 0, \ |
55 | .intr_status_bit = 0, \ |
56 | .intr_target_bit = 5, \ |
57 | .intr_target_kpss_val = 3, \ |
58 | .intr_raw_status_bit = 4, \ |
59 | .intr_polarity_bit = 1, \ |
60 | .intr_detection_bit = 2, \ |
61 | .intr_detection_width = 2, \ |
62 | } |
63 | |
64 | #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ |
65 | { \ |
66 | .grp = PINCTRL_PINGROUP(#pg_name, \ |
67 | pg_name##_pins, \ |
68 | ARRAY_SIZE(pg_name##_pins)), \ |
69 | .ctl_reg = ctl, \ |
70 | .io_reg = 0, \ |
71 | .intr_cfg_reg = 0, \ |
72 | .intr_status_reg = 0, \ |
73 | .intr_target_reg = 0, \ |
74 | .tile = NORTH, \ |
75 | .mux_bit = -1, \ |
76 | .pull_bit = pull, \ |
77 | .drv_bit = drv, \ |
78 | .oe_bit = -1, \ |
79 | .in_bit = -1, \ |
80 | .out_bit = -1, \ |
81 | .intr_enable_bit = -1, \ |
82 | .intr_status_bit = -1, \ |
83 | .intr_target_bit = -1, \ |
84 | .intr_raw_status_bit = -1, \ |
85 | .intr_polarity_bit = -1, \ |
86 | .intr_detection_bit = -1, \ |
87 | .intr_detection_width = -1, \ |
88 | } |
89 | |
90 | #define UFS_RESET(pg_name, offset) \ |
91 | { \ |
92 | .grp = PINCTRL_PINGROUP(#pg_name, \ |
93 | pg_name##_pins, \ |
94 | ARRAY_SIZE(pg_name##_pins)), \ |
95 | .ctl_reg = offset, \ |
96 | .io_reg = offset + 0x4, \ |
97 | .intr_cfg_reg = 0, \ |
98 | .intr_status_reg = 0, \ |
99 | .intr_target_reg = 0, \ |
100 | .tile = SOUTH, \ |
101 | .mux_bit = -1, \ |
102 | .pull_bit = 3, \ |
103 | .drv_bit = 0, \ |
104 | .oe_bit = -1, \ |
105 | .in_bit = -1, \ |
106 | .out_bit = 0, \ |
107 | .intr_enable_bit = -1, \ |
108 | .intr_status_bit = -1, \ |
109 | .intr_target_bit = -1, \ |
110 | .intr_raw_status_bit = -1, \ |
111 | .intr_polarity_bit = -1, \ |
112 | .intr_detection_bit = -1, \ |
113 | .intr_detection_width = -1, \ |
114 | } |
115 | |
116 | static const struct pinctrl_pin_desc sm8150_pins[] = { |
117 | PINCTRL_PIN(0, "GPIO_0" ), |
118 | PINCTRL_PIN(1, "GPIO_1" ), |
119 | PINCTRL_PIN(2, "GPIO_2" ), |
120 | PINCTRL_PIN(3, "GPIO_3" ), |
121 | PINCTRL_PIN(4, "GPIO_4" ), |
122 | PINCTRL_PIN(5, "GPIO_5" ), |
123 | PINCTRL_PIN(6, "GPIO_6" ), |
124 | PINCTRL_PIN(7, "GPIO_7" ), |
125 | PINCTRL_PIN(8, "GPIO_8" ), |
126 | PINCTRL_PIN(9, "GPIO_9" ), |
127 | PINCTRL_PIN(10, "GPIO_10" ), |
128 | PINCTRL_PIN(11, "GPIO_11" ), |
129 | PINCTRL_PIN(12, "GPIO_12" ), |
130 | PINCTRL_PIN(13, "GPIO_13" ), |
131 | PINCTRL_PIN(14, "GPIO_14" ), |
132 | PINCTRL_PIN(15, "GPIO_15" ), |
133 | PINCTRL_PIN(16, "GPIO_16" ), |
134 | PINCTRL_PIN(17, "GPIO_17" ), |
135 | PINCTRL_PIN(18, "GPIO_18" ), |
136 | PINCTRL_PIN(19, "GPIO_19" ), |
137 | PINCTRL_PIN(20, "GPIO_20" ), |
138 | PINCTRL_PIN(21, "GPIO_21" ), |
139 | PINCTRL_PIN(22, "GPIO_22" ), |
140 | PINCTRL_PIN(23, "GPIO_23" ), |
141 | PINCTRL_PIN(24, "GPIO_24" ), |
142 | PINCTRL_PIN(25, "GPIO_25" ), |
143 | PINCTRL_PIN(26, "GPIO_26" ), |
144 | PINCTRL_PIN(27, "GPIO_27" ), |
145 | PINCTRL_PIN(28, "GPIO_28" ), |
146 | PINCTRL_PIN(29, "GPIO_29" ), |
147 | PINCTRL_PIN(30, "GPIO_30" ), |
148 | PINCTRL_PIN(31, "GPIO_31" ), |
149 | PINCTRL_PIN(32, "GPIO_32" ), |
150 | PINCTRL_PIN(33, "GPIO_33" ), |
151 | PINCTRL_PIN(34, "GPIO_34" ), |
152 | PINCTRL_PIN(35, "GPIO_35" ), |
153 | PINCTRL_PIN(36, "GPIO_36" ), |
154 | PINCTRL_PIN(37, "GPIO_37" ), |
155 | PINCTRL_PIN(38, "GPIO_38" ), |
156 | PINCTRL_PIN(39, "GPIO_39" ), |
157 | PINCTRL_PIN(40, "GPIO_40" ), |
158 | PINCTRL_PIN(41, "GPIO_41" ), |
159 | PINCTRL_PIN(42, "GPIO_42" ), |
160 | PINCTRL_PIN(43, "GPIO_43" ), |
161 | PINCTRL_PIN(44, "GPIO_44" ), |
162 | PINCTRL_PIN(45, "GPIO_45" ), |
163 | PINCTRL_PIN(46, "GPIO_46" ), |
164 | PINCTRL_PIN(47, "GPIO_47" ), |
165 | PINCTRL_PIN(48, "GPIO_48" ), |
166 | PINCTRL_PIN(49, "GPIO_49" ), |
167 | PINCTRL_PIN(50, "GPIO_50" ), |
168 | PINCTRL_PIN(51, "GPIO_51" ), |
169 | PINCTRL_PIN(52, "GPIO_52" ), |
170 | PINCTRL_PIN(53, "GPIO_53" ), |
171 | PINCTRL_PIN(54, "GPIO_54" ), |
172 | PINCTRL_PIN(55, "GPIO_55" ), |
173 | PINCTRL_PIN(56, "GPIO_56" ), |
174 | PINCTRL_PIN(57, "GPIO_57" ), |
175 | PINCTRL_PIN(58, "GPIO_58" ), |
176 | PINCTRL_PIN(59, "GPIO_59" ), |
177 | PINCTRL_PIN(60, "GPIO_60" ), |
178 | PINCTRL_PIN(61, "GPIO_61" ), |
179 | PINCTRL_PIN(62, "GPIO_62" ), |
180 | PINCTRL_PIN(63, "GPIO_63" ), |
181 | PINCTRL_PIN(64, "GPIO_64" ), |
182 | PINCTRL_PIN(65, "GPIO_65" ), |
183 | PINCTRL_PIN(66, "GPIO_66" ), |
184 | PINCTRL_PIN(67, "GPIO_67" ), |
185 | PINCTRL_PIN(68, "GPIO_68" ), |
186 | PINCTRL_PIN(69, "GPIO_69" ), |
187 | PINCTRL_PIN(70, "GPIO_70" ), |
188 | PINCTRL_PIN(71, "GPIO_71" ), |
189 | PINCTRL_PIN(72, "GPIO_72" ), |
190 | PINCTRL_PIN(73, "GPIO_73" ), |
191 | PINCTRL_PIN(74, "GPIO_74" ), |
192 | PINCTRL_PIN(75, "GPIO_75" ), |
193 | PINCTRL_PIN(76, "GPIO_76" ), |
194 | PINCTRL_PIN(77, "GPIO_77" ), |
195 | PINCTRL_PIN(78, "GPIO_78" ), |
196 | PINCTRL_PIN(79, "GPIO_79" ), |
197 | PINCTRL_PIN(80, "GPIO_80" ), |
198 | PINCTRL_PIN(81, "GPIO_81" ), |
199 | PINCTRL_PIN(82, "GPIO_82" ), |
200 | PINCTRL_PIN(83, "GPIO_83" ), |
201 | PINCTRL_PIN(84, "GPIO_84" ), |
202 | PINCTRL_PIN(85, "GPIO_85" ), |
203 | PINCTRL_PIN(86, "GPIO_86" ), |
204 | PINCTRL_PIN(87, "GPIO_87" ), |
205 | PINCTRL_PIN(88, "GPIO_88" ), |
206 | PINCTRL_PIN(89, "GPIO_89" ), |
207 | PINCTRL_PIN(90, "GPIO_90" ), |
208 | PINCTRL_PIN(91, "GPIO_91" ), |
209 | PINCTRL_PIN(92, "GPIO_92" ), |
210 | PINCTRL_PIN(93, "GPIO_93" ), |
211 | PINCTRL_PIN(94, "GPIO_94" ), |
212 | PINCTRL_PIN(95, "GPIO_95" ), |
213 | PINCTRL_PIN(96, "GPIO_96" ), |
214 | PINCTRL_PIN(97, "GPIO_97" ), |
215 | PINCTRL_PIN(98, "GPIO_98" ), |
216 | PINCTRL_PIN(99, "GPIO_99" ), |
217 | PINCTRL_PIN(100, "GPIO_100" ), |
218 | PINCTRL_PIN(101, "GPIO_101" ), |
219 | PINCTRL_PIN(102, "GPIO_102" ), |
220 | PINCTRL_PIN(103, "GPIO_103" ), |
221 | PINCTRL_PIN(104, "GPIO_104" ), |
222 | PINCTRL_PIN(105, "GPIO_105" ), |
223 | PINCTRL_PIN(106, "GPIO_106" ), |
224 | PINCTRL_PIN(107, "GPIO_107" ), |
225 | PINCTRL_PIN(108, "GPIO_108" ), |
226 | PINCTRL_PIN(109, "GPIO_109" ), |
227 | PINCTRL_PIN(110, "GPIO_110" ), |
228 | PINCTRL_PIN(111, "GPIO_111" ), |
229 | PINCTRL_PIN(112, "GPIO_112" ), |
230 | PINCTRL_PIN(113, "GPIO_113" ), |
231 | PINCTRL_PIN(114, "GPIO_114" ), |
232 | PINCTRL_PIN(115, "GPIO_115" ), |
233 | PINCTRL_PIN(116, "GPIO_116" ), |
234 | PINCTRL_PIN(117, "GPIO_117" ), |
235 | PINCTRL_PIN(118, "GPIO_118" ), |
236 | PINCTRL_PIN(119, "GPIO_119" ), |
237 | PINCTRL_PIN(120, "GPIO_120" ), |
238 | PINCTRL_PIN(121, "GPIO_121" ), |
239 | PINCTRL_PIN(122, "GPIO_122" ), |
240 | PINCTRL_PIN(123, "GPIO_123" ), |
241 | PINCTRL_PIN(124, "GPIO_124" ), |
242 | PINCTRL_PIN(125, "GPIO_125" ), |
243 | PINCTRL_PIN(126, "GPIO_126" ), |
244 | PINCTRL_PIN(127, "GPIO_127" ), |
245 | PINCTRL_PIN(128, "GPIO_128" ), |
246 | PINCTRL_PIN(129, "GPIO_129" ), |
247 | PINCTRL_PIN(130, "GPIO_130" ), |
248 | PINCTRL_PIN(131, "GPIO_131" ), |
249 | PINCTRL_PIN(132, "GPIO_132" ), |
250 | PINCTRL_PIN(133, "GPIO_133" ), |
251 | PINCTRL_PIN(134, "GPIO_134" ), |
252 | PINCTRL_PIN(135, "GPIO_135" ), |
253 | PINCTRL_PIN(136, "GPIO_136" ), |
254 | PINCTRL_PIN(137, "GPIO_137" ), |
255 | PINCTRL_PIN(138, "GPIO_138" ), |
256 | PINCTRL_PIN(139, "GPIO_139" ), |
257 | PINCTRL_PIN(140, "GPIO_140" ), |
258 | PINCTRL_PIN(141, "GPIO_141" ), |
259 | PINCTRL_PIN(142, "GPIO_142" ), |
260 | PINCTRL_PIN(143, "GPIO_143" ), |
261 | PINCTRL_PIN(144, "GPIO_144" ), |
262 | PINCTRL_PIN(145, "GPIO_145" ), |
263 | PINCTRL_PIN(146, "GPIO_146" ), |
264 | PINCTRL_PIN(147, "GPIO_147" ), |
265 | PINCTRL_PIN(148, "GPIO_148" ), |
266 | PINCTRL_PIN(149, "GPIO_149" ), |
267 | PINCTRL_PIN(150, "GPIO_150" ), |
268 | PINCTRL_PIN(151, "GPIO_151" ), |
269 | PINCTRL_PIN(152, "GPIO_152" ), |
270 | PINCTRL_PIN(153, "GPIO_153" ), |
271 | PINCTRL_PIN(154, "GPIO_154" ), |
272 | PINCTRL_PIN(155, "GPIO_155" ), |
273 | PINCTRL_PIN(156, "GPIO_156" ), |
274 | PINCTRL_PIN(157, "GPIO_157" ), |
275 | PINCTRL_PIN(158, "GPIO_158" ), |
276 | PINCTRL_PIN(159, "GPIO_159" ), |
277 | PINCTRL_PIN(160, "GPIO_160" ), |
278 | PINCTRL_PIN(161, "GPIO_161" ), |
279 | PINCTRL_PIN(162, "GPIO_162" ), |
280 | PINCTRL_PIN(163, "GPIO_163" ), |
281 | PINCTRL_PIN(164, "GPIO_164" ), |
282 | PINCTRL_PIN(165, "GPIO_165" ), |
283 | PINCTRL_PIN(166, "GPIO_166" ), |
284 | PINCTRL_PIN(167, "GPIO_167" ), |
285 | PINCTRL_PIN(168, "GPIO_168" ), |
286 | PINCTRL_PIN(169, "GPIO_169" ), |
287 | PINCTRL_PIN(170, "GPIO_170" ), |
288 | PINCTRL_PIN(171, "GPIO_171" ), |
289 | PINCTRL_PIN(172, "GPIO_172" ), |
290 | PINCTRL_PIN(173, "GPIO_173" ), |
291 | PINCTRL_PIN(174, "GPIO_174" ), |
292 | PINCTRL_PIN(175, "UFS_RESET" ), |
293 | PINCTRL_PIN(176, "SDC2_CLK" ), |
294 | PINCTRL_PIN(177, "SDC2_CMD" ), |
295 | PINCTRL_PIN(178, "SDC2_DATA" ), |
296 | }; |
297 | |
298 | #define DECLARE_MSM_GPIO_PINS(pin) \ |
299 | static const unsigned int gpio##pin##_pins[] = { pin } |
300 | DECLARE_MSM_GPIO_PINS(0); |
301 | DECLARE_MSM_GPIO_PINS(1); |
302 | DECLARE_MSM_GPIO_PINS(2); |
303 | DECLARE_MSM_GPIO_PINS(3); |
304 | DECLARE_MSM_GPIO_PINS(4); |
305 | DECLARE_MSM_GPIO_PINS(5); |
306 | DECLARE_MSM_GPIO_PINS(6); |
307 | DECLARE_MSM_GPIO_PINS(7); |
308 | DECLARE_MSM_GPIO_PINS(8); |
309 | DECLARE_MSM_GPIO_PINS(9); |
310 | DECLARE_MSM_GPIO_PINS(10); |
311 | DECLARE_MSM_GPIO_PINS(11); |
312 | DECLARE_MSM_GPIO_PINS(12); |
313 | DECLARE_MSM_GPIO_PINS(13); |
314 | DECLARE_MSM_GPIO_PINS(14); |
315 | DECLARE_MSM_GPIO_PINS(15); |
316 | DECLARE_MSM_GPIO_PINS(16); |
317 | DECLARE_MSM_GPIO_PINS(17); |
318 | DECLARE_MSM_GPIO_PINS(18); |
319 | DECLARE_MSM_GPIO_PINS(19); |
320 | DECLARE_MSM_GPIO_PINS(20); |
321 | DECLARE_MSM_GPIO_PINS(21); |
322 | DECLARE_MSM_GPIO_PINS(22); |
323 | DECLARE_MSM_GPIO_PINS(23); |
324 | DECLARE_MSM_GPIO_PINS(24); |
325 | DECLARE_MSM_GPIO_PINS(25); |
326 | DECLARE_MSM_GPIO_PINS(26); |
327 | DECLARE_MSM_GPIO_PINS(27); |
328 | DECLARE_MSM_GPIO_PINS(28); |
329 | DECLARE_MSM_GPIO_PINS(29); |
330 | DECLARE_MSM_GPIO_PINS(30); |
331 | DECLARE_MSM_GPIO_PINS(31); |
332 | DECLARE_MSM_GPIO_PINS(32); |
333 | DECLARE_MSM_GPIO_PINS(33); |
334 | DECLARE_MSM_GPIO_PINS(34); |
335 | DECLARE_MSM_GPIO_PINS(35); |
336 | DECLARE_MSM_GPIO_PINS(36); |
337 | DECLARE_MSM_GPIO_PINS(37); |
338 | DECLARE_MSM_GPIO_PINS(38); |
339 | DECLARE_MSM_GPIO_PINS(39); |
340 | DECLARE_MSM_GPIO_PINS(40); |
341 | DECLARE_MSM_GPIO_PINS(41); |
342 | DECLARE_MSM_GPIO_PINS(42); |
343 | DECLARE_MSM_GPIO_PINS(43); |
344 | DECLARE_MSM_GPIO_PINS(44); |
345 | DECLARE_MSM_GPIO_PINS(45); |
346 | DECLARE_MSM_GPIO_PINS(46); |
347 | DECLARE_MSM_GPIO_PINS(47); |
348 | DECLARE_MSM_GPIO_PINS(48); |
349 | DECLARE_MSM_GPIO_PINS(49); |
350 | DECLARE_MSM_GPIO_PINS(50); |
351 | DECLARE_MSM_GPIO_PINS(51); |
352 | DECLARE_MSM_GPIO_PINS(52); |
353 | DECLARE_MSM_GPIO_PINS(53); |
354 | DECLARE_MSM_GPIO_PINS(54); |
355 | DECLARE_MSM_GPIO_PINS(55); |
356 | DECLARE_MSM_GPIO_PINS(56); |
357 | DECLARE_MSM_GPIO_PINS(57); |
358 | DECLARE_MSM_GPIO_PINS(58); |
359 | DECLARE_MSM_GPIO_PINS(59); |
360 | DECLARE_MSM_GPIO_PINS(60); |
361 | DECLARE_MSM_GPIO_PINS(61); |
362 | DECLARE_MSM_GPIO_PINS(62); |
363 | DECLARE_MSM_GPIO_PINS(63); |
364 | DECLARE_MSM_GPIO_PINS(64); |
365 | DECLARE_MSM_GPIO_PINS(65); |
366 | DECLARE_MSM_GPIO_PINS(66); |
367 | DECLARE_MSM_GPIO_PINS(67); |
368 | DECLARE_MSM_GPIO_PINS(68); |
369 | DECLARE_MSM_GPIO_PINS(69); |
370 | DECLARE_MSM_GPIO_PINS(70); |
371 | DECLARE_MSM_GPIO_PINS(71); |
372 | DECLARE_MSM_GPIO_PINS(72); |
373 | DECLARE_MSM_GPIO_PINS(73); |
374 | DECLARE_MSM_GPIO_PINS(74); |
375 | DECLARE_MSM_GPIO_PINS(75); |
376 | DECLARE_MSM_GPIO_PINS(76); |
377 | DECLARE_MSM_GPIO_PINS(77); |
378 | DECLARE_MSM_GPIO_PINS(78); |
379 | DECLARE_MSM_GPIO_PINS(79); |
380 | DECLARE_MSM_GPIO_PINS(80); |
381 | DECLARE_MSM_GPIO_PINS(81); |
382 | DECLARE_MSM_GPIO_PINS(82); |
383 | DECLARE_MSM_GPIO_PINS(83); |
384 | DECLARE_MSM_GPIO_PINS(84); |
385 | DECLARE_MSM_GPIO_PINS(85); |
386 | DECLARE_MSM_GPIO_PINS(86); |
387 | DECLARE_MSM_GPIO_PINS(87); |
388 | DECLARE_MSM_GPIO_PINS(88); |
389 | DECLARE_MSM_GPIO_PINS(89); |
390 | DECLARE_MSM_GPIO_PINS(90); |
391 | DECLARE_MSM_GPIO_PINS(91); |
392 | DECLARE_MSM_GPIO_PINS(92); |
393 | DECLARE_MSM_GPIO_PINS(93); |
394 | DECLARE_MSM_GPIO_PINS(94); |
395 | DECLARE_MSM_GPIO_PINS(95); |
396 | DECLARE_MSM_GPIO_PINS(96); |
397 | DECLARE_MSM_GPIO_PINS(97); |
398 | DECLARE_MSM_GPIO_PINS(98); |
399 | DECLARE_MSM_GPIO_PINS(99); |
400 | DECLARE_MSM_GPIO_PINS(100); |
401 | DECLARE_MSM_GPIO_PINS(101); |
402 | DECLARE_MSM_GPIO_PINS(102); |
403 | DECLARE_MSM_GPIO_PINS(103); |
404 | DECLARE_MSM_GPIO_PINS(104); |
405 | DECLARE_MSM_GPIO_PINS(105); |
406 | DECLARE_MSM_GPIO_PINS(106); |
407 | DECLARE_MSM_GPIO_PINS(107); |
408 | DECLARE_MSM_GPIO_PINS(108); |
409 | DECLARE_MSM_GPIO_PINS(109); |
410 | DECLARE_MSM_GPIO_PINS(110); |
411 | DECLARE_MSM_GPIO_PINS(111); |
412 | DECLARE_MSM_GPIO_PINS(112); |
413 | DECLARE_MSM_GPIO_PINS(113); |
414 | DECLARE_MSM_GPIO_PINS(114); |
415 | DECLARE_MSM_GPIO_PINS(115); |
416 | DECLARE_MSM_GPIO_PINS(116); |
417 | DECLARE_MSM_GPIO_PINS(117); |
418 | DECLARE_MSM_GPIO_PINS(118); |
419 | DECLARE_MSM_GPIO_PINS(119); |
420 | DECLARE_MSM_GPIO_PINS(120); |
421 | DECLARE_MSM_GPIO_PINS(121); |
422 | DECLARE_MSM_GPIO_PINS(122); |
423 | DECLARE_MSM_GPIO_PINS(123); |
424 | DECLARE_MSM_GPIO_PINS(124); |
425 | DECLARE_MSM_GPIO_PINS(125); |
426 | DECLARE_MSM_GPIO_PINS(126); |
427 | DECLARE_MSM_GPIO_PINS(127); |
428 | DECLARE_MSM_GPIO_PINS(128); |
429 | DECLARE_MSM_GPIO_PINS(129); |
430 | DECLARE_MSM_GPIO_PINS(130); |
431 | DECLARE_MSM_GPIO_PINS(131); |
432 | DECLARE_MSM_GPIO_PINS(132); |
433 | DECLARE_MSM_GPIO_PINS(133); |
434 | DECLARE_MSM_GPIO_PINS(134); |
435 | DECLARE_MSM_GPIO_PINS(135); |
436 | DECLARE_MSM_GPIO_PINS(136); |
437 | DECLARE_MSM_GPIO_PINS(137); |
438 | DECLARE_MSM_GPIO_PINS(138); |
439 | DECLARE_MSM_GPIO_PINS(139); |
440 | DECLARE_MSM_GPIO_PINS(140); |
441 | DECLARE_MSM_GPIO_PINS(141); |
442 | DECLARE_MSM_GPIO_PINS(142); |
443 | DECLARE_MSM_GPIO_PINS(143); |
444 | DECLARE_MSM_GPIO_PINS(144); |
445 | DECLARE_MSM_GPIO_PINS(145); |
446 | DECLARE_MSM_GPIO_PINS(146); |
447 | DECLARE_MSM_GPIO_PINS(147); |
448 | DECLARE_MSM_GPIO_PINS(148); |
449 | DECLARE_MSM_GPIO_PINS(149); |
450 | DECLARE_MSM_GPIO_PINS(150); |
451 | DECLARE_MSM_GPIO_PINS(151); |
452 | DECLARE_MSM_GPIO_PINS(152); |
453 | DECLARE_MSM_GPIO_PINS(153); |
454 | DECLARE_MSM_GPIO_PINS(154); |
455 | DECLARE_MSM_GPIO_PINS(155); |
456 | DECLARE_MSM_GPIO_PINS(156); |
457 | DECLARE_MSM_GPIO_PINS(157); |
458 | DECLARE_MSM_GPIO_PINS(158); |
459 | DECLARE_MSM_GPIO_PINS(159); |
460 | DECLARE_MSM_GPIO_PINS(160); |
461 | DECLARE_MSM_GPIO_PINS(161); |
462 | DECLARE_MSM_GPIO_PINS(162); |
463 | DECLARE_MSM_GPIO_PINS(163); |
464 | DECLARE_MSM_GPIO_PINS(164); |
465 | DECLARE_MSM_GPIO_PINS(165); |
466 | DECLARE_MSM_GPIO_PINS(166); |
467 | DECLARE_MSM_GPIO_PINS(167); |
468 | DECLARE_MSM_GPIO_PINS(168); |
469 | DECLARE_MSM_GPIO_PINS(169); |
470 | DECLARE_MSM_GPIO_PINS(170); |
471 | DECLARE_MSM_GPIO_PINS(171); |
472 | DECLARE_MSM_GPIO_PINS(172); |
473 | DECLARE_MSM_GPIO_PINS(173); |
474 | DECLARE_MSM_GPIO_PINS(174); |
475 | |
476 | static const unsigned int ufs_reset_pins[] = { 175 }; |
477 | static const unsigned int sdc2_clk_pins[] = { 176 }; |
478 | static const unsigned int sdc2_cmd_pins[] = { 177 }; |
479 | static const unsigned int sdc2_data_pins[] = { 178 }; |
480 | |
481 | enum sm8150_functions { |
482 | msm_mux_adsp_ext, |
483 | msm_mux_agera_pll, |
484 | msm_mux_aoss_cti, |
485 | msm_mux_atest_char, |
486 | msm_mux_atest_char0, |
487 | msm_mux_atest_char1, |
488 | msm_mux_atest_char2, |
489 | msm_mux_atest_char3, |
490 | msm_mux_atest_usb1, |
491 | msm_mux_atest_usb2, |
492 | msm_mux_atest_usb10, |
493 | msm_mux_atest_usb11, |
494 | msm_mux_atest_usb12, |
495 | msm_mux_atest_usb13, |
496 | msm_mux_atest_usb20, |
497 | msm_mux_atest_usb21, |
498 | msm_mux_atest_usb22, |
499 | msm_mux_atest_usb23, |
500 | msm_mux_audio_ref, |
501 | msm_mux_btfm_slimbus, |
502 | msm_mux_cam_mclk, |
503 | msm_mux_cci_async, |
504 | msm_mux_cci_i2c, |
505 | msm_mux_cci_timer0, |
506 | msm_mux_cci_timer1, |
507 | msm_mux_cci_timer2, |
508 | msm_mux_cci_timer3, |
509 | msm_mux_cci_timer4, |
510 | msm_mux_cri_trng, |
511 | msm_mux_cri_trng0, |
512 | msm_mux_cri_trng1, |
513 | msm_mux_dbg_out, |
514 | msm_mux_ddr_bist, |
515 | msm_mux_ddr_pxi0, |
516 | msm_mux_ddr_pxi1, |
517 | msm_mux_ddr_pxi2, |
518 | msm_mux_ddr_pxi3, |
519 | msm_mux_edp_hot, |
520 | msm_mux_edp_lcd, |
521 | msm_mux_emac_phy, |
522 | msm_mux_emac_pps, |
523 | msm_mux_gcc_gp1, |
524 | msm_mux_gcc_gp2, |
525 | msm_mux_gcc_gp3, |
526 | msm_mux_gpio, |
527 | msm_mux_jitter_bist, |
528 | msm_mux_hs1_mi2s, |
529 | msm_mux_hs2_mi2s, |
530 | msm_mux_hs3_mi2s, |
531 | msm_mux_lpass_slimbus, |
532 | msm_mux_mdp_vsync, |
533 | msm_mux_mdp_vsync0, |
534 | msm_mux_mdp_vsync1, |
535 | msm_mux_mdp_vsync2, |
536 | msm_mux_mdp_vsync3, |
537 | msm_mux_mss_lte, |
538 | msm_mux_m_voc, |
539 | msm_mux_nav_pps, |
540 | msm_mux_pa_indicator, |
541 | msm_mux_pci_e0, |
542 | msm_mux_pci_e1, |
543 | msm_mux_phase_flag, |
544 | msm_mux_pll_bist, |
545 | msm_mux_pll_bypassnl, |
546 | msm_mux_pll_reset, |
547 | msm_mux_pri_mi2s, |
548 | msm_mux_pri_mi2s_ws, |
549 | msm_mux_prng_rosc, |
550 | msm_mux_qdss, |
551 | msm_mux_qdss_cti, |
552 | msm_mux_qlink_enable, |
553 | msm_mux_qlink_request, |
554 | msm_mux_qspi0, |
555 | msm_mux_qspi1, |
556 | msm_mux_qspi2, |
557 | msm_mux_qspi3, |
558 | msm_mux_qspi_clk, |
559 | msm_mux_qspi_cs, |
560 | msm_mux_qua_mi2s, |
561 | msm_mux_qup0, |
562 | msm_mux_qup1, |
563 | msm_mux_qup2, |
564 | msm_mux_qup3, |
565 | msm_mux_qup4, |
566 | msm_mux_qup5, |
567 | msm_mux_qup6, |
568 | msm_mux_qup7, |
569 | msm_mux_qup8, |
570 | msm_mux_qup9, |
571 | msm_mux_qup10, |
572 | msm_mux_qup11, |
573 | msm_mux_qup12, |
574 | msm_mux_qup13, |
575 | msm_mux_qup14, |
576 | msm_mux_qup15, |
577 | msm_mux_qup16, |
578 | msm_mux_qup17, |
579 | msm_mux_qup18, |
580 | msm_mux_qup19, |
581 | msm_mux_qup_l4, |
582 | msm_mux_qup_l5, |
583 | msm_mux_qup_l6, |
584 | msm_mux_rgmii, |
585 | msm_mux_sdc4, |
586 | msm_mux_sd_write, |
587 | msm_mux_sec_mi2s, |
588 | msm_mux_spkr_i2s, |
589 | msm_mux_sp_cmu, |
590 | msm_mux_ter_mi2s, |
591 | msm_mux_tgu_ch0, |
592 | msm_mux_tgu_ch2, |
593 | msm_mux_tgu_ch1, |
594 | msm_mux_tgu_ch3, |
595 | msm_mux_tsense_pwm1, |
596 | msm_mux_tsense_pwm2, |
597 | msm_mux_tsif1, |
598 | msm_mux_tsif2, |
599 | msm_mux_uim1, |
600 | msm_mux_uim2, |
601 | msm_mux_uim_batt, |
602 | msm_mux_usb2phy_ac, |
603 | msm_mux_usb_phy, |
604 | msm_mux_vfr_1, |
605 | msm_mux_vsense_trigger, |
606 | msm_mux_wlan1_adc1, |
607 | msm_mux_wlan1_adc0, |
608 | msm_mux_wlan2_adc1, |
609 | msm_mux_wlan2_adc0, |
610 | msm_mux_wmss_reset, |
611 | msm_mux__, |
612 | }; |
613 | |
614 | static const char * const phase_flag_groups[] = { |
615 | "gpio18" , "gpio19" , "gpio20" , "gpio55" , "gpio56" , |
616 | "gpio57" , "gpio59" , "gpio64" , "gpio68" , "gpio76" , |
617 | "gpio79" , "gpio80" , "gpio90" , "gpio91" , "gpio92" , |
618 | "gpio93" , "gpio94" , "gpio96" , "gpio114" , "gpio115" , |
619 | "gpio116" , "gpio117" , "gpio118" , "gpio119" , "gpio120" , |
620 | "gpio121" , "gpio122" , "gpio126" , "gpio127" , "gpio128" , |
621 | "gpio144" , "gpio145" , |
622 | }; |
623 | |
624 | static const char * const emac_pps_groups[] = { |
625 | "gpio81" , |
626 | }; |
627 | |
628 | static const char * const qup12_groups[] = { |
629 | "gpio83" , "gpio84" , "gpio85" , "gpio86" , |
630 | }; |
631 | |
632 | static const char * const qup16_groups[] = { |
633 | "gpio83" , "gpio84" , "gpio85" , "gpio86" , |
634 | }; |
635 | |
636 | static const char * const tsif1_groups[] = { |
637 | "gpio88" , "gpio89" , "gpio90" , "gpio91" , "gpio97" , |
638 | }; |
639 | |
640 | static const char * const qup8_groups[] = { |
641 | "gpio88" , "gpio89" , "gpio90" , "gpio91" , |
642 | }; |
643 | |
644 | static const char * const qspi_cs_groups[] = { |
645 | "gpio88" , "gpio94" , |
646 | }; |
647 | |
648 | static const char * const tgu_ch3_groups[] = { |
649 | "gpio88" , |
650 | }; |
651 | |
652 | static const char * const qspi0_groups[] = { |
653 | "gpio89" , |
654 | }; |
655 | |
656 | static const char * const mdp_vsync0_groups[] = { |
657 | "gpio89" , |
658 | }; |
659 | |
660 | static const char * const mdp_vsync1_groups[] = { |
661 | "gpio89" , |
662 | }; |
663 | |
664 | static const char * const mdp_vsync2_groups[] = { |
665 | "gpio89" , |
666 | }; |
667 | |
668 | static const char * const mdp_vsync3_groups[] = { |
669 | "gpio89" , |
670 | }; |
671 | |
672 | static const char * const tgu_ch0_groups[] = { |
673 | "gpio89" , |
674 | }; |
675 | |
676 | static const char * const qspi1_groups[] = { |
677 | "gpio90" , |
678 | }; |
679 | |
680 | static const char * const sdc4_groups[] = { |
681 | "gpio90" , "gpio91" , "gpio92" , "gpio93" , "gpio94" , "gpio95" , |
682 | }; |
683 | |
684 | static const char * const tgu_ch1_groups[] = { |
685 | "gpio90" , |
686 | }; |
687 | |
688 | static const char * const wlan1_adc1_groups[] = { |
689 | "gpio90" , |
690 | }; |
691 | |
692 | static const char * const qspi2_groups[] = { |
693 | "gpio91" , |
694 | }; |
695 | |
696 | static const char * const vfr_1_groups[] = { |
697 | "gpio91" , |
698 | }; |
699 | |
700 | static const char * const tgu_ch2_groups[] = { |
701 | "gpio91" , |
702 | }; |
703 | |
704 | static const char * const wlan1_adc0_groups[] = { |
705 | "gpio91" , |
706 | }; |
707 | |
708 | static const char * const tsif2_groups[] = { |
709 | "gpio92" , "gpio93" , "gpio94" , "gpio95" , "gpio96" , |
710 | }; |
711 | |
712 | static const char * const qup11_groups[] = { |
713 | "gpio92" , "gpio93" , "gpio94" , "gpio95" , |
714 | }; |
715 | |
716 | static const char * const qspi_clk_groups[] = { |
717 | "gpio92" , |
718 | }; |
719 | |
720 | static const char * const wlan2_adc1_groups[] = { |
721 | "gpio92" , |
722 | }; |
723 | |
724 | static const char * const qspi3_groups[] = { |
725 | "gpio93" , |
726 | }; |
727 | |
728 | static const char * const wlan2_adc0_groups[] = { |
729 | "gpio93" , |
730 | }; |
731 | |
732 | static const char * const sd_write_groups[] = { |
733 | "gpio97" , |
734 | }; |
735 | |
736 | static const char * const qup7_groups[] = { |
737 | "gpio98" , "gpio99" , "gpio100" , "gpio101" , |
738 | }; |
739 | |
740 | static const char * const ddr_bist_groups[] = { |
741 | "gpio98" , "gpio99" , "gpio145" , "gpio146" , |
742 | }; |
743 | |
744 | static const char * const ddr_pxi3_groups[] = { |
745 | "gpio98" , "gpio101" , |
746 | }; |
747 | |
748 | static const char * const atest_usb13_groups[] = { |
749 | "gpio99" , |
750 | }; |
751 | |
752 | static const char * const ddr_pxi1_groups[] = { |
753 | "gpio99" , "gpio100" , |
754 | }; |
755 | |
756 | static const char * const pll_bypassnl_groups[] = { |
757 | "gpio100" , |
758 | }; |
759 | |
760 | static const char * const atest_usb12_groups[] = { |
761 | "gpio100" , |
762 | }; |
763 | |
764 | static const char * const pll_reset_groups[] = { |
765 | "gpio101" , |
766 | }; |
767 | |
768 | static const char * const pci_e1_groups[] = { |
769 | "gpio102" , "gpio103" , |
770 | }; |
771 | |
772 | static const char * const uim2_groups[] = { |
773 | "gpio105" , "gpio106" , "gpio107" , "gpio108" , |
774 | }; |
775 | |
776 | static const char * const uim1_groups[] = { |
777 | "gpio109" , "gpio110" , "gpio111" , "gpio112" , |
778 | }; |
779 | |
780 | static const char * const uim_batt_groups[] = { |
781 | "gpio113" , |
782 | }; |
783 | |
784 | static const char * const usb2phy_ac_groups[] = { |
785 | "gpio113" , "gpio123" , |
786 | }; |
787 | |
788 | static const char * const aoss_cti_groups[] = { |
789 | "gpio113" , |
790 | }; |
791 | |
792 | static const char * const qup1_groups[] = { |
793 | "gpio114" , "gpio115" , "gpio116" , "gpio117" , |
794 | }; |
795 | |
796 | static const char * const rgmii_groups[] = { |
797 | "gpio4" , "gpio5" , "gpio6" , "gpio7" , "gpio59" , |
798 | "gpio114" , "gpio115" , "gpio116" , "gpio117" , |
799 | "gpio118" , "gpio119" , "gpio120" , "gpio121" , "gpio122" , |
800 | }; |
801 | |
802 | static const char * const adsp_ext_groups[] = { |
803 | "gpio115" , |
804 | }; |
805 | |
806 | static const char * const qup5_groups[] = { |
807 | "gpio119" , "gpio120" , "gpio121" , "gpio122" , |
808 | }; |
809 | |
810 | static const char * const atest_usb22_groups[] = { |
811 | "gpio123" , |
812 | }; |
813 | |
814 | static const char * const emac_phy_groups[] = { |
815 | "gpio124" , |
816 | }; |
817 | |
818 | static const char * const hs3_mi2s_groups[] = { |
819 | "gpio125" , "gpio165" , "gpio166" , "gpio167" , "gpio168" , |
820 | }; |
821 | |
822 | static const char * const sec_mi2s_groups[] = { |
823 | "gpio126" , "gpio127" , "gpio128" , "gpio129" , "gpio130" , |
824 | }; |
825 | |
826 | static const char * const qup2_groups[] = { |
827 | "gpio126" , "gpio127" , "gpio128" , "gpio129" , |
828 | }; |
829 | |
830 | static const char * const jitter_bist_groups[] = { |
831 | "gpio129" , |
832 | }; |
833 | |
834 | static const char * const atest_usb21_groups[] = { |
835 | "gpio129" , |
836 | }; |
837 | |
838 | static const char * const pll_bist_groups[] = { |
839 | "gpio130" , |
840 | }; |
841 | |
842 | static const char * const atest_usb20_groups[] = { |
843 | "gpio130" , |
844 | }; |
845 | |
846 | static const char * const atest_char0_groups[] = { |
847 | "gpio130" , |
848 | }; |
849 | |
850 | static const char * const ter_mi2s_groups[] = { |
851 | "gpio131" , "gpio132" , "gpio133" , "gpio134" , "gpio135" , |
852 | }; |
853 | |
854 | static const char * const gcc_gp1_groups[] = { |
855 | "gpio131" , "gpio136" , |
856 | }; |
857 | |
858 | static const char * const atest_char1_groups[] = { |
859 | "gpio133" , |
860 | }; |
861 | |
862 | static const char * const atest_char2_groups[] = { |
863 | "gpio134" , |
864 | }; |
865 | |
866 | static const char * const atest_char3_groups[] = { |
867 | "gpio135" , |
868 | }; |
869 | |
870 | static const char * const qua_mi2s_groups[] = { |
871 | "gpio136" , "gpio137" , "gpio138" , "gpio139" , "gpio140" , "gpio141" , |
872 | "gpio142" , |
873 | }; |
874 | |
875 | static const char * const pri_mi2s_groups[] = { |
876 | "gpio143" , "gpio144" , "gpio146" , "gpio147" , |
877 | }; |
878 | |
879 | static const char * const qup3_groups[] = { |
880 | "gpio144" , "gpio145" , "gpio146" , "gpio147" , |
881 | }; |
882 | |
883 | static const char * const ddr_pxi0_groups[] = { |
884 | "gpio144" , "gpio145" , |
885 | }; |
886 | |
887 | static const char * const pri_mi2s_ws_groups[] = { |
888 | "gpio145" , |
889 | }; |
890 | |
891 | static const char * const vsense_trigger_groups[] = { |
892 | "gpio145" , |
893 | }; |
894 | |
895 | static const char * const atest_usb1_groups[] = { |
896 | "gpio145" , |
897 | }; |
898 | |
899 | static const char * const atest_usb11_groups[] = { |
900 | "gpio146" , |
901 | }; |
902 | |
903 | static const char * const ddr_pxi2_groups[] = { |
904 | "gpio146" , "gpio147" , |
905 | }; |
906 | |
907 | static const char * const dbg_out_groups[] = { |
908 | "gpio147" , |
909 | }; |
910 | |
911 | static const char * const atest_usb10_groups[] = { |
912 | "gpio147" , |
913 | }; |
914 | |
915 | static const char * const spkr_i2s_groups[] = { |
916 | "gpio148" , "gpio149" , "gpio150" , "gpio151" , "gpio152" , |
917 | }; |
918 | |
919 | static const char * const audio_ref_groups[] = { |
920 | "gpio148" , |
921 | }; |
922 | |
923 | static const char * const lpass_slimbus_groups[] = { |
924 | "gpio149" , "gpio150" , "gpio151" , "gpio152" , |
925 | }; |
926 | |
927 | static const char * const tsense_pwm1_groups[] = { |
928 | "gpio150" , |
929 | }; |
930 | |
931 | static const char * const tsense_pwm2_groups[] = { |
932 | "gpio150" , |
933 | }; |
934 | |
935 | static const char * const btfm_slimbus_groups[] = { |
936 | "gpio153" , "gpio154" , |
937 | }; |
938 | |
939 | static const char * const hs1_mi2s_groups[] = { |
940 | "gpio155" , "gpio156" , "gpio157" , "gpio158" , "gpio159" , |
941 | }; |
942 | |
943 | static const char * const cri_trng0_groups[] = { |
944 | "gpio159" , |
945 | }; |
946 | |
947 | static const char * const hs2_mi2s_groups[] = { |
948 | "gpio160" , "gpio161" , "gpio162" , "gpio163" , "gpio164" , |
949 | }; |
950 | |
951 | static const char * const cri_trng1_groups[] = { |
952 | "gpio160" , |
953 | }; |
954 | |
955 | static const char * const cri_trng_groups[] = { |
956 | "gpio161" , |
957 | }; |
958 | |
959 | static const char * const sp_cmu_groups[] = { |
960 | "gpio162" , |
961 | }; |
962 | |
963 | static const char * const prng_rosc_groups[] = { |
964 | "gpio163" , |
965 | }; |
966 | |
967 | static const char * const qup0_groups[] = { |
968 | "gpio0" , "gpio1" , "gpio2" , "gpio3" , |
969 | }; |
970 | |
971 | static const char * const gpio_groups[] = { |
972 | "gpio0" , "gpio1" , "gpio2" , "gpio3" , "gpio4" , "gpio5" , "gpio6" , "gpio7" , |
973 | "gpio8" , "gpio9" , "gpio10" , "gpio11" , "gpio12" , "gpio13" , "gpio14" , |
974 | "gpio15" , "gpio16" , "gpio17" , "gpio18" , "gpio19" , "gpio20" , "gpio21" , |
975 | "gpio22" , "gpio23" , "gpio24" , "gpio25" , "gpio26" , "gpio27" , "gpio28" , |
976 | "gpio29" , "gpio30" , "gpio31" , "gpio32" , "gpio33" , "gpio34" , "gpio35" , |
977 | "gpio36" , "gpio37" , "gpio38" , "gpio39" , "gpio40" , "gpio41" , "gpio42" , |
978 | "gpio43" , "gpio44" , "gpio45" , "gpio46" , "gpio47" , "gpio48" , "gpio49" , |
979 | "gpio50" , "gpio51" , "gpio52" , "gpio53" , "gpio54" , "gpio55" , "gpio56" , |
980 | "gpio57" , "gpio58" , "gpio59" , "gpio60" , "gpio61" , "gpio62" , "gpio63" , |
981 | "gpio64" , "gpio65" , "gpio66" , "gpio67" , "gpio68" , "gpio69" , "gpio70" , |
982 | "gpio71" , "gpio72" , "gpio73" , "gpio74" , "gpio75" , "gpio76" , "gpio77" , |
983 | "gpio78" , "gpio79" , "gpio80" , "gpio81" , "gpio82" , "gpio83" , "gpio84" , |
984 | "gpio85" , "gpio86" , "gpio87" , "gpio88" , "gpio89" , "gpio90" , "gpio91" , |
985 | "gpio92" , "gpio93" , "gpio94" , "gpio95" , "gpio96" , "gpio97" , "gpio98" , |
986 | "gpio99" , "gpio100" , "gpio101" , "gpio102" , "gpio103" , "gpio104" , |
987 | "gpio105" , "gpio106" , "gpio107" , "gpio108" , "gpio109" , "gpio110" , |
988 | "gpio111" , "gpio112" , "gpio113" , "gpio114" , "gpio115" , "gpio116" , |
989 | "gpio117" , "gpio118" , "gpio119" , "gpio120" , "gpio121" , "gpio122" , |
990 | "gpio123" , "gpio124" , "gpio125" , "gpio126" , "gpio127" , "gpio128" , |
991 | "gpio129" , "gpio130" , "gpio131" , "gpio132" , "gpio133" , "gpio134" , |
992 | "gpio135" , "gpio136" , "gpio137" , "gpio138" , "gpio139" , "gpio140" , |
993 | "gpio141" , "gpio142" , "gpio143" , "gpio144" , "gpio145" , "gpio146" , |
994 | "gpio147" , "gpio148" , "gpio149" , "gpio150" , "gpio151" , "gpio152" , |
995 | "gpio153" , "gpio154" , "gpio155" , "gpio156" , "gpio157" , "gpio158" , |
996 | "gpio159" , "gpio160" , "gpio161" , "gpio162" , "gpio163" , "gpio164" , |
997 | "gpio165" , "gpio166" , "gpio167" , "gpio168" , "gpio169" , "gpio170" , |
998 | "gpio171" , "gpio172" , "gpio173" , "gpio174" , |
999 | }; |
1000 | |
1001 | static const char * const qup6_groups[] = { |
1002 | "gpio4" , "gpio5" , "gpio6" , "gpio7" , |
1003 | }; |
1004 | |
1005 | static const char * const qup_l6_groups[] = { |
1006 | "gpio6" , "gpio34" , "gpio97" , "gpio123" , |
1007 | }; |
1008 | |
1009 | static const char * const qup_l5_groups[] = { |
1010 | "gpio7" , "gpio33" , "gpio82" , "gpio96" , |
1011 | }; |
1012 | |
1013 | static const char * const mdp_vsync_groups[] = { |
1014 | "gpio8" , "gpio9" , "gpio10" , "gpio81" , "gpio82" , |
1015 | }; |
1016 | |
1017 | static const char * const edp_lcd_groups[] = { |
1018 | "gpio9" , |
1019 | }; |
1020 | |
1021 | static const char * const qup10_groups[] = { |
1022 | "gpio9" , "gpio10" , "gpio11" , "gpio12" , |
1023 | }; |
1024 | |
1025 | static const char * const m_voc_groups[] = { |
1026 | "gpio10" , |
1027 | }; |
1028 | |
1029 | static const char * const edp_hot_groups[] = { |
1030 | "gpio10" , |
1031 | }; |
1032 | |
1033 | static const char * const cam_mclk_groups[] = { |
1034 | "gpio13" , "gpio14" , "gpio15" , "gpio16" , |
1035 | }; |
1036 | |
1037 | static const char * const qdss_groups[] = { |
1038 | "gpio13" , "gpio14" , "gpio15" , "gpio16" , "gpio17" , |
1039 | "gpio18" , "gpio19" , "gpio20" , "gpio21" , "gpio22" , |
1040 | "gpio23" , "gpio24" , "gpio25" , "gpio26" , "gpio27" , |
1041 | "gpio28" , "gpio29" , "gpio30" , "gpio31" , "gpio32" , |
1042 | "gpio33" , "gpio39" , "gpio40" , "gpio41" , "gpio42" , |
1043 | "gpio47" , "gpio48" , "gpio83" , "gpio117" , "gpio118" , |
1044 | "gpio119" , "gpio120" , "gpio121" , "gpio132" , |
1045 | "gpio133" , "gpio134" , |
1046 | }; |
1047 | |
1048 | static const char * const cci_i2c_groups[] = { |
1049 | "gpio17" , "gpio18" , "gpio19" , "gpio20" , "gpio31" , "gpio32" , "gpio33" , |
1050 | "gpio34" , |
1051 | }; |
1052 | |
1053 | static const char * const cci_timer0_groups[] = { |
1054 | "gpio21" , |
1055 | }; |
1056 | |
1057 | static const char * const gcc_gp2_groups[] = { |
1058 | "gpio21" , "gpio137" , |
1059 | }; |
1060 | |
1061 | static const char * const cci_timer1_groups[] = { |
1062 | "gpio22" , |
1063 | }; |
1064 | |
1065 | static const char * const gcc_gp3_groups[] = { |
1066 | "gpio22" , "gpio138" , |
1067 | }; |
1068 | |
1069 | static const char * const cci_timer2_groups[] = { |
1070 | "gpio23" , |
1071 | }; |
1072 | |
1073 | static const char * const qup18_groups[] = { |
1074 | "gpio23" , "gpio24" , "gpio25" , "gpio26" , |
1075 | }; |
1076 | |
1077 | static const char * const cci_timer3_groups[] = { |
1078 | "gpio24" , |
1079 | }; |
1080 | |
1081 | static const char * const cci_async_groups[] = { |
1082 | "gpio24" , "gpio25" , "gpio26" , |
1083 | }; |
1084 | |
1085 | static const char * const cci_timer4_groups[] = { |
1086 | "gpio25" , |
1087 | }; |
1088 | |
1089 | static const char * const qup15_groups[] = { |
1090 | "gpio27" , "gpio28" , "gpio29" , "gpio30" , |
1091 | }; |
1092 | |
1093 | static const char * const pci_e0_groups[] = { |
1094 | "gpio35" , "gpio36" , |
1095 | }; |
1096 | |
1097 | static const char * const qup_l4_groups[] = { |
1098 | "gpio37" , "gpio59" , "gpio81" , "gpio95" , |
1099 | }; |
1100 | |
1101 | static const char * const agera_pll_groups[] = { |
1102 | "gpio37" , |
1103 | }; |
1104 | |
1105 | static const char * const usb_phy_groups[] = { |
1106 | "gpio38" , |
1107 | }; |
1108 | |
1109 | static const char * const qup9_groups[] = { |
1110 | "gpio39" , "gpio40" , "gpio41" , "gpio42" , |
1111 | }; |
1112 | |
1113 | static const char * const qup13_groups[] = { |
1114 | "gpio43" , "gpio44" , "gpio45" , "gpio46" , |
1115 | }; |
1116 | |
1117 | static const char * const qdss_cti_groups[] = { |
1118 | "gpio45" , "gpio46" , "gpio49" , "gpio50" , "gpio56" , "gpio57" , "gpio58" , |
1119 | "gpio58" , |
1120 | }; |
1121 | |
1122 | static const char * const qup14_groups[] = { |
1123 | "gpio47" , "gpio48" , "gpio49" , "gpio50" , |
1124 | }; |
1125 | |
1126 | static const char * const qup4_groups[] = { |
1127 | "gpio51" , "gpio52" , "gpio53" , "gpio54" , |
1128 | }; |
1129 | |
1130 | static const char * const qup17_groups[] = { |
1131 | "gpio55" , "gpio56" , "gpio57" , "gpio58" , |
1132 | }; |
1133 | |
1134 | static const char * const qup19_groups[] = { |
1135 | "gpio55" , "gpio56" , "gpio57" , "gpio58" , |
1136 | }; |
1137 | |
1138 | static const char * const atest_char_groups[] = { |
1139 | "gpio59" , |
1140 | }; |
1141 | |
1142 | static const char * const nav_pps_groups[] = { |
1143 | "gpio60" , "gpio60" , "gpio76" , "gpio76" , "gpio77" , "gpio77" , "gpio81" , |
1144 | "gpio81" , "gpio82" , "gpio82" , |
1145 | }; |
1146 | |
1147 | static const char * const atest_usb2_groups[] = { |
1148 | "gpio60" , |
1149 | }; |
1150 | |
1151 | static const char * const qlink_request_groups[] = { |
1152 | "gpio61" , |
1153 | }; |
1154 | |
1155 | static const char * const qlink_enable_groups[] = { |
1156 | "gpio62" , |
1157 | }; |
1158 | |
1159 | static const char * const wmss_reset_groups[] = { |
1160 | "gpio63" , |
1161 | }; |
1162 | |
1163 | static const char * const atest_usb23_groups[] = { |
1164 | "gpio63" , |
1165 | }; |
1166 | |
1167 | static const char * const pa_indicator_groups[] = { |
1168 | "gpio68" , |
1169 | }; |
1170 | |
1171 | static const char * const mss_lte_groups[] = { |
1172 | "gpio69" , "gpio70" , |
1173 | }; |
1174 | |
1175 | static const struct pinfunction sm8150_functions[] = { |
1176 | MSM_PIN_FUNCTION(adsp_ext), |
1177 | MSM_PIN_FUNCTION(agera_pll), |
1178 | MSM_PIN_FUNCTION(aoss_cti), |
1179 | MSM_PIN_FUNCTION(ddr_pxi2), |
1180 | MSM_PIN_FUNCTION(atest_char), |
1181 | MSM_PIN_FUNCTION(atest_char0), |
1182 | MSM_PIN_FUNCTION(atest_char1), |
1183 | MSM_PIN_FUNCTION(atest_char2), |
1184 | MSM_PIN_FUNCTION(atest_char3), |
1185 | MSM_PIN_FUNCTION(audio_ref), |
1186 | MSM_PIN_FUNCTION(atest_usb1), |
1187 | MSM_PIN_FUNCTION(atest_usb2), |
1188 | MSM_PIN_FUNCTION(atest_usb10), |
1189 | MSM_PIN_FUNCTION(atest_usb11), |
1190 | MSM_PIN_FUNCTION(atest_usb12), |
1191 | MSM_PIN_FUNCTION(atest_usb13), |
1192 | MSM_PIN_FUNCTION(atest_usb20), |
1193 | MSM_PIN_FUNCTION(atest_usb21), |
1194 | MSM_PIN_FUNCTION(atest_usb22), |
1195 | MSM_PIN_FUNCTION(atest_usb23), |
1196 | MSM_PIN_FUNCTION(btfm_slimbus), |
1197 | MSM_PIN_FUNCTION(cam_mclk), |
1198 | MSM_PIN_FUNCTION(cci_async), |
1199 | MSM_PIN_FUNCTION(cci_i2c), |
1200 | MSM_PIN_FUNCTION(cci_timer0), |
1201 | MSM_PIN_FUNCTION(cci_timer1), |
1202 | MSM_PIN_FUNCTION(cci_timer2), |
1203 | MSM_PIN_FUNCTION(cci_timer3), |
1204 | MSM_PIN_FUNCTION(cci_timer4), |
1205 | MSM_PIN_FUNCTION(cri_trng), |
1206 | MSM_PIN_FUNCTION(cri_trng0), |
1207 | MSM_PIN_FUNCTION(cri_trng1), |
1208 | MSM_PIN_FUNCTION(dbg_out), |
1209 | MSM_PIN_FUNCTION(ddr_bist), |
1210 | MSM_PIN_FUNCTION(ddr_pxi0), |
1211 | MSM_PIN_FUNCTION(ddr_pxi1), |
1212 | MSM_PIN_FUNCTION(ddr_pxi3), |
1213 | MSM_PIN_FUNCTION(edp_hot), |
1214 | MSM_PIN_FUNCTION(edp_lcd), |
1215 | MSM_PIN_FUNCTION(emac_phy), |
1216 | MSM_PIN_FUNCTION(emac_pps), |
1217 | MSM_PIN_FUNCTION(gcc_gp1), |
1218 | MSM_PIN_FUNCTION(gcc_gp2), |
1219 | MSM_PIN_FUNCTION(gcc_gp3), |
1220 | MSM_PIN_FUNCTION(gpio), |
1221 | MSM_PIN_FUNCTION(hs1_mi2s), |
1222 | MSM_PIN_FUNCTION(hs2_mi2s), |
1223 | MSM_PIN_FUNCTION(hs3_mi2s), |
1224 | MSM_PIN_FUNCTION(jitter_bist), |
1225 | MSM_PIN_FUNCTION(lpass_slimbus), |
1226 | MSM_PIN_FUNCTION(mdp_vsync), |
1227 | MSM_PIN_FUNCTION(mdp_vsync0), |
1228 | MSM_PIN_FUNCTION(mdp_vsync1), |
1229 | MSM_PIN_FUNCTION(mdp_vsync2), |
1230 | MSM_PIN_FUNCTION(mdp_vsync3), |
1231 | MSM_PIN_FUNCTION(mss_lte), |
1232 | MSM_PIN_FUNCTION(m_voc), |
1233 | MSM_PIN_FUNCTION(nav_pps), |
1234 | MSM_PIN_FUNCTION(pa_indicator), |
1235 | MSM_PIN_FUNCTION(pci_e0), |
1236 | MSM_PIN_FUNCTION(phase_flag), |
1237 | MSM_PIN_FUNCTION(pll_bypassnl), |
1238 | MSM_PIN_FUNCTION(pll_bist), |
1239 | MSM_PIN_FUNCTION(pci_e1), |
1240 | MSM_PIN_FUNCTION(pll_reset), |
1241 | MSM_PIN_FUNCTION(pri_mi2s), |
1242 | MSM_PIN_FUNCTION(pri_mi2s_ws), |
1243 | MSM_PIN_FUNCTION(prng_rosc), |
1244 | MSM_PIN_FUNCTION(qdss), |
1245 | MSM_PIN_FUNCTION(qdss_cti), |
1246 | MSM_PIN_FUNCTION(qlink_request), |
1247 | MSM_PIN_FUNCTION(qlink_enable), |
1248 | MSM_PIN_FUNCTION(qspi0), |
1249 | MSM_PIN_FUNCTION(qspi1), |
1250 | MSM_PIN_FUNCTION(qspi2), |
1251 | MSM_PIN_FUNCTION(qspi3), |
1252 | MSM_PIN_FUNCTION(qspi_clk), |
1253 | MSM_PIN_FUNCTION(qspi_cs), |
1254 | MSM_PIN_FUNCTION(qua_mi2s), |
1255 | MSM_PIN_FUNCTION(qup0), |
1256 | MSM_PIN_FUNCTION(qup1), |
1257 | MSM_PIN_FUNCTION(qup2), |
1258 | MSM_PIN_FUNCTION(qup3), |
1259 | MSM_PIN_FUNCTION(qup4), |
1260 | MSM_PIN_FUNCTION(qup5), |
1261 | MSM_PIN_FUNCTION(qup6), |
1262 | MSM_PIN_FUNCTION(qup7), |
1263 | MSM_PIN_FUNCTION(qup8), |
1264 | MSM_PIN_FUNCTION(qup9), |
1265 | MSM_PIN_FUNCTION(qup10), |
1266 | MSM_PIN_FUNCTION(qup11), |
1267 | MSM_PIN_FUNCTION(qup12), |
1268 | MSM_PIN_FUNCTION(qup13), |
1269 | MSM_PIN_FUNCTION(qup14), |
1270 | MSM_PIN_FUNCTION(qup15), |
1271 | MSM_PIN_FUNCTION(qup16), |
1272 | MSM_PIN_FUNCTION(qup17), |
1273 | MSM_PIN_FUNCTION(qup18), |
1274 | MSM_PIN_FUNCTION(qup19), |
1275 | MSM_PIN_FUNCTION(qup_l4), |
1276 | MSM_PIN_FUNCTION(qup_l5), |
1277 | MSM_PIN_FUNCTION(qup_l6), |
1278 | MSM_PIN_FUNCTION(rgmii), |
1279 | MSM_PIN_FUNCTION(sdc4), |
1280 | MSM_PIN_FUNCTION(sd_write), |
1281 | MSM_PIN_FUNCTION(sec_mi2s), |
1282 | MSM_PIN_FUNCTION(spkr_i2s), |
1283 | MSM_PIN_FUNCTION(sp_cmu), |
1284 | MSM_PIN_FUNCTION(ter_mi2s), |
1285 | MSM_PIN_FUNCTION(tgu_ch0), |
1286 | MSM_PIN_FUNCTION(tgu_ch1), |
1287 | MSM_PIN_FUNCTION(tgu_ch2), |
1288 | MSM_PIN_FUNCTION(tgu_ch3), |
1289 | MSM_PIN_FUNCTION(tsense_pwm1), |
1290 | MSM_PIN_FUNCTION(tsense_pwm2), |
1291 | MSM_PIN_FUNCTION(tsif1), |
1292 | MSM_PIN_FUNCTION(tsif2), |
1293 | MSM_PIN_FUNCTION(uim1), |
1294 | MSM_PIN_FUNCTION(uim2), |
1295 | MSM_PIN_FUNCTION(uim_batt), |
1296 | MSM_PIN_FUNCTION(usb2phy_ac), |
1297 | MSM_PIN_FUNCTION(usb_phy), |
1298 | MSM_PIN_FUNCTION(vfr_1), |
1299 | MSM_PIN_FUNCTION(vsense_trigger), |
1300 | MSM_PIN_FUNCTION(wlan1_adc0), |
1301 | MSM_PIN_FUNCTION(wlan1_adc1), |
1302 | MSM_PIN_FUNCTION(wlan2_adc0), |
1303 | MSM_PIN_FUNCTION(wlan2_adc1), |
1304 | MSM_PIN_FUNCTION(wmss_reset), |
1305 | }; |
1306 | |
1307 | /* |
1308 | * Every pin is maintained as a single group, and missing or non-existing pin |
1309 | * would be maintained as dummy group to synchronize pin group index with |
1310 | * pin descriptor registered with pinctrl core. |
1311 | * Clients would not be able to request these dummy pin groups. |
1312 | */ |
1313 | static const struct msm_pingroup sm8150_groups[] = { |
1314 | [0] = PINGROUP(0, SOUTH, qup0, _, _, _, _, _, _, _, _), |
1315 | [1] = PINGROUP(1, SOUTH, qup0, _, _, _, _, _, _, _, _), |
1316 | [2] = PINGROUP(2, SOUTH, qup0, _, _, _, _, _, _, _, _), |
1317 | [3] = PINGROUP(3, SOUTH, qup0, _, _, _, _, _, _, _, _), |
1318 | [4] = PINGROUP(4, SOUTH, qup6, rgmii, _, _, _, _, _, _, _), |
1319 | [5] = PINGROUP(5, SOUTH, qup6, rgmii, _, _, _, _, _, _, _), |
1320 | [6] = PINGROUP(6, SOUTH, qup6, rgmii, qup_l6, _, _, _, _, _, _), |
1321 | [7] = PINGROUP(7, SOUTH, qup6, rgmii, qup_l5, _, _, _, _, _, _), |
1322 | [8] = PINGROUP(8, NORTH, mdp_vsync, _, _, _, _, _, _, _, _), |
1323 | [9] = PINGROUP(9, NORTH, mdp_vsync, edp_lcd, qup10, _, _, _, _, _, _), |
1324 | [10] = PINGROUP(10, NORTH, mdp_vsync, m_voc, edp_hot, qup10, _, _, _, _, _), |
1325 | [11] = PINGROUP(11, NORTH, qup10, _, _, _, _, _, _, _, _), |
1326 | [12] = PINGROUP(12, NORTH, qup10, _, _, _, _, _, _, _, _), |
1327 | [13] = PINGROUP(13, NORTH, cam_mclk, qdss, _, _, _, _, _, _, _), |
1328 | [14] = PINGROUP(14, NORTH, cam_mclk, qdss, _, _, _, _, _, _, _), |
1329 | [15] = PINGROUP(15, NORTH, cam_mclk, qdss, _, _, _, _, _, _, _), |
1330 | [16] = PINGROUP(16, NORTH, cam_mclk, qdss, _, _, _, _, _, _, _), |
1331 | [17] = PINGROUP(17, NORTH, cci_i2c, qdss, _, _, _, _, _, _, _), |
1332 | [18] = PINGROUP(18, NORTH, cci_i2c, phase_flag, _, qdss, _, _, _, _, _), |
1333 | [19] = PINGROUP(19, NORTH, cci_i2c, phase_flag, _, qdss, _, _, _, _, _), |
1334 | [20] = PINGROUP(20, NORTH, cci_i2c, phase_flag, _, qdss, _, _, _, _, _), |
1335 | [21] = PINGROUP(21, EAST, cci_timer0, gcc_gp2, qdss, _, _, _, _, _, _), |
1336 | [22] = PINGROUP(22, EAST, cci_timer1, gcc_gp3, qdss, _, _, _, _, _, _), |
1337 | [23] = PINGROUP(23, EAST, cci_timer2, qup18, qdss, _, _, _, _, _, _), |
1338 | [24] = PINGROUP(24, EAST, cci_timer3, cci_async, qup18, qdss, _, _, _, _, _), |
1339 | [25] = PINGROUP(25, EAST, cci_timer4, cci_async, qup18, qdss, _, _, _, _, _), |
1340 | [26] = PINGROUP(26, EAST, cci_async, qup18, qdss, _, _, _, _, _, _), |
1341 | [27] = PINGROUP(27, EAST, qup15, _, qdss, _, _, _, _, _, _), |
1342 | [28] = PINGROUP(28, EAST, qup15, qdss, _, _, _, _, _, _, _), |
1343 | [29] = PINGROUP(29, EAST, qup15, qdss, _, _, _, _, _, _, _), |
1344 | [30] = PINGROUP(30, EAST, qup15, qdss, _, _, _, _, _, _, _), |
1345 | [31] = PINGROUP(31, NORTH, cci_i2c, qdss, _, _, _, _, _, _, _), |
1346 | [32] = PINGROUP(32, NORTH, cci_i2c, qdss, _, _, _, _, _, _, _), |
1347 | [33] = PINGROUP(33, NORTH, cci_i2c, qup_l5, qdss, _, _, _, _, _, _), |
1348 | [34] = PINGROUP(34, NORTH, cci_i2c, qup_l6, _, _, _, _, _, _, _), |
1349 | [35] = PINGROUP(35, NORTH, pci_e0, _, _, _, _, _, _, _, _), |
1350 | [36] = PINGROUP(36, NORTH, pci_e0, _, _, _, _, _, _, _, _), |
1351 | [37] = PINGROUP(37, NORTH, qup_l4, agera_pll, _, _, _, _, _, _, _), |
1352 | [38] = PINGROUP(38, SOUTH, usb_phy, _, _, _, _, _, _, _, _), |
1353 | [39] = PINGROUP(39, NORTH, qup9, qdss, _, _, _, _, _, _, _), |
1354 | [40] = PINGROUP(40, NORTH, qup9, qdss, _, _, _, _, _, _, _), |
1355 | [41] = PINGROUP(41, NORTH, qup9, qdss, _, _, _, _, _, _, _), |
1356 | [42] = PINGROUP(42, NORTH, qup9, qdss, _, _, _, _, _, _, _), |
1357 | [43] = PINGROUP(43, EAST, qup13, _, _, _, _, _, _, _, _), |
1358 | [44] = PINGROUP(44, EAST, qup13, _, _, _, _, _, _, _, _), |
1359 | [45] = PINGROUP(45, EAST, qup13, qdss_cti, _, _, _, _, _, _, _), |
1360 | [46] = PINGROUP(46, EAST, qup13, qdss_cti, _, _, _, _, _, _, _), |
1361 | [47] = PINGROUP(47, EAST, qup14, qdss, _, _, _, _, _, _, _), |
1362 | [48] = PINGROUP(48, EAST, qup14, qdss, _, _, _, _, _, _, _), |
1363 | [49] = PINGROUP(49, EAST, qup14, _, qdss_cti, _, _, _, _, _, _), |
1364 | [50] = PINGROUP(50, EAST, qup14, qdss_cti, _, _, _, _, _, _, _), |
1365 | [51] = PINGROUP(51, SOUTH, qup4, _, _, _, _, _, _, _, _), |
1366 | [52] = PINGROUP(52, SOUTH, qup4, _, _, _, _, _, _, _, _), |
1367 | [53] = PINGROUP(53, SOUTH, qup4, _, _, _, _, _, _, _, _), |
1368 | [54] = PINGROUP(54, SOUTH, qup4, _, _, _, _, _, _, _, _), |
1369 | [55] = PINGROUP(55, SOUTH, qup17, qup19, phase_flag, _, _, _, _, _, _), |
1370 | [56] = PINGROUP(56, SOUTH, qup17, qup19, qdss_cti, phase_flag, _, _, _, _, _), |
1371 | [57] = PINGROUP(57, SOUTH, qup17, qup19, qdss_cti, phase_flag, _, _, _, _, _), |
1372 | [58] = PINGROUP(58, SOUTH, qup17, qup19, qdss_cti, phase_flag, _, _, _, _, _), |
1373 | [59] = PINGROUP(59, SOUTH, rgmii, qup_l4, phase_flag, _, atest_char, _, _, _, _), |
1374 | [60] = PINGROUP(60, SOUTH, _, nav_pps, nav_pps, atest_usb2, _, _, _, _, _), |
1375 | [61] = PINGROUP(61, SOUTH, qlink_request, _, _, _, _, _, _, _, _), |
1376 | [62] = PINGROUP(62, SOUTH, qlink_enable, _, _, _, _, _, _, _, _), |
1377 | [63] = PINGROUP(63, SOUTH, wmss_reset, atest_usb23, _, _, _, _, _, _, _), |
1378 | [64] = PINGROUP(64, SOUTH, _, phase_flag, _, _, _, _, _, _, _), |
1379 | [65] = PINGROUP(65, SOUTH, _, _, _, _, _, _, _, _, _), |
1380 | [66] = PINGROUP(66, SOUTH, _, _, _, _, _, _, _, _, _), |
1381 | [67] = PINGROUP(67, SOUTH, _, _, _, _, _, _, _, _, _), |
1382 | [68] = PINGROUP(68, SOUTH, _, pa_indicator, phase_flag, _, _, _, _, _, _), |
1383 | [69] = PINGROUP(69, SOUTH, mss_lte, _, _, _, _, _, _, _, _), |
1384 | [70] = PINGROUP(70, SOUTH, mss_lte, _, _, _, _, _, _, _, _), |
1385 | [71] = PINGROUP(71, SOUTH, _, _, _, _, _, _, _, _, _), |
1386 | [72] = PINGROUP(72, SOUTH, _, _, _, _, _, _, _, _, _), |
1387 | [73] = PINGROUP(73, SOUTH, _, _, _, _, _, _, _, _, _), |
1388 | [74] = PINGROUP(74, SOUTH, _, _, _, _, _, _, _, _, _), |
1389 | [75] = PINGROUP(75, SOUTH, _, _, _, _, _, _, _, _, _), |
1390 | [76] = PINGROUP(76, SOUTH, _, _, _, nav_pps, nav_pps, phase_flag, _, _, _), |
1391 | [77] = PINGROUP(77, SOUTH, _, _, _, nav_pps, nav_pps, _, _, _, _), |
1392 | [78] = PINGROUP(78, SOUTH, _, _, _, _, _, _, _, _, _), |
1393 | [79] = PINGROUP(79, SOUTH, _, _, phase_flag, _, _, _, _, _, _), |
1394 | [80] = PINGROUP(80, SOUTH, _, _, phase_flag, _, _, _, _, _, _), |
1395 | [81] = PINGROUP(81, SOUTH, _, _, _, nav_pps, nav_pps, qup_l4, mdp_vsync, emac_pps, _), |
1396 | [82] = PINGROUP(82, SOUTH, _, _, _, nav_pps, nav_pps, qup_l5, mdp_vsync, _, _), |
1397 | [83] = PINGROUP(83, NORTH, qup12, qup16, _, qdss, _, _, _, _, _), |
1398 | [84] = PINGROUP(84, NORTH, qup12, qup16, _, _, _, _, _, _, _), |
1399 | [85] = PINGROUP(85, NORTH, qup12, qup16, _, _, _, _, _, _, _), |
1400 | [86] = PINGROUP(86, NORTH, qup12, qup16, _, _, _, _, _, _, _), |
1401 | [87] = PINGROUP(87, EAST, _, _, _, _, _, _, _, _, _), |
1402 | [88] = PINGROUP(88, NORTH, tsif1, qup8, qspi_cs, tgu_ch3, _, _, _, _, _), |
1403 | [89] = PINGROUP(89, NORTH, tsif1, qup8, qspi0, mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, tgu_ch0, _), |
1404 | [90] = PINGROUP(90, NORTH, tsif1, qup8, qspi1, sdc4, phase_flag, tgu_ch1, _, _, wlan1_adc1), |
1405 | [91] = PINGROUP(91, NORTH, tsif1, qup8, qspi2, sdc4, vfr_1, phase_flag, tgu_ch2, _, _), |
1406 | [92] = PINGROUP(92, NORTH, tsif2, qup11, qspi_clk, sdc4, phase_flag, _, wlan2_adc1, _, _), |
1407 | [93] = PINGROUP(93, NORTH, tsif2, qup11, qspi3, sdc4, phase_flag, _, wlan2_adc0, _, _), |
1408 | [94] = PINGROUP(94, NORTH, tsif2, qup11, qspi_cs, sdc4, phase_flag, _, _, _, _), |
1409 | [95] = PINGROUP(95, NORTH, tsif2, qup11, sdc4, qup_l4, _, _, _, _, _), |
1410 | [96] = PINGROUP(96, NORTH, tsif2, qup_l5, phase_flag, _, _, _, _, _, _), |
1411 | [97] = PINGROUP(97, NORTH, sd_write, tsif1, qup_l6, _, _, _, _, _, _), |
1412 | [98] = PINGROUP(98, SOUTH, qup7, ddr_bist, ddr_pxi3, _, _, _, _, _, _), |
1413 | [99] = PINGROUP(99, SOUTH, qup7, ddr_bist, atest_usb13, ddr_pxi1, _, _, _, _, _), |
1414 | [100] = PINGROUP(100, SOUTH, qup7, pll_bypassnl, atest_usb12, ddr_pxi1, _, _, _, _, _), |
1415 | [101] = PINGROUP(101, SOUTH, qup7, pll_reset, ddr_pxi3, _, _, _, _, _, _), |
1416 | [102] = PINGROUP(102, NORTH, pci_e1, _, _, _, _, _, _, _, _), |
1417 | [103] = PINGROUP(103, NORTH, pci_e1, _, _, _, _, _, _, _, _), |
1418 | [104] = PINGROUP(104, NORTH, _, _, _, _, _, _, _, _, _), |
1419 | [105] = PINGROUP(105, WEST, uim2, _, _, _, _, _, _, _, _), |
1420 | [106] = PINGROUP(106, WEST, uim2, _, _, _, _, _, _, _, _), |
1421 | [107] = PINGROUP(107, WEST, uim2, _, _, _, _, _, _, _, _), |
1422 | [108] = PINGROUP(108, WEST, uim2, _, _, _, _, _, _, _, _), |
1423 | [109] = PINGROUP(109, WEST, uim1, _, _, _, _, _, _, _, _), |
1424 | [110] = PINGROUP(110, WEST, uim1, _, _, _, _, _, _, _, _), |
1425 | [111] = PINGROUP(111, WEST, uim1, _, _, _, _, _, _, _, _), |
1426 | [112] = PINGROUP(112, WEST, uim1, _, _, _, _, _, _, _, _), |
1427 | [113] = PINGROUP(113, WEST, uim_batt, usb2phy_ac, aoss_cti, _, _, _, _, _, _), |
1428 | [114] = PINGROUP(114, SOUTH, qup1, rgmii, phase_flag, _, _, _, _, _, _), |
1429 | [115] = PINGROUP(115, SOUTH, qup1, rgmii, phase_flag, adsp_ext, _, _, _, _, _), |
1430 | [116] = PINGROUP(116, SOUTH, qup1, rgmii, phase_flag, _, _, _, _, _, _), |
1431 | [117] = PINGROUP(117, SOUTH, qup1, rgmii, phase_flag, _, qdss, _, _, _, _), |
1432 | [118] = PINGROUP(118, SOUTH, rgmii, phase_flag, _, qdss, _, _, _, _, _), |
1433 | [119] = PINGROUP(119, SOUTH, qup5, rgmii, phase_flag, _, qdss, _, _, _, _), |
1434 | [120] = PINGROUP(120, SOUTH, qup5, rgmii, phase_flag, _, qdss, _, _, _, _), |
1435 | [121] = PINGROUP(121, SOUTH, qup5, rgmii, phase_flag, _, qdss, _, _, _, _), |
1436 | [122] = PINGROUP(122, SOUTH, qup5, rgmii, phase_flag, _, _, _, _, _, _), |
1437 | [123] = PINGROUP(123, SOUTH, usb2phy_ac, qup_l6, atest_usb22, _, _, _, _, _, _), |
1438 | [124] = PINGROUP(124, SOUTH, emac_phy, _, _, _, _, _, _, _, _), |
1439 | [125] = PINGROUP(125, WEST, hs3_mi2s, _, _, _, _, _, _, _, _), |
1440 | [126] = PINGROUP(126, SOUTH, sec_mi2s, qup2, phase_flag, _, _, _, _, _, _), |
1441 | [127] = PINGROUP(127, SOUTH, sec_mi2s, qup2, phase_flag, _, _, _, _, _, _), |
1442 | [128] = PINGROUP(128, SOUTH, sec_mi2s, qup2, phase_flag, _, _, _, _, _, _), |
1443 | [129] = PINGROUP(129, SOUTH, sec_mi2s, qup2, jitter_bist, atest_usb21, _, _, _, _, _), |
1444 | [130] = PINGROUP(130, SOUTH, sec_mi2s, pll_bist, atest_usb20, atest_char0, _, _, _, _, _), |
1445 | [131] = PINGROUP(131, SOUTH, ter_mi2s, gcc_gp1, _, _, _, _, _, _, _), |
1446 | [132] = PINGROUP(132, SOUTH, ter_mi2s, _, qdss, _, _, _, _, _, _), |
1447 | [133] = PINGROUP(133, SOUTH, ter_mi2s, qdss, atest_char1, _, _, _, _, _, _), |
1448 | [134] = PINGROUP(134, SOUTH, ter_mi2s, qdss, atest_char2, _, _, _, _, _, _), |
1449 | [135] = PINGROUP(135, SOUTH, ter_mi2s, atest_char3, _, _, _, _, _, _, _), |
1450 | [136] = PINGROUP(136, SOUTH, qua_mi2s, gcc_gp1, _, _, _, _, _, _, _), |
1451 | [137] = PINGROUP(137, SOUTH, qua_mi2s, gcc_gp2, _, _, _, _, _, _, _), |
1452 | [138] = PINGROUP(138, SOUTH, qua_mi2s, gcc_gp3, _, _, _, _, _, _, _), |
1453 | [139] = PINGROUP(139, SOUTH, qua_mi2s, _, _, _, _, _, _, _, _), |
1454 | [140] = PINGROUP(140, SOUTH, qua_mi2s, _, _, _, _, _, _, _, _), |
1455 | [141] = PINGROUP(141, SOUTH, qua_mi2s, _, _, _, _, _, _, _, _), |
1456 | [142] = PINGROUP(142, SOUTH, qua_mi2s, _, _, _, _, _, _, _, _), |
1457 | [143] = PINGROUP(143, SOUTH, pri_mi2s, _, _, _, _, _, _, _, _), |
1458 | [144] = PINGROUP(144, SOUTH, pri_mi2s, qup3, phase_flag, _, ddr_pxi0, _, _, _, _), |
1459 | [145] = PINGROUP(145, SOUTH, pri_mi2s_ws, qup3, phase_flag, ddr_bist, _, vsense_trigger, atest_usb1, ddr_pxi0, _), |
1460 | [146] = PINGROUP(146, SOUTH, pri_mi2s, qup3, ddr_bist, atest_usb11, ddr_pxi2, _, _, _, _), |
1461 | [147] = PINGROUP(147, SOUTH, pri_mi2s, qup3, dbg_out, atest_usb10, ddr_pxi2, _, _, _, _), |
1462 | [148] = PINGROUP(148, SOUTH, spkr_i2s, audio_ref, _, _, _, _, _, _, _), |
1463 | [149] = PINGROUP(149, SOUTH, lpass_slimbus, spkr_i2s, _, _, _, _, _, _, _), |
1464 | [150] = PINGROUP(150, SOUTH, lpass_slimbus, spkr_i2s, tsense_pwm1, tsense_pwm2, _, _, _, _, _), |
1465 | [151] = PINGROUP(151, SOUTH, lpass_slimbus, spkr_i2s, _, _, _, _, _, _, _), |
1466 | [152] = PINGROUP(152, SOUTH, lpass_slimbus, spkr_i2s, _, _, _, _, _, _, _), |
1467 | [153] = PINGROUP(153, SOUTH, btfm_slimbus, _, _, _, _, _, _, _, _), |
1468 | [154] = PINGROUP(154, SOUTH, btfm_slimbus, _, _, _, _, _, _, _, _), |
1469 | [155] = PINGROUP(155, WEST, hs1_mi2s, _, _, _, _, _, _, _, _), |
1470 | [156] = PINGROUP(156, WEST, hs1_mi2s, _, _, _, _, _, _, _, _), |
1471 | [157] = PINGROUP(157, WEST, hs1_mi2s, _, _, _, _, _, _, _, _), |
1472 | [158] = PINGROUP(158, WEST, hs1_mi2s, _, _, _, _, _, _, _, _), |
1473 | [159] = PINGROUP(159, WEST, hs1_mi2s, cri_trng0, _, _, _, _, _, _, _), |
1474 | [160] = PINGROUP(160, WEST, hs2_mi2s, cri_trng1, _, _, _, _, _, _, _), |
1475 | [161] = PINGROUP(161, WEST, hs2_mi2s, cri_trng, _, _, _, _, _, _, _), |
1476 | [162] = PINGROUP(162, WEST, hs2_mi2s, sp_cmu, _, _, _, _, _, _, _), |
1477 | [163] = PINGROUP(163, WEST, hs2_mi2s, prng_rosc, _, _, _, _, _, _, _), |
1478 | [164] = PINGROUP(164, WEST, hs2_mi2s, _, _, _, _, _, _, _, _), |
1479 | [165] = PINGROUP(165, WEST, hs3_mi2s, _, _, _, _, _, _, _, _), |
1480 | [166] = PINGROUP(166, WEST, hs3_mi2s, _, _, _, _, _, _, _, _), |
1481 | [167] = PINGROUP(167, WEST, hs3_mi2s, _, _, _, _, _, _, _, _), |
1482 | [168] = PINGROUP(168, WEST, hs3_mi2s, _, _, _, _, _, _, _, _), |
1483 | [169] = PINGROUP(169, NORTH, _, _, _, _, _, _, _, _, _), |
1484 | [170] = PINGROUP(170, NORTH, _, _, _, _, _, _, _, _, _), |
1485 | [171] = PINGROUP(171, NORTH, _, _, _, _, _, _, _, _, _), |
1486 | [172] = PINGROUP(172, NORTH, _, _, _, _, _, _, _, _, _), |
1487 | [173] = PINGROUP(173, NORTH, _, _, _, _, _, _, _, _, _), |
1488 | [174] = PINGROUP(174, NORTH, _, _, _, _, _, _, _, _, _), |
1489 | [175] = UFS_RESET(ufs_reset, 0xB6000), |
1490 | [176] = SDC_QDSD_PINGROUP(sdc2_clk, 0xB2000, 14, 6), |
1491 | [177] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xB2000, 11, 3), |
1492 | [178] = SDC_QDSD_PINGROUP(sdc2_data, 0xB2000, 9, 0), |
1493 | }; |
1494 | |
1495 | static const struct msm_gpio_wakeirq_map sm8150_pdc_map[] = { |
1496 | { 3, 31 }, { 5, 32 }, { 8, 33 }, { 9, 34 }, { 10, 100 }, |
1497 | { 12, 104 }, { 24, 37 }, { 26, 38 }, { 27, 41 }, { 28, 42 }, |
1498 | { 30, 39 }, { 36, 43 }, { 37, 44 }, { 38, 30 }, { 39, 118 }, |
1499 | { 39, 125 }, { 41, 47 }, { 42, 48 }, { 46, 50 }, { 47, 49 }, |
1500 | { 48, 51 }, { 49, 53 }, { 50, 52 }, { 51, 116 }, { 51, 123 }, |
1501 | { 53, 54 }, { 54, 55 }, { 55, 56 }, { 56, 57 }, { 58, 58 }, |
1502 | { 60, 60 }, { 61, 61 }, { 68, 62 }, { 70, 63 }, { 76, 71 }, |
1503 | { 77, 66 }, { 81, 64 }, { 83, 65 }, { 86, 67 }, { 87, 84 }, |
1504 | { 88, 117 }, { 88, 124 }, { 90, 69 }, { 91, 70 }, { 93, 75 }, |
1505 | { 95, 72 }, { 96, 73 }, { 97, 74 }, { 101, 40 }, { 103, 77 }, |
1506 | { 104, 78 }, { 108, 79 }, { 112, 80 }, { 113, 81 }, { 114, 82 }, |
1507 | { 117, 85 }, { 118, 101 }, { 119, 87 }, { 120, 88 }, { 121, 89 }, |
1508 | { 122, 90 }, { 123, 91 }, { 124, 92 }, { 125, 93 }, { 129, 94 }, |
1509 | { 132, 105 }, { 133, 83 }, { 134, 36 }, { 136, 97 }, { 142, 103 }, |
1510 | { 144, 115 }, { 144, 122 }, { 147, 102 }, { 150, 107 }, |
1511 | { 152, 108 }, { 153, 109 } |
1512 | }; |
1513 | |
1514 | static const struct msm_pinctrl_soc_data sm8150_pinctrl = { |
1515 | .pins = sm8150_pins, |
1516 | .npins = ARRAY_SIZE(sm8150_pins), |
1517 | .functions = sm8150_functions, |
1518 | .nfunctions = ARRAY_SIZE(sm8150_functions), |
1519 | .groups = sm8150_groups, |
1520 | .ngroups = ARRAY_SIZE(sm8150_groups), |
1521 | .ngpios = 176, |
1522 | .tiles = sm8150_tiles, |
1523 | .ntiles = ARRAY_SIZE(sm8150_tiles), |
1524 | .wakeirq_map = sm8150_pdc_map, |
1525 | .nwakeirq_map = ARRAY_SIZE(sm8150_pdc_map), |
1526 | .wakeirq_dual_edge_errata = true, |
1527 | }; |
1528 | |
1529 | static int sm8150_pinctrl_probe(struct platform_device *pdev) |
1530 | { |
1531 | return msm_pinctrl_probe(pdev, soc_data: &sm8150_pinctrl); |
1532 | } |
1533 | |
1534 | static const struct of_device_id sm8150_pinctrl_of_match[] = { |
1535 | { .compatible = "qcom,sm8150-pinctrl" , }, |
1536 | { }, |
1537 | }; |
1538 | |
1539 | static struct platform_driver sm8150_pinctrl_driver = { |
1540 | .driver = { |
1541 | .name = "sm8150-pinctrl" , |
1542 | .of_match_table = sm8150_pinctrl_of_match, |
1543 | }, |
1544 | .probe = sm8150_pinctrl_probe, |
1545 | .remove_new = msm_pinctrl_remove, |
1546 | }; |
1547 | |
1548 | static int __init sm8150_pinctrl_init(void) |
1549 | { |
1550 | return platform_driver_register(&sm8150_pinctrl_driver); |
1551 | } |
1552 | arch_initcall(sm8150_pinctrl_init); |
1553 | |
1554 | static void __exit sm8150_pinctrl_exit(void) |
1555 | { |
1556 | platform_driver_unregister(&sm8150_pinctrl_driver); |
1557 | } |
1558 | module_exit(sm8150_pinctrl_exit); |
1559 | |
1560 | MODULE_DESCRIPTION("QTI sm8150 pinctrl driver" ); |
1561 | MODULE_LICENSE("GPL v2" ); |
1562 | MODULE_DEVICE_TABLE(of, sm8150_pinctrl_of_match); |
1563 | |