1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. |
4 | * Copyright (c) 2020-2021, Linaro Limited |
5 | */ |
6 | |
7 | #include <linux/module.h> |
8 | #include <linux/of.h> |
9 | #include <linux/platform_device.h> |
10 | |
11 | #include "pinctrl-msm.h" |
12 | |
13 | #define REG_SIZE 0x1000 |
14 | |
15 | #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ |
16 | { \ |
17 | .grp = PINCTRL_PINGROUP("gpio" #id, \ |
18 | gpio##id##_pins, \ |
19 | ARRAY_SIZE(gpio##id##_pins)), \ |
20 | .funcs = (int[]){ \ |
21 | msm_mux_gpio, /* gpio mode */ \ |
22 | msm_mux_##f1, \ |
23 | msm_mux_##f2, \ |
24 | msm_mux_##f3, \ |
25 | msm_mux_##f4, \ |
26 | msm_mux_##f5, \ |
27 | msm_mux_##f6, \ |
28 | msm_mux_##f7, \ |
29 | msm_mux_##f8, \ |
30 | msm_mux_##f9 \ |
31 | }, \ |
32 | .nfuncs = 10, \ |
33 | .ctl_reg = REG_SIZE * id, \ |
34 | .io_reg = REG_SIZE * id + 0x4, \ |
35 | .intr_cfg_reg = REG_SIZE * id + 0x8, \ |
36 | .intr_status_reg = REG_SIZE * id + 0xc, \ |
37 | .intr_target_reg = REG_SIZE * id + 0x8, \ |
38 | .mux_bit = 2, \ |
39 | .pull_bit = 0, \ |
40 | .drv_bit = 6, \ |
41 | .oe_bit = 9, \ |
42 | .in_bit = 0, \ |
43 | .out_bit = 1, \ |
44 | .intr_enable_bit = 0, \ |
45 | .intr_status_bit = 0, \ |
46 | .intr_target_bit = 5, \ |
47 | .intr_target_kpss_val = 3, \ |
48 | .intr_raw_status_bit = 4, \ |
49 | .intr_polarity_bit = 1, \ |
50 | .intr_detection_bit = 2, \ |
51 | .intr_detection_width = 2, \ |
52 | } |
53 | |
54 | #define SDC_PINGROUP(pg_name, ctl, pull, drv) \ |
55 | { \ |
56 | .grp = PINCTRL_PINGROUP(#pg_name, \ |
57 | pg_name##_pins, \ |
58 | ARRAY_SIZE(pg_name##_pins)), \ |
59 | .ctl_reg = ctl, \ |
60 | .io_reg = 0, \ |
61 | .intr_cfg_reg = 0, \ |
62 | .intr_status_reg = 0, \ |
63 | .intr_target_reg = 0, \ |
64 | .mux_bit = -1, \ |
65 | .pull_bit = pull, \ |
66 | .drv_bit = drv, \ |
67 | .oe_bit = -1, \ |
68 | .in_bit = -1, \ |
69 | .out_bit = -1, \ |
70 | .intr_enable_bit = -1, \ |
71 | .intr_status_bit = -1, \ |
72 | .intr_target_bit = -1, \ |
73 | .intr_raw_status_bit = -1, \ |
74 | .intr_polarity_bit = -1, \ |
75 | .intr_detection_bit = -1, \ |
76 | .intr_detection_width = -1, \ |
77 | } |
78 | |
79 | #define UFS_RESET(pg_name, offset) \ |
80 | { \ |
81 | .grp = PINCTRL_PINGROUP(#pg_name, \ |
82 | pg_name##_pins, \ |
83 | ARRAY_SIZE(pg_name##_pins)), \ |
84 | .ctl_reg = offset, \ |
85 | .io_reg = offset + 0x4, \ |
86 | .intr_cfg_reg = 0, \ |
87 | .intr_status_reg = 0, \ |
88 | .intr_target_reg = 0, \ |
89 | .mux_bit = -1, \ |
90 | .pull_bit = 3, \ |
91 | .drv_bit = 0, \ |
92 | .oe_bit = -1, \ |
93 | .in_bit = -1, \ |
94 | .out_bit = 0, \ |
95 | .intr_enable_bit = -1, \ |
96 | .intr_status_bit = -1, \ |
97 | .intr_target_bit = -1, \ |
98 | .intr_raw_status_bit = -1, \ |
99 | .intr_polarity_bit = -1, \ |
100 | .intr_detection_bit = -1, \ |
101 | .intr_detection_width = -1, \ |
102 | } |
103 | |
104 | static const struct pinctrl_pin_desc sm8350_pins[] = { |
105 | PINCTRL_PIN(0, "GPIO_0" ), |
106 | PINCTRL_PIN(1, "GPIO_1" ), |
107 | PINCTRL_PIN(2, "GPIO_2" ), |
108 | PINCTRL_PIN(3, "GPIO_3" ), |
109 | PINCTRL_PIN(4, "GPIO_4" ), |
110 | PINCTRL_PIN(5, "GPIO_5" ), |
111 | PINCTRL_PIN(6, "GPIO_6" ), |
112 | PINCTRL_PIN(7, "GPIO_7" ), |
113 | PINCTRL_PIN(8, "GPIO_8" ), |
114 | PINCTRL_PIN(9, "GPIO_9" ), |
115 | PINCTRL_PIN(10, "GPIO_10" ), |
116 | PINCTRL_PIN(11, "GPIO_11" ), |
117 | PINCTRL_PIN(12, "GPIO_12" ), |
118 | PINCTRL_PIN(13, "GPIO_13" ), |
119 | PINCTRL_PIN(14, "GPIO_14" ), |
120 | PINCTRL_PIN(15, "GPIO_15" ), |
121 | PINCTRL_PIN(16, "GPIO_16" ), |
122 | PINCTRL_PIN(17, "GPIO_17" ), |
123 | PINCTRL_PIN(18, "GPIO_18" ), |
124 | PINCTRL_PIN(19, "GPIO_19" ), |
125 | PINCTRL_PIN(20, "GPIO_20" ), |
126 | PINCTRL_PIN(21, "GPIO_21" ), |
127 | PINCTRL_PIN(22, "GPIO_22" ), |
128 | PINCTRL_PIN(23, "GPIO_23" ), |
129 | PINCTRL_PIN(24, "GPIO_24" ), |
130 | PINCTRL_PIN(25, "GPIO_25" ), |
131 | PINCTRL_PIN(26, "GPIO_26" ), |
132 | PINCTRL_PIN(27, "GPIO_27" ), |
133 | PINCTRL_PIN(28, "GPIO_28" ), |
134 | PINCTRL_PIN(29, "GPIO_29" ), |
135 | PINCTRL_PIN(30, "GPIO_30" ), |
136 | PINCTRL_PIN(31, "GPIO_31" ), |
137 | PINCTRL_PIN(32, "GPIO_32" ), |
138 | PINCTRL_PIN(33, "GPIO_33" ), |
139 | PINCTRL_PIN(34, "GPIO_34" ), |
140 | PINCTRL_PIN(35, "GPIO_35" ), |
141 | PINCTRL_PIN(36, "GPIO_36" ), |
142 | PINCTRL_PIN(37, "GPIO_37" ), |
143 | PINCTRL_PIN(38, "GPIO_38" ), |
144 | PINCTRL_PIN(39, "GPIO_39" ), |
145 | PINCTRL_PIN(40, "GPIO_40" ), |
146 | PINCTRL_PIN(41, "GPIO_41" ), |
147 | PINCTRL_PIN(42, "GPIO_42" ), |
148 | PINCTRL_PIN(43, "GPIO_43" ), |
149 | PINCTRL_PIN(44, "GPIO_44" ), |
150 | PINCTRL_PIN(45, "GPIO_45" ), |
151 | PINCTRL_PIN(46, "GPIO_46" ), |
152 | PINCTRL_PIN(47, "GPIO_47" ), |
153 | PINCTRL_PIN(48, "GPIO_48" ), |
154 | PINCTRL_PIN(49, "GPIO_49" ), |
155 | PINCTRL_PIN(50, "GPIO_50" ), |
156 | PINCTRL_PIN(51, "GPIO_51" ), |
157 | PINCTRL_PIN(52, "GPIO_52" ), |
158 | PINCTRL_PIN(53, "GPIO_53" ), |
159 | PINCTRL_PIN(54, "GPIO_54" ), |
160 | PINCTRL_PIN(55, "GPIO_55" ), |
161 | PINCTRL_PIN(56, "GPIO_56" ), |
162 | PINCTRL_PIN(57, "GPIO_57" ), |
163 | PINCTRL_PIN(58, "GPIO_58" ), |
164 | PINCTRL_PIN(59, "GPIO_59" ), |
165 | PINCTRL_PIN(60, "GPIO_60" ), |
166 | PINCTRL_PIN(61, "GPIO_61" ), |
167 | PINCTRL_PIN(62, "GPIO_62" ), |
168 | PINCTRL_PIN(63, "GPIO_63" ), |
169 | PINCTRL_PIN(64, "GPIO_64" ), |
170 | PINCTRL_PIN(65, "GPIO_65" ), |
171 | PINCTRL_PIN(66, "GPIO_66" ), |
172 | PINCTRL_PIN(67, "GPIO_67" ), |
173 | PINCTRL_PIN(68, "GPIO_68" ), |
174 | PINCTRL_PIN(69, "GPIO_69" ), |
175 | PINCTRL_PIN(70, "GPIO_70" ), |
176 | PINCTRL_PIN(71, "GPIO_71" ), |
177 | PINCTRL_PIN(72, "GPIO_72" ), |
178 | PINCTRL_PIN(73, "GPIO_73" ), |
179 | PINCTRL_PIN(74, "GPIO_74" ), |
180 | PINCTRL_PIN(75, "GPIO_75" ), |
181 | PINCTRL_PIN(76, "GPIO_76" ), |
182 | PINCTRL_PIN(77, "GPIO_77" ), |
183 | PINCTRL_PIN(78, "GPIO_78" ), |
184 | PINCTRL_PIN(79, "GPIO_79" ), |
185 | PINCTRL_PIN(80, "GPIO_80" ), |
186 | PINCTRL_PIN(81, "GPIO_81" ), |
187 | PINCTRL_PIN(82, "GPIO_82" ), |
188 | PINCTRL_PIN(83, "GPIO_83" ), |
189 | PINCTRL_PIN(84, "GPIO_84" ), |
190 | PINCTRL_PIN(85, "GPIO_85" ), |
191 | PINCTRL_PIN(86, "GPIO_86" ), |
192 | PINCTRL_PIN(87, "GPIO_87" ), |
193 | PINCTRL_PIN(88, "GPIO_88" ), |
194 | PINCTRL_PIN(89, "GPIO_89" ), |
195 | PINCTRL_PIN(90, "GPIO_90" ), |
196 | PINCTRL_PIN(91, "GPIO_91" ), |
197 | PINCTRL_PIN(92, "GPIO_92" ), |
198 | PINCTRL_PIN(93, "GPIO_93" ), |
199 | PINCTRL_PIN(94, "GPIO_94" ), |
200 | PINCTRL_PIN(95, "GPIO_95" ), |
201 | PINCTRL_PIN(96, "GPIO_96" ), |
202 | PINCTRL_PIN(97, "GPIO_97" ), |
203 | PINCTRL_PIN(98, "GPIO_98" ), |
204 | PINCTRL_PIN(99, "GPIO_99" ), |
205 | PINCTRL_PIN(100, "GPIO_100" ), |
206 | PINCTRL_PIN(101, "GPIO_101" ), |
207 | PINCTRL_PIN(102, "GPIO_102" ), |
208 | PINCTRL_PIN(103, "GPIO_103" ), |
209 | PINCTRL_PIN(104, "GPIO_104" ), |
210 | PINCTRL_PIN(105, "GPIO_105" ), |
211 | PINCTRL_PIN(106, "GPIO_106" ), |
212 | PINCTRL_PIN(107, "GPIO_107" ), |
213 | PINCTRL_PIN(108, "GPIO_108" ), |
214 | PINCTRL_PIN(109, "GPIO_109" ), |
215 | PINCTRL_PIN(110, "GPIO_110" ), |
216 | PINCTRL_PIN(111, "GPIO_111" ), |
217 | PINCTRL_PIN(112, "GPIO_112" ), |
218 | PINCTRL_PIN(113, "GPIO_113" ), |
219 | PINCTRL_PIN(114, "GPIO_114" ), |
220 | PINCTRL_PIN(115, "GPIO_115" ), |
221 | PINCTRL_PIN(116, "GPIO_116" ), |
222 | PINCTRL_PIN(117, "GPIO_117" ), |
223 | PINCTRL_PIN(118, "GPIO_118" ), |
224 | PINCTRL_PIN(119, "GPIO_119" ), |
225 | PINCTRL_PIN(120, "GPIO_120" ), |
226 | PINCTRL_PIN(121, "GPIO_121" ), |
227 | PINCTRL_PIN(122, "GPIO_122" ), |
228 | PINCTRL_PIN(123, "GPIO_123" ), |
229 | PINCTRL_PIN(124, "GPIO_124" ), |
230 | PINCTRL_PIN(125, "GPIO_125" ), |
231 | PINCTRL_PIN(126, "GPIO_126" ), |
232 | PINCTRL_PIN(127, "GPIO_127" ), |
233 | PINCTRL_PIN(128, "GPIO_128" ), |
234 | PINCTRL_PIN(129, "GPIO_129" ), |
235 | PINCTRL_PIN(130, "GPIO_130" ), |
236 | PINCTRL_PIN(131, "GPIO_131" ), |
237 | PINCTRL_PIN(132, "GPIO_132" ), |
238 | PINCTRL_PIN(133, "GPIO_133" ), |
239 | PINCTRL_PIN(134, "GPIO_134" ), |
240 | PINCTRL_PIN(135, "GPIO_135" ), |
241 | PINCTRL_PIN(136, "GPIO_136" ), |
242 | PINCTRL_PIN(137, "GPIO_137" ), |
243 | PINCTRL_PIN(138, "GPIO_138" ), |
244 | PINCTRL_PIN(139, "GPIO_139" ), |
245 | PINCTRL_PIN(140, "GPIO_140" ), |
246 | PINCTRL_PIN(141, "GPIO_141" ), |
247 | PINCTRL_PIN(142, "GPIO_142" ), |
248 | PINCTRL_PIN(143, "GPIO_143" ), |
249 | PINCTRL_PIN(144, "GPIO_144" ), |
250 | PINCTRL_PIN(145, "GPIO_145" ), |
251 | PINCTRL_PIN(146, "GPIO_146" ), |
252 | PINCTRL_PIN(147, "GPIO_147" ), |
253 | PINCTRL_PIN(148, "GPIO_148" ), |
254 | PINCTRL_PIN(149, "GPIO_149" ), |
255 | PINCTRL_PIN(150, "GPIO_150" ), |
256 | PINCTRL_PIN(151, "GPIO_151" ), |
257 | PINCTRL_PIN(152, "GPIO_152" ), |
258 | PINCTRL_PIN(153, "GPIO_153" ), |
259 | PINCTRL_PIN(154, "GPIO_154" ), |
260 | PINCTRL_PIN(155, "GPIO_155" ), |
261 | PINCTRL_PIN(156, "GPIO_156" ), |
262 | PINCTRL_PIN(157, "GPIO_157" ), |
263 | PINCTRL_PIN(158, "GPIO_158" ), |
264 | PINCTRL_PIN(159, "GPIO_159" ), |
265 | PINCTRL_PIN(160, "GPIO_160" ), |
266 | PINCTRL_PIN(161, "GPIO_161" ), |
267 | PINCTRL_PIN(162, "GPIO_162" ), |
268 | PINCTRL_PIN(163, "GPIO_163" ), |
269 | PINCTRL_PIN(164, "GPIO_164" ), |
270 | PINCTRL_PIN(165, "GPIO_165" ), |
271 | PINCTRL_PIN(166, "GPIO_166" ), |
272 | PINCTRL_PIN(167, "GPIO_167" ), |
273 | PINCTRL_PIN(168, "GPIO_168" ), |
274 | PINCTRL_PIN(169, "GPIO_169" ), |
275 | PINCTRL_PIN(170, "GPIO_170" ), |
276 | PINCTRL_PIN(171, "GPIO_171" ), |
277 | PINCTRL_PIN(172, "GPIO_172" ), |
278 | PINCTRL_PIN(173, "GPIO_173" ), |
279 | PINCTRL_PIN(174, "GPIO_174" ), |
280 | PINCTRL_PIN(175, "GPIO_175" ), |
281 | PINCTRL_PIN(176, "GPIO_176" ), |
282 | PINCTRL_PIN(177, "GPIO_177" ), |
283 | PINCTRL_PIN(178, "GPIO_178" ), |
284 | PINCTRL_PIN(179, "GPIO_179" ), |
285 | PINCTRL_PIN(180, "GPIO_180" ), |
286 | PINCTRL_PIN(181, "GPIO_181" ), |
287 | PINCTRL_PIN(182, "GPIO_182" ), |
288 | PINCTRL_PIN(183, "GPIO_183" ), |
289 | PINCTRL_PIN(184, "GPIO_184" ), |
290 | PINCTRL_PIN(185, "GPIO_185" ), |
291 | PINCTRL_PIN(186, "GPIO_186" ), |
292 | PINCTRL_PIN(187, "GPIO_187" ), |
293 | PINCTRL_PIN(188, "GPIO_188" ), |
294 | PINCTRL_PIN(189, "GPIO_189" ), |
295 | PINCTRL_PIN(190, "GPIO_190" ), |
296 | PINCTRL_PIN(191, "GPIO_191" ), |
297 | PINCTRL_PIN(192, "GPIO_192" ), |
298 | PINCTRL_PIN(193, "GPIO_193" ), |
299 | PINCTRL_PIN(194, "GPIO_194" ), |
300 | PINCTRL_PIN(195, "GPIO_195" ), |
301 | PINCTRL_PIN(196, "GPIO_196" ), |
302 | PINCTRL_PIN(197, "GPIO_197" ), |
303 | PINCTRL_PIN(198, "GPIO_198" ), |
304 | PINCTRL_PIN(199, "GPIO_199" ), |
305 | PINCTRL_PIN(200, "GPIO_200" ), |
306 | PINCTRL_PIN(201, "GPIO_201" ), |
307 | PINCTRL_PIN(202, "GPIO_202" ), |
308 | PINCTRL_PIN(203, "UFS_RESET" ), |
309 | PINCTRL_PIN(204, "SDC2_CLK" ), |
310 | PINCTRL_PIN(205, "SDC2_CMD" ), |
311 | PINCTRL_PIN(206, "SDC2_DATA" ), |
312 | }; |
313 | |
314 | #define DECLARE_MSM_GPIO_PINS(pin) \ |
315 | static const unsigned int gpio##pin##_pins[] = { pin } |
316 | DECLARE_MSM_GPIO_PINS(0); |
317 | DECLARE_MSM_GPIO_PINS(1); |
318 | DECLARE_MSM_GPIO_PINS(2); |
319 | DECLARE_MSM_GPIO_PINS(3); |
320 | DECLARE_MSM_GPIO_PINS(4); |
321 | DECLARE_MSM_GPIO_PINS(5); |
322 | DECLARE_MSM_GPIO_PINS(6); |
323 | DECLARE_MSM_GPIO_PINS(7); |
324 | DECLARE_MSM_GPIO_PINS(8); |
325 | DECLARE_MSM_GPIO_PINS(9); |
326 | DECLARE_MSM_GPIO_PINS(10); |
327 | DECLARE_MSM_GPIO_PINS(11); |
328 | DECLARE_MSM_GPIO_PINS(12); |
329 | DECLARE_MSM_GPIO_PINS(13); |
330 | DECLARE_MSM_GPIO_PINS(14); |
331 | DECLARE_MSM_GPIO_PINS(15); |
332 | DECLARE_MSM_GPIO_PINS(16); |
333 | DECLARE_MSM_GPIO_PINS(17); |
334 | DECLARE_MSM_GPIO_PINS(18); |
335 | DECLARE_MSM_GPIO_PINS(19); |
336 | DECLARE_MSM_GPIO_PINS(20); |
337 | DECLARE_MSM_GPIO_PINS(21); |
338 | DECLARE_MSM_GPIO_PINS(22); |
339 | DECLARE_MSM_GPIO_PINS(23); |
340 | DECLARE_MSM_GPIO_PINS(24); |
341 | DECLARE_MSM_GPIO_PINS(25); |
342 | DECLARE_MSM_GPIO_PINS(26); |
343 | DECLARE_MSM_GPIO_PINS(27); |
344 | DECLARE_MSM_GPIO_PINS(28); |
345 | DECLARE_MSM_GPIO_PINS(29); |
346 | DECLARE_MSM_GPIO_PINS(30); |
347 | DECLARE_MSM_GPIO_PINS(31); |
348 | DECLARE_MSM_GPIO_PINS(32); |
349 | DECLARE_MSM_GPIO_PINS(33); |
350 | DECLARE_MSM_GPIO_PINS(34); |
351 | DECLARE_MSM_GPIO_PINS(35); |
352 | DECLARE_MSM_GPIO_PINS(36); |
353 | DECLARE_MSM_GPIO_PINS(37); |
354 | DECLARE_MSM_GPIO_PINS(38); |
355 | DECLARE_MSM_GPIO_PINS(39); |
356 | DECLARE_MSM_GPIO_PINS(40); |
357 | DECLARE_MSM_GPIO_PINS(41); |
358 | DECLARE_MSM_GPIO_PINS(42); |
359 | DECLARE_MSM_GPIO_PINS(43); |
360 | DECLARE_MSM_GPIO_PINS(44); |
361 | DECLARE_MSM_GPIO_PINS(45); |
362 | DECLARE_MSM_GPIO_PINS(46); |
363 | DECLARE_MSM_GPIO_PINS(47); |
364 | DECLARE_MSM_GPIO_PINS(48); |
365 | DECLARE_MSM_GPIO_PINS(49); |
366 | DECLARE_MSM_GPIO_PINS(50); |
367 | DECLARE_MSM_GPIO_PINS(51); |
368 | DECLARE_MSM_GPIO_PINS(52); |
369 | DECLARE_MSM_GPIO_PINS(53); |
370 | DECLARE_MSM_GPIO_PINS(54); |
371 | DECLARE_MSM_GPIO_PINS(55); |
372 | DECLARE_MSM_GPIO_PINS(56); |
373 | DECLARE_MSM_GPIO_PINS(57); |
374 | DECLARE_MSM_GPIO_PINS(58); |
375 | DECLARE_MSM_GPIO_PINS(59); |
376 | DECLARE_MSM_GPIO_PINS(60); |
377 | DECLARE_MSM_GPIO_PINS(61); |
378 | DECLARE_MSM_GPIO_PINS(62); |
379 | DECLARE_MSM_GPIO_PINS(63); |
380 | DECLARE_MSM_GPIO_PINS(64); |
381 | DECLARE_MSM_GPIO_PINS(65); |
382 | DECLARE_MSM_GPIO_PINS(66); |
383 | DECLARE_MSM_GPIO_PINS(67); |
384 | DECLARE_MSM_GPIO_PINS(68); |
385 | DECLARE_MSM_GPIO_PINS(69); |
386 | DECLARE_MSM_GPIO_PINS(70); |
387 | DECLARE_MSM_GPIO_PINS(71); |
388 | DECLARE_MSM_GPIO_PINS(72); |
389 | DECLARE_MSM_GPIO_PINS(73); |
390 | DECLARE_MSM_GPIO_PINS(74); |
391 | DECLARE_MSM_GPIO_PINS(75); |
392 | DECLARE_MSM_GPIO_PINS(76); |
393 | DECLARE_MSM_GPIO_PINS(77); |
394 | DECLARE_MSM_GPIO_PINS(78); |
395 | DECLARE_MSM_GPIO_PINS(79); |
396 | DECLARE_MSM_GPIO_PINS(80); |
397 | DECLARE_MSM_GPIO_PINS(81); |
398 | DECLARE_MSM_GPIO_PINS(82); |
399 | DECLARE_MSM_GPIO_PINS(83); |
400 | DECLARE_MSM_GPIO_PINS(84); |
401 | DECLARE_MSM_GPIO_PINS(85); |
402 | DECLARE_MSM_GPIO_PINS(86); |
403 | DECLARE_MSM_GPIO_PINS(87); |
404 | DECLARE_MSM_GPIO_PINS(88); |
405 | DECLARE_MSM_GPIO_PINS(89); |
406 | DECLARE_MSM_GPIO_PINS(90); |
407 | DECLARE_MSM_GPIO_PINS(91); |
408 | DECLARE_MSM_GPIO_PINS(92); |
409 | DECLARE_MSM_GPIO_PINS(93); |
410 | DECLARE_MSM_GPIO_PINS(94); |
411 | DECLARE_MSM_GPIO_PINS(95); |
412 | DECLARE_MSM_GPIO_PINS(96); |
413 | DECLARE_MSM_GPIO_PINS(97); |
414 | DECLARE_MSM_GPIO_PINS(98); |
415 | DECLARE_MSM_GPIO_PINS(99); |
416 | DECLARE_MSM_GPIO_PINS(100); |
417 | DECLARE_MSM_GPIO_PINS(101); |
418 | DECLARE_MSM_GPIO_PINS(102); |
419 | DECLARE_MSM_GPIO_PINS(103); |
420 | DECLARE_MSM_GPIO_PINS(104); |
421 | DECLARE_MSM_GPIO_PINS(105); |
422 | DECLARE_MSM_GPIO_PINS(106); |
423 | DECLARE_MSM_GPIO_PINS(107); |
424 | DECLARE_MSM_GPIO_PINS(108); |
425 | DECLARE_MSM_GPIO_PINS(109); |
426 | DECLARE_MSM_GPIO_PINS(110); |
427 | DECLARE_MSM_GPIO_PINS(111); |
428 | DECLARE_MSM_GPIO_PINS(112); |
429 | DECLARE_MSM_GPIO_PINS(113); |
430 | DECLARE_MSM_GPIO_PINS(114); |
431 | DECLARE_MSM_GPIO_PINS(115); |
432 | DECLARE_MSM_GPIO_PINS(116); |
433 | DECLARE_MSM_GPIO_PINS(117); |
434 | DECLARE_MSM_GPIO_PINS(118); |
435 | DECLARE_MSM_GPIO_PINS(119); |
436 | DECLARE_MSM_GPIO_PINS(120); |
437 | DECLARE_MSM_GPIO_PINS(121); |
438 | DECLARE_MSM_GPIO_PINS(122); |
439 | DECLARE_MSM_GPIO_PINS(123); |
440 | DECLARE_MSM_GPIO_PINS(124); |
441 | DECLARE_MSM_GPIO_PINS(125); |
442 | DECLARE_MSM_GPIO_PINS(126); |
443 | DECLARE_MSM_GPIO_PINS(127); |
444 | DECLARE_MSM_GPIO_PINS(128); |
445 | DECLARE_MSM_GPIO_PINS(129); |
446 | DECLARE_MSM_GPIO_PINS(130); |
447 | DECLARE_MSM_GPIO_PINS(131); |
448 | DECLARE_MSM_GPIO_PINS(132); |
449 | DECLARE_MSM_GPIO_PINS(133); |
450 | DECLARE_MSM_GPIO_PINS(134); |
451 | DECLARE_MSM_GPIO_PINS(135); |
452 | DECLARE_MSM_GPIO_PINS(136); |
453 | DECLARE_MSM_GPIO_PINS(137); |
454 | DECLARE_MSM_GPIO_PINS(138); |
455 | DECLARE_MSM_GPIO_PINS(139); |
456 | DECLARE_MSM_GPIO_PINS(140); |
457 | DECLARE_MSM_GPIO_PINS(141); |
458 | DECLARE_MSM_GPIO_PINS(142); |
459 | DECLARE_MSM_GPIO_PINS(143); |
460 | DECLARE_MSM_GPIO_PINS(144); |
461 | DECLARE_MSM_GPIO_PINS(145); |
462 | DECLARE_MSM_GPIO_PINS(146); |
463 | DECLARE_MSM_GPIO_PINS(147); |
464 | DECLARE_MSM_GPIO_PINS(148); |
465 | DECLARE_MSM_GPIO_PINS(149); |
466 | DECLARE_MSM_GPIO_PINS(150); |
467 | DECLARE_MSM_GPIO_PINS(151); |
468 | DECLARE_MSM_GPIO_PINS(152); |
469 | DECLARE_MSM_GPIO_PINS(153); |
470 | DECLARE_MSM_GPIO_PINS(154); |
471 | DECLARE_MSM_GPIO_PINS(155); |
472 | DECLARE_MSM_GPIO_PINS(156); |
473 | DECLARE_MSM_GPIO_PINS(157); |
474 | DECLARE_MSM_GPIO_PINS(158); |
475 | DECLARE_MSM_GPIO_PINS(159); |
476 | DECLARE_MSM_GPIO_PINS(160); |
477 | DECLARE_MSM_GPIO_PINS(161); |
478 | DECLARE_MSM_GPIO_PINS(162); |
479 | DECLARE_MSM_GPIO_PINS(163); |
480 | DECLARE_MSM_GPIO_PINS(164); |
481 | DECLARE_MSM_GPIO_PINS(165); |
482 | DECLARE_MSM_GPIO_PINS(166); |
483 | DECLARE_MSM_GPIO_PINS(167); |
484 | DECLARE_MSM_GPIO_PINS(168); |
485 | DECLARE_MSM_GPIO_PINS(169); |
486 | DECLARE_MSM_GPIO_PINS(170); |
487 | DECLARE_MSM_GPIO_PINS(171); |
488 | DECLARE_MSM_GPIO_PINS(172); |
489 | DECLARE_MSM_GPIO_PINS(173); |
490 | DECLARE_MSM_GPIO_PINS(174); |
491 | DECLARE_MSM_GPIO_PINS(175); |
492 | DECLARE_MSM_GPIO_PINS(176); |
493 | DECLARE_MSM_GPIO_PINS(177); |
494 | DECLARE_MSM_GPIO_PINS(178); |
495 | DECLARE_MSM_GPIO_PINS(179); |
496 | DECLARE_MSM_GPIO_PINS(180); |
497 | DECLARE_MSM_GPIO_PINS(181); |
498 | DECLARE_MSM_GPIO_PINS(182); |
499 | DECLARE_MSM_GPIO_PINS(183); |
500 | DECLARE_MSM_GPIO_PINS(184); |
501 | DECLARE_MSM_GPIO_PINS(185); |
502 | DECLARE_MSM_GPIO_PINS(186); |
503 | DECLARE_MSM_GPIO_PINS(187); |
504 | DECLARE_MSM_GPIO_PINS(188); |
505 | DECLARE_MSM_GPIO_PINS(189); |
506 | DECLARE_MSM_GPIO_PINS(190); |
507 | DECLARE_MSM_GPIO_PINS(191); |
508 | DECLARE_MSM_GPIO_PINS(192); |
509 | DECLARE_MSM_GPIO_PINS(193); |
510 | DECLARE_MSM_GPIO_PINS(194); |
511 | DECLARE_MSM_GPIO_PINS(195); |
512 | DECLARE_MSM_GPIO_PINS(196); |
513 | DECLARE_MSM_GPIO_PINS(197); |
514 | DECLARE_MSM_GPIO_PINS(198); |
515 | DECLARE_MSM_GPIO_PINS(199); |
516 | DECLARE_MSM_GPIO_PINS(200); |
517 | DECLARE_MSM_GPIO_PINS(201); |
518 | DECLARE_MSM_GPIO_PINS(202); |
519 | |
520 | static const unsigned int ufs_reset_pins[] = { 203 }; |
521 | static const unsigned int sdc2_clk_pins[] = { 204 }; |
522 | static const unsigned int sdc2_cmd_pins[] = { 205 }; |
523 | static const unsigned int sdc2_data_pins[] = { 206 }; |
524 | |
525 | enum sm8350_functions { |
526 | msm_mux_atest_char, |
527 | msm_mux_atest_usb, |
528 | msm_mux_audio_ref, |
529 | msm_mux_cam_mclk, |
530 | msm_mux_cci_async, |
531 | msm_mux_cci_i2c, |
532 | msm_mux_cci_timer, |
533 | msm_mux_cmu_rng, |
534 | msm_mux_coex_uart1, |
535 | msm_mux_coex_uart2, |
536 | msm_mux_cri_trng, |
537 | msm_mux_cri_trng0, |
538 | msm_mux_cri_trng1, |
539 | msm_mux_dbg_out, |
540 | msm_mux_ddr_bist, |
541 | msm_mux_ddr_pxi0, |
542 | msm_mux_ddr_pxi1, |
543 | msm_mux_ddr_pxi2, |
544 | msm_mux_ddr_pxi3, |
545 | msm_mux_dp_hot, |
546 | msm_mux_dp_lcd, |
547 | msm_mux_gcc_gp1, |
548 | msm_mux_gcc_gp2, |
549 | msm_mux_gcc_gp3, |
550 | msm_mux_gpio, |
551 | msm_mux_ibi_i3c, |
552 | msm_mux_jitter_bist, |
553 | msm_mux_lpass_slimbus, |
554 | msm_mux_mdp_vsync, |
555 | msm_mux_mdp_vsync0, |
556 | msm_mux_mdp_vsync1, |
557 | msm_mux_mdp_vsync2, |
558 | msm_mux_mdp_vsync3, |
559 | msm_mux_mi2s0_data0, |
560 | msm_mux_mi2s0_data1, |
561 | msm_mux_mi2s0_sck, |
562 | msm_mux_mi2s0_ws, |
563 | msm_mux_mi2s1_data0, |
564 | msm_mux_mi2s1_data1, |
565 | msm_mux_mi2s1_sck, |
566 | msm_mux_mi2s1_ws, |
567 | msm_mux_mi2s2_data0, |
568 | msm_mux_mi2s2_data1, |
569 | msm_mux_mi2s2_sck, |
570 | msm_mux_mi2s2_ws, |
571 | msm_mux_mss_grfc0, |
572 | msm_mux_mss_grfc1, |
573 | msm_mux_mss_grfc10, |
574 | msm_mux_mss_grfc11, |
575 | msm_mux_mss_grfc12, |
576 | msm_mux_mss_grfc2, |
577 | msm_mux_mss_grfc3, |
578 | msm_mux_mss_grfc4, |
579 | msm_mux_mss_grfc5, |
580 | msm_mux_mss_grfc6, |
581 | msm_mux_mss_grfc7, |
582 | msm_mux_mss_grfc8, |
583 | msm_mux_mss_grfc9, |
584 | msm_mux_nav_gpio, |
585 | msm_mux_pa_indicator, |
586 | msm_mux_pcie0_clkreqn, |
587 | msm_mux_pcie1_clkreqn, |
588 | msm_mux_phase_flag, |
589 | msm_mux_pll_bist, |
590 | msm_mux_pll_clk, |
591 | msm_mux_pri_mi2s, |
592 | msm_mux_prng_rosc, |
593 | msm_mux_qdss_cti, |
594 | msm_mux_qdss_gpio, |
595 | msm_mux_qlink0_enable, |
596 | msm_mux_qlink0_request, |
597 | msm_mux_qlink0_wmss, |
598 | msm_mux_qlink1_enable, |
599 | msm_mux_qlink1_request, |
600 | msm_mux_qlink1_wmss, |
601 | msm_mux_qlink2_enable, |
602 | msm_mux_qlink2_request, |
603 | msm_mux_qlink2_wmss, |
604 | msm_mux_qspi0, |
605 | msm_mux_qspi1, |
606 | msm_mux_qspi2, |
607 | msm_mux_qspi3, |
608 | msm_mux_qspi_clk, |
609 | msm_mux_qspi_cs, |
610 | msm_mux_qup0, |
611 | msm_mux_qup1, |
612 | msm_mux_qup10, |
613 | msm_mux_qup11, |
614 | msm_mux_qup12, |
615 | msm_mux_qup13, |
616 | msm_mux_qup14, |
617 | msm_mux_qup15, |
618 | msm_mux_qup16, |
619 | msm_mux_qup17, |
620 | msm_mux_qup18, |
621 | msm_mux_qup19, |
622 | msm_mux_qup2, |
623 | msm_mux_qup3, |
624 | msm_mux_qup4, |
625 | msm_mux_qup5, |
626 | msm_mux_qup6, |
627 | msm_mux_qup7, |
628 | msm_mux_qup8, |
629 | msm_mux_qup9, |
630 | msm_mux_qup_l4, |
631 | msm_mux_qup_l5, |
632 | msm_mux_qup_l6, |
633 | msm_mux_sd_write, |
634 | msm_mux_sdc40, |
635 | msm_mux_sdc41, |
636 | msm_mux_sdc42, |
637 | msm_mux_sdc43, |
638 | msm_mux_sdc4_clk, |
639 | msm_mux_sdc4_cmd, |
640 | msm_mux_sec_mi2s, |
641 | msm_mux_tb_trig, |
642 | msm_mux_tgu_ch0, |
643 | msm_mux_tgu_ch1, |
644 | msm_mux_tgu_ch2, |
645 | msm_mux_tgu_ch3, |
646 | msm_mux_tsense_pwm1, |
647 | msm_mux_tsense_pwm2, |
648 | msm_mux_uim0_clk, |
649 | msm_mux_uim0_data, |
650 | msm_mux_uim0_present, |
651 | msm_mux_uim0_reset, |
652 | msm_mux_uim1_clk, |
653 | msm_mux_uim1_data, |
654 | msm_mux_uim1_present, |
655 | msm_mux_uim1_reset, |
656 | msm_mux_usb2phy_ac, |
657 | msm_mux_usb_phy, |
658 | msm_mux_vfr_0, |
659 | msm_mux_vfr_1, |
660 | msm_mux_vsense_trigger, |
661 | msm_mux__, |
662 | }; |
663 | |
664 | static const char * const gpio_groups[] = { |
665 | "gpio0" , "gpio1" , "gpio2" , "gpio3" , "gpio4" , "gpio5" , "gpio6" , "gpio7" , |
666 | "gpio8" , "gpio9" , "gpio10" , "gpio11" , "gpio12" , "gpio13" , "gpio14" , |
667 | "gpio15" , "gpio16" , "gpio17" , "gpio18" , "gpio19" , "gpio20" , "gpio21" , |
668 | "gpio22" , "gpio23" , "gpio24" , "gpio25" , "gpio26" , "gpio27" , "gpio28" , |
669 | "gpio29" , "gpio30" , "gpio31" , "gpio32" , "gpio33" , "gpio34" , "gpio35" , |
670 | "gpio36" , "gpio37" , "gpio38" , "gpio39" , "gpio40" , "gpio41" , "gpio42" , |
671 | "gpio43" , "gpio44" , "gpio45" , "gpio46" , "gpio47" , "gpio48" , "gpio49" , |
672 | "gpio50" , "gpio51" , "gpio52" , "gpio53" , "gpio54" , "gpio55" , "gpio56" , |
673 | "gpio57" , "gpio58" , "gpio59" , "gpio60" , "gpio61" , "gpio62" , "gpio63" , |
674 | "gpio64" , "gpio65" , "gpio66" , "gpio67" , "gpio68" , "gpio69" , "gpio70" , |
675 | "gpio71" , "gpio72" , "gpio73" , "gpio74" , "gpio75" , "gpio76" , "gpio77" , |
676 | "gpio78" , "gpio79" , "gpio80" , "gpio81" , "gpio82" , "gpio83" , "gpio84" , |
677 | "gpio85" , "gpio86" , "gpio87" , "gpio88" , "gpio89" , "gpio90" , "gpio91" , |
678 | "gpio92" , "gpio93" , "gpio94" , "gpio95" , "gpio96" , "gpio97" , "gpio98" , |
679 | "gpio99" , "gpio100" , "gpio101" , "gpio102" , "gpio103" , "gpio104" , |
680 | "gpio105" , "gpio106" , "gpio107" , "gpio108" , "gpio109" , "gpio110" , |
681 | "gpio111" , "gpio112" , "gpio113" , "gpio114" , "gpio115" , "gpio116" , |
682 | "gpio117" , "gpio118" , "gpio119" , "gpio120" , "gpio121" , "gpio122" , |
683 | "gpio123" , "gpio124" , "gpio125" , "gpio126" , "gpio127" , "gpio128" , |
684 | "gpio129" , "gpio130" , "gpio131" , "gpio132" , "gpio133" , "gpio134" , |
685 | "gpio135" , "gpio136" , "gpio137" , "gpio138" , "gpio139" , "gpio140" , |
686 | "gpio141" , "gpio142" , "gpio143" , "gpio144" , "gpio145" , "gpio146" , |
687 | "gpio147" , "gpio148" , "gpio149" , "gpio150" , "gpio151" , "gpio152" , |
688 | "gpio153" , "gpio154" , "gpio155" , "gpio156" , "gpio157" , "gpio158" , |
689 | "gpio159" , "gpio160" , "gpio161" , "gpio162" , "gpio163" , "gpio164" , |
690 | "gpio165" , "gpio166" , "gpio167" , "gpio168" , "gpio169" , "gpio170" , |
691 | "gpio171" , "gpio172" , "gpio173" , "gpio174" , "gpio175" , "gpio176" , |
692 | "gpio177" , "gpio178" , "gpio179" , "gpio180" , "gpio181" , "gpio182" , |
693 | "gpio183" , "gpio184" , "gpio185" , "gpio186" , "gpio187" , "gpio188" , |
694 | "gpio189" , "gpio190" , "gpio191" , "gpio192" , "gpio193" , "gpio194" , |
695 | "gpio195" , "gpio196" , "gpio197" , "gpio198" , "gpio199" , "gpio200" , |
696 | "gpio201" , "gpio202" , |
697 | }; |
698 | |
699 | static const char * const atest_char_groups[] = { |
700 | "gpio85" , "gpio86" , "gpio87" , "gpio115" , "gpio117" , |
701 | }; |
702 | |
703 | static const char * const atest_usb_groups[] = { |
704 | "gpio55" , "gpio80" , "gpio81" , "gpio151" , "gpio152" , |
705 | "gpio153" , "gpio154" , "gpio158" , "gpio159" , "gpio161" , |
706 | }; |
707 | |
708 | static const char * const audio_ref_groups[] = { |
709 | "gpio124" , |
710 | }; |
711 | |
712 | static const char * const cam_mclk_groups[] = { |
713 | "gpio100" , "gpio101" , "gpio102" , "gpio103" , "gpio104" , "gpio105" , |
714 | }; |
715 | |
716 | static const char * const cci_async_groups[] = { |
717 | "gpio106" , "gpio118" , "gpio119" , |
718 | }; |
719 | |
720 | static const char * const cci_i2c_groups[] = { |
721 | "gpio107" , "gpio108" , "gpio109" , "gpio110" , "gpio111" , "gpio112" , |
722 | "gpio113" , "gpio114" , |
723 | }; |
724 | |
725 | static const char * const cci_timer_groups[] = { |
726 | "gpio115" , "gpio116" , "gpio117" , "gpio118" , "gpio119" , |
727 | }; |
728 | |
729 | static const char * const cmu_rng_groups[] = { |
730 | "gpio174" , "gpio175" , "gpio176" , "gpio177" , |
731 | }; |
732 | |
733 | static const char * const coex_uart1_groups[] = { |
734 | "gpio151" , "gpio152" , |
735 | }; |
736 | |
737 | static const char * const coex_uart2_groups[] = { |
738 | "gpio153" , "gpio154" , |
739 | }; |
740 | |
741 | static const char * const cri_trng_groups[] = { |
742 | "gpio186" , |
743 | }; |
744 | |
745 | static const char * const cri_trng0_groups[] = { |
746 | "gpio183" , |
747 | }; |
748 | |
749 | static const char * const cri_trng1_groups[] = { |
750 | "gpio184" , |
751 | }; |
752 | |
753 | static const char * const dbg_out_groups[] = { |
754 | "gpio14" , |
755 | }; |
756 | |
757 | static const char * const ddr_bist_groups[] = { |
758 | "gpio36" , "gpio37" , "gpio40" , "gpio41" , |
759 | }; |
760 | |
761 | static const char * const ddr_pxi0_groups[] = { |
762 | "gpio51" , "gpio52" , |
763 | }; |
764 | |
765 | static const char * const ddr_pxi1_groups[] = { |
766 | "gpio48" , "gpio49" , |
767 | }; |
768 | |
769 | static const char * const ddr_pxi2_groups[] = { |
770 | "gpio45" , "gpio47" , |
771 | }; |
772 | |
773 | static const char * const ddr_pxi3_groups[] = { |
774 | "gpio43" , "gpio44" , |
775 | }; |
776 | |
777 | static const char * const dp_hot_groups[] = { |
778 | "gpio87" , |
779 | }; |
780 | |
781 | static const char * const dp_lcd_groups[] = { |
782 | "gpio83" , |
783 | }; |
784 | |
785 | static const char * const gcc_gp1_groups[] = { |
786 | "gpio115" , "gpio129" , |
787 | }; |
788 | |
789 | static const char * const gcc_gp2_groups[] = { |
790 | "gpio116" , "gpio130" , |
791 | }; |
792 | |
793 | static const char * const gcc_gp3_groups[] = { |
794 | "gpio117" , "gpio131" , |
795 | }; |
796 | |
797 | static const char * const ibi_i3c_groups[] = { |
798 | "gpio36" , "gpio37" , "gpio56" , "gpio57" , "gpio60" , "gpio61" , |
799 | }; |
800 | |
801 | static const char * const jitter_bist_groups[] = { |
802 | "gpio80" , |
803 | }; |
804 | |
805 | static const char * const lpass_slimbus_groups[] = { |
806 | "gpio129" , "gpio130" , |
807 | }; |
808 | |
809 | static const char * const mdp_vsync_groups[] = { |
810 | "gpio15" , "gpio26" , "gpio82" , "gpio83" , "gpio84" , |
811 | }; |
812 | |
813 | static const char * const mdp_vsync0_groups[] = { |
814 | "gpio86" , |
815 | }; |
816 | |
817 | static const char * const mdp_vsync1_groups[] = { |
818 | "gpio86" , |
819 | }; |
820 | |
821 | static const char * const mdp_vsync2_groups[] = { |
822 | "gpio87" , |
823 | }; |
824 | |
825 | static const char * const mdp_vsync3_groups[] = { |
826 | "gpio87" , |
827 | }; |
828 | |
829 | static const char * const mi2s0_data0_groups[] = { |
830 | "gpio126" , |
831 | }; |
832 | |
833 | static const char * const mi2s0_data1_groups[] = { |
834 | "gpio127" , |
835 | }; |
836 | |
837 | static const char * const mi2s0_sck_groups[] = { |
838 | "gpio125" , |
839 | }; |
840 | |
841 | static const char * const mi2s0_ws_groups[] = { |
842 | "gpio128" , |
843 | }; |
844 | |
845 | static const char * const mi2s1_data0_groups[] = { |
846 | "gpio130" , |
847 | }; |
848 | |
849 | static const char * const mi2s1_data1_groups[] = { |
850 | "gpio131" , |
851 | }; |
852 | |
853 | static const char * const mi2s1_sck_groups[] = { |
854 | "gpio129" , |
855 | }; |
856 | |
857 | static const char * const mi2s1_ws_groups[] = { |
858 | "gpio132" , |
859 | }; |
860 | |
861 | static const char * const mi2s2_data0_groups[] = { |
862 | "gpio121" , |
863 | }; |
864 | |
865 | static const char * const mi2s2_data1_groups[] = { |
866 | "gpio124" , |
867 | }; |
868 | |
869 | static const char * const mi2s2_sck_groups[] = { |
870 | "gpio120" , |
871 | }; |
872 | |
873 | static const char * const mi2s2_ws_groups[] = { |
874 | "gpio122" , |
875 | }; |
876 | |
877 | static const char * const mss_grfc0_groups[] = { |
878 | "gpio141" , "gpio158" , |
879 | }; |
880 | |
881 | static const char * const mss_grfc1_groups[] = { |
882 | "gpio142" , |
883 | }; |
884 | |
885 | static const char * const mss_grfc10_groups[] = { |
886 | "gpio153" , |
887 | }; |
888 | |
889 | static const char * const mss_grfc11_groups[] = { |
890 | "gpio154" , |
891 | }; |
892 | |
893 | static const char * const mss_grfc12_groups[] = { |
894 | "gpio157" , |
895 | }; |
896 | |
897 | static const char * const mss_grfc2_groups[] = { |
898 | "gpio143" , |
899 | }; |
900 | |
901 | static const char * const mss_grfc3_groups[] = { |
902 | "gpio144" , |
903 | }; |
904 | |
905 | static const char * const mss_grfc4_groups[] = { |
906 | "gpio145" , |
907 | }; |
908 | |
909 | static const char * const mss_grfc5_groups[] = { |
910 | "gpio146" , |
911 | }; |
912 | |
913 | static const char * const mss_grfc6_groups[] = { |
914 | "gpio147" , |
915 | }; |
916 | |
917 | static const char * const mss_grfc7_groups[] = { |
918 | "gpio148" , |
919 | }; |
920 | |
921 | static const char * const mss_grfc8_groups[] = { |
922 | "gpio149" , |
923 | }; |
924 | |
925 | static const char * const mss_grfc9_groups[] = { |
926 | "gpio150" , |
927 | }; |
928 | |
929 | static const char * const nav_gpio_groups[] = { |
930 | "gpio155" , "gpio156" , "gpio157" , |
931 | }; |
932 | |
933 | static const char * const pa_indicator_groups[] = { |
934 | "gpio157" , |
935 | }; |
936 | |
937 | static const char * const pcie0_clkreqn_groups[] = { |
938 | "gpio95" , |
939 | }; |
940 | |
941 | static const char * const pcie1_clkreqn_groups[] = { |
942 | "gpio98" , |
943 | }; |
944 | |
945 | static const char * const phase_flag_groups[] = { |
946 | "gpio12" , "gpio13" , "gpio16" , "gpio17" , "gpio28" , "gpio29" , "gpio30" , |
947 | "gpio31" , "gpio32" , "gpio33" , "gpio34" , "gpio35" , "gpio72" , "gpio73" , |
948 | "gpio74" , "gpio75" , "gpio76" , "gpio77" , "gpio78" , "gpio79" , "gpio103" , |
949 | "gpio104" , "gpio105" , "gpio106" , "gpio107" , "gpio108" , "gpio109" , |
950 | "gpio110" , "gpio111" , "gpio112" , "gpio113" , "gpio114" , |
951 | }; |
952 | |
953 | static const char * const pll_bist_groups[] = { |
954 | "gpio81" , |
955 | }; |
956 | |
957 | static const char * const pll_clk_groups[] = { |
958 | "gpio81" , |
959 | }; |
960 | |
961 | static const char * const pri_mi2s_groups[] = { |
962 | "gpio123" , |
963 | }; |
964 | |
965 | static const char * const prng_rosc_groups[] = { |
966 | "gpio185" , |
967 | }; |
968 | |
969 | static const char * const qdss_cti_groups[] = { |
970 | "gpio14" , "gpio27" , "gpio87" , "gpio88" , "gpio89" , "gpio90" , "gpio91" , "gpio92" , |
971 | }; |
972 | |
973 | static const char * const qdss_gpio_groups[] = { |
974 | "gpio100" , "gpio101" , "gpio102" , "gpio103" , "gpio104" , "gpio105" , "gpio106" , "gpio107" , |
975 | "gpio108" , "gpio109" , "gpio110" , "gpio111" , "gpio112" , "gpio113" , "gpio114" , "gpio115" , |
976 | "gpio116" , "gpio117" , "gpio183" , "gpio184" , "gpio185" , "gpio186" , "gpio187" , "gpio188" , |
977 | "gpio189" , "gpio190" , "gpio191" , "gpio192" , "gpio193" , "gpio194" , "gpio195" , "gpio196" , |
978 | "gpio197" , "gpio198" , "gpio199" , "gpio200" , |
979 | }; |
980 | |
981 | static const char * const qlink0_enable_groups[] = { |
982 | "gpio160" , |
983 | }; |
984 | |
985 | static const char * const qlink0_request_groups[] = { |
986 | "gpio159" , |
987 | }; |
988 | |
989 | static const char * const qlink0_wmss_groups[] = { |
990 | "gpio161" , |
991 | }; |
992 | |
993 | static const char * const qlink1_enable_groups[] = { |
994 | "gpio163" , |
995 | }; |
996 | |
997 | static const char * const qlink1_request_groups[] = { |
998 | "gpio162" , |
999 | }; |
1000 | |
1001 | static const char * const qlink1_wmss_groups[] = { |
1002 | "gpio164" , |
1003 | }; |
1004 | |
1005 | static const char * const qlink2_enable_groups[] = { |
1006 | "gpio166" , |
1007 | }; |
1008 | |
1009 | static const char * const qlink2_request_groups[] = { |
1010 | "gpio165" , |
1011 | }; |
1012 | |
1013 | static const char * const qlink2_wmss_groups[] = { |
1014 | "gpio167" , |
1015 | }; |
1016 | |
1017 | static const char * const qspi0_groups[] = { |
1018 | "gpio44" , |
1019 | }; |
1020 | |
1021 | static const char * const qspi1_groups[] = { |
1022 | "gpio45" , |
1023 | }; |
1024 | |
1025 | static const char * const qspi2_groups[] = { |
1026 | "gpio48" , |
1027 | }; |
1028 | |
1029 | static const char * const qspi3_groups[] = { |
1030 | "gpio49" , |
1031 | }; |
1032 | |
1033 | static const char * const qspi_clk_groups[] = { |
1034 | "gpio50" , |
1035 | }; |
1036 | |
1037 | static const char * const qspi_cs_groups[] = { |
1038 | "gpio47" , "gpio51" , |
1039 | }; |
1040 | |
1041 | static const char * const qup0_groups[] = { |
1042 | "gpio4" , "gpio5" , "gpio6" , "gpio7" , |
1043 | }; |
1044 | |
1045 | static const char * const qup1_groups[] = { |
1046 | "gpio8" , "gpio9" , "gpio10" , "gpio11" , |
1047 | }; |
1048 | |
1049 | static const char * const qup10_groups[] = { |
1050 | "gpio44" , "gpio45" , "gpio46" , "gpio47" , |
1051 | }; |
1052 | |
1053 | static const char * const qup11_groups[] = { |
1054 | "gpio48" , "gpio49" , "gpio50" , "gpio51" , |
1055 | }; |
1056 | |
1057 | static const char * const qup12_groups[] = { |
1058 | "gpio52" , "gpio53" , "gpio54" , "gpio55" , |
1059 | }; |
1060 | |
1061 | static const char * const qup13_groups[] = { |
1062 | "gpio0" , "gpio1" , "gpio2" , "gpio3" , |
1063 | }; |
1064 | |
1065 | static const char * const qup14_groups[] = { |
1066 | "gpio56" , "gpio57" , "gpio58" , "gpio59" , |
1067 | }; |
1068 | |
1069 | static const char * const qup15_groups[] = { |
1070 | "gpio60" , "gpio61" , "gpio62" , "gpio63" , |
1071 | }; |
1072 | |
1073 | static const char * const qup16_groups[] = { |
1074 | "gpio64" , "gpio65" , "gpio66" , "gpio67" , |
1075 | }; |
1076 | |
1077 | static const char * const qup17_groups[] = { |
1078 | "gpio72" , "gpio73" , "gpio74" , "gpio75" , |
1079 | }; |
1080 | |
1081 | static const char * const qup18_groups[] = { |
1082 | "gpio68" , "gpio69" , "gpio70" , "gpio71" , |
1083 | }; |
1084 | |
1085 | static const char * const qup19_groups[] = { |
1086 | "gpio76" , "gpio77" , "gpio78" , "gpio79" , |
1087 | }; |
1088 | |
1089 | static const char * const qup2_groups[] = { |
1090 | "gpio12" , "gpio13" , "gpio14" , "gpio15" , |
1091 | }; |
1092 | |
1093 | static const char * const qup3_groups[] = { |
1094 | "gpio16" , "gpio17" , "gpio18" , "gpio19" , |
1095 | }; |
1096 | |
1097 | static const char * const qup4_groups[] = { |
1098 | "gpio20" , "gpio21" , "gpio22" , "gpio23" , |
1099 | }; |
1100 | |
1101 | static const char * const qup5_groups[] = { |
1102 | "gpio24" , "gpio25" , "gpio26" , "gpio27" , |
1103 | }; |
1104 | |
1105 | static const char * const qup6_groups[] = { |
1106 | "gpio28" , "gpio29" , "gpio30" , "gpio31" , |
1107 | }; |
1108 | |
1109 | static const char * const qup7_groups[] = { |
1110 | "gpio32" , "gpio33" , "gpio34" , "gpio35" , |
1111 | }; |
1112 | |
1113 | static const char * const qup8_groups[] = { |
1114 | "gpio36" , "gpio37" , "gpio38" , "gpio39" , |
1115 | }; |
1116 | |
1117 | static const char * const qup9_groups[] = { |
1118 | "gpio40" , "gpio41" , "gpio42" , "gpio43" , |
1119 | }; |
1120 | |
1121 | static const char * const qup_l4_groups[] = { |
1122 | "gpio2" , "gpio6" , "gpio58" , "gpio63" , |
1123 | }; |
1124 | |
1125 | static const char * const qup_l5_groups[] = { |
1126 | "gpio3" , "gpio7" , "gpio59" , "gpio66" , |
1127 | }; |
1128 | |
1129 | static const char * const qup_l6_groups[] = { |
1130 | "gpio10" , "gpio42" , "gpio62" , "gpio67" , |
1131 | }; |
1132 | |
1133 | static const char * const sd_write_groups[] = { |
1134 | "gpio93" , |
1135 | }; |
1136 | |
1137 | static const char * const sdc40_groups[] = { |
1138 | "gpio44" , |
1139 | }; |
1140 | |
1141 | static const char * const sdc41_groups[] = { |
1142 | "gpio45" , |
1143 | }; |
1144 | |
1145 | static const char * const sdc42_groups[] = { |
1146 | "gpio48" , |
1147 | }; |
1148 | |
1149 | static const char * const sdc43_groups[] = { |
1150 | "gpio49" , |
1151 | }; |
1152 | |
1153 | static const char * const sdc4_clk_groups[] = { |
1154 | "gpio50" , |
1155 | }; |
1156 | |
1157 | static const char * const sdc4_cmd_groups[] = { |
1158 | "gpio51" , |
1159 | }; |
1160 | |
1161 | static const char * const sec_mi2s_groups[] = { |
1162 | "gpio124" , |
1163 | }; |
1164 | |
1165 | static const char * const tb_trig_groups[] = { |
1166 | "gpio64" , "gpio136" , |
1167 | }; |
1168 | |
1169 | static const char * const tgu_ch0_groups[] = { |
1170 | "gpio99" , |
1171 | }; |
1172 | |
1173 | static const char * const tgu_ch1_groups[] = { |
1174 | "gpio100" , |
1175 | }; |
1176 | |
1177 | static const char * const tgu_ch2_groups[] = { |
1178 | "gpio101" , |
1179 | }; |
1180 | |
1181 | static const char * const tgu_ch3_groups[] = { |
1182 | "gpio102" , |
1183 | }; |
1184 | |
1185 | static const char * const tsense_pwm1_groups[] = { |
1186 | "gpio88" , |
1187 | }; |
1188 | |
1189 | static const char * const tsense_pwm2_groups[] = { |
1190 | "gpio88" , |
1191 | }; |
1192 | |
1193 | static const char * const uim0_clk_groups[] = { |
1194 | "gpio138" , |
1195 | }; |
1196 | |
1197 | static const char * const uim0_data_groups[] = { |
1198 | "gpio137" , |
1199 | }; |
1200 | |
1201 | static const char * const uim0_present_groups[] = { |
1202 | "gpio140" , |
1203 | }; |
1204 | |
1205 | static const char * const uim0_reset_groups[] = { |
1206 | "gpio139" , |
1207 | }; |
1208 | |
1209 | static const char * const uim1_clk_groups[] = { |
1210 | "gpio134" , |
1211 | }; |
1212 | |
1213 | static const char * const uim1_data_groups[] = { |
1214 | "gpio133" , |
1215 | }; |
1216 | |
1217 | static const char * const uim1_present_groups[] = { |
1218 | "gpio136" , |
1219 | }; |
1220 | |
1221 | static const char * const uim1_reset_groups[] = { |
1222 | "gpio135" , |
1223 | }; |
1224 | |
1225 | static const char * const usb2phy_ac_groups[] = { |
1226 | "gpio39" , "gpio80" , |
1227 | }; |
1228 | |
1229 | static const char * const usb_phy_groups[] = { |
1230 | "gpio81" , |
1231 | }; |
1232 | |
1233 | static const char * const vfr_0_groups[] = { |
1234 | "gpio84" , |
1235 | }; |
1236 | |
1237 | static const char * const vfr_1_groups[] = { |
1238 | "gpio90" , |
1239 | }; |
1240 | |
1241 | static const char * const vsense_trigger_groups[] = { |
1242 | "gpio78" , |
1243 | }; |
1244 | |
1245 | static const struct pinfunction sm8350_functions[] = { |
1246 | MSM_PIN_FUNCTION(atest_char), |
1247 | MSM_PIN_FUNCTION(atest_usb), |
1248 | MSM_PIN_FUNCTION(audio_ref), |
1249 | MSM_PIN_FUNCTION(cam_mclk), |
1250 | MSM_PIN_FUNCTION(cci_async), |
1251 | MSM_PIN_FUNCTION(cci_i2c), |
1252 | MSM_PIN_FUNCTION(cci_timer), |
1253 | MSM_PIN_FUNCTION(cmu_rng), |
1254 | MSM_PIN_FUNCTION(coex_uart1), |
1255 | MSM_PIN_FUNCTION(coex_uart2), |
1256 | MSM_PIN_FUNCTION(cri_trng), |
1257 | MSM_PIN_FUNCTION(cri_trng0), |
1258 | MSM_PIN_FUNCTION(cri_trng1), |
1259 | MSM_PIN_FUNCTION(dbg_out), |
1260 | MSM_PIN_FUNCTION(ddr_bist), |
1261 | MSM_PIN_FUNCTION(ddr_pxi0), |
1262 | MSM_PIN_FUNCTION(ddr_pxi1), |
1263 | MSM_PIN_FUNCTION(ddr_pxi2), |
1264 | MSM_PIN_FUNCTION(ddr_pxi3), |
1265 | MSM_PIN_FUNCTION(dp_hot), |
1266 | MSM_PIN_FUNCTION(dp_lcd), |
1267 | MSM_PIN_FUNCTION(gcc_gp1), |
1268 | MSM_PIN_FUNCTION(gcc_gp2), |
1269 | MSM_PIN_FUNCTION(gcc_gp3), |
1270 | MSM_PIN_FUNCTION(gpio), |
1271 | MSM_PIN_FUNCTION(ibi_i3c), |
1272 | MSM_PIN_FUNCTION(jitter_bist), |
1273 | MSM_PIN_FUNCTION(lpass_slimbus), |
1274 | MSM_PIN_FUNCTION(mdp_vsync), |
1275 | MSM_PIN_FUNCTION(mdp_vsync0), |
1276 | MSM_PIN_FUNCTION(mdp_vsync1), |
1277 | MSM_PIN_FUNCTION(mdp_vsync2), |
1278 | MSM_PIN_FUNCTION(mdp_vsync3), |
1279 | MSM_PIN_FUNCTION(mi2s0_data0), |
1280 | MSM_PIN_FUNCTION(mi2s0_data1), |
1281 | MSM_PIN_FUNCTION(mi2s0_sck), |
1282 | MSM_PIN_FUNCTION(mi2s0_ws), |
1283 | MSM_PIN_FUNCTION(mi2s1_data0), |
1284 | MSM_PIN_FUNCTION(mi2s1_data1), |
1285 | MSM_PIN_FUNCTION(mi2s1_sck), |
1286 | MSM_PIN_FUNCTION(mi2s1_ws), |
1287 | MSM_PIN_FUNCTION(mi2s2_data0), |
1288 | MSM_PIN_FUNCTION(mi2s2_data1), |
1289 | MSM_PIN_FUNCTION(mi2s2_sck), |
1290 | MSM_PIN_FUNCTION(mi2s2_ws), |
1291 | MSM_PIN_FUNCTION(mss_grfc0), |
1292 | MSM_PIN_FUNCTION(mss_grfc1), |
1293 | MSM_PIN_FUNCTION(mss_grfc10), |
1294 | MSM_PIN_FUNCTION(mss_grfc11), |
1295 | MSM_PIN_FUNCTION(mss_grfc12), |
1296 | MSM_PIN_FUNCTION(mss_grfc2), |
1297 | MSM_PIN_FUNCTION(mss_grfc3), |
1298 | MSM_PIN_FUNCTION(mss_grfc4), |
1299 | MSM_PIN_FUNCTION(mss_grfc5), |
1300 | MSM_PIN_FUNCTION(mss_grfc6), |
1301 | MSM_PIN_FUNCTION(mss_grfc7), |
1302 | MSM_PIN_FUNCTION(mss_grfc8), |
1303 | MSM_PIN_FUNCTION(mss_grfc9), |
1304 | MSM_PIN_FUNCTION(nav_gpio), |
1305 | MSM_PIN_FUNCTION(pa_indicator), |
1306 | MSM_PIN_FUNCTION(pcie0_clkreqn), |
1307 | MSM_PIN_FUNCTION(pcie1_clkreqn), |
1308 | MSM_PIN_FUNCTION(phase_flag), |
1309 | MSM_PIN_FUNCTION(pll_bist), |
1310 | MSM_PIN_FUNCTION(pll_clk), |
1311 | MSM_PIN_FUNCTION(pri_mi2s), |
1312 | MSM_PIN_FUNCTION(prng_rosc), |
1313 | MSM_PIN_FUNCTION(qdss_cti), |
1314 | MSM_PIN_FUNCTION(qdss_gpio), |
1315 | MSM_PIN_FUNCTION(qlink0_enable), |
1316 | MSM_PIN_FUNCTION(qlink0_request), |
1317 | MSM_PIN_FUNCTION(qlink0_wmss), |
1318 | MSM_PIN_FUNCTION(qlink1_enable), |
1319 | MSM_PIN_FUNCTION(qlink1_request), |
1320 | MSM_PIN_FUNCTION(qlink1_wmss), |
1321 | MSM_PIN_FUNCTION(qlink2_enable), |
1322 | MSM_PIN_FUNCTION(qlink2_request), |
1323 | MSM_PIN_FUNCTION(qlink2_wmss), |
1324 | MSM_PIN_FUNCTION(qspi0), |
1325 | MSM_PIN_FUNCTION(qspi1), |
1326 | MSM_PIN_FUNCTION(qspi2), |
1327 | MSM_PIN_FUNCTION(qspi3), |
1328 | MSM_PIN_FUNCTION(qspi_clk), |
1329 | MSM_PIN_FUNCTION(qspi_cs), |
1330 | MSM_PIN_FUNCTION(qup0), |
1331 | MSM_PIN_FUNCTION(qup1), |
1332 | MSM_PIN_FUNCTION(qup10), |
1333 | MSM_PIN_FUNCTION(qup11), |
1334 | MSM_PIN_FUNCTION(qup12), |
1335 | MSM_PIN_FUNCTION(qup13), |
1336 | MSM_PIN_FUNCTION(qup14), |
1337 | MSM_PIN_FUNCTION(qup15), |
1338 | MSM_PIN_FUNCTION(qup16), |
1339 | MSM_PIN_FUNCTION(qup17), |
1340 | MSM_PIN_FUNCTION(qup18), |
1341 | MSM_PIN_FUNCTION(qup19), |
1342 | MSM_PIN_FUNCTION(qup2), |
1343 | MSM_PIN_FUNCTION(qup3), |
1344 | MSM_PIN_FUNCTION(qup4), |
1345 | MSM_PIN_FUNCTION(qup5), |
1346 | MSM_PIN_FUNCTION(qup6), |
1347 | MSM_PIN_FUNCTION(qup7), |
1348 | MSM_PIN_FUNCTION(qup8), |
1349 | MSM_PIN_FUNCTION(qup9), |
1350 | MSM_PIN_FUNCTION(qup_l4), |
1351 | MSM_PIN_FUNCTION(qup_l5), |
1352 | MSM_PIN_FUNCTION(qup_l6), |
1353 | MSM_PIN_FUNCTION(sd_write), |
1354 | MSM_PIN_FUNCTION(sdc40), |
1355 | MSM_PIN_FUNCTION(sdc41), |
1356 | MSM_PIN_FUNCTION(sdc42), |
1357 | MSM_PIN_FUNCTION(sdc43), |
1358 | MSM_PIN_FUNCTION(sdc4_clk), |
1359 | MSM_PIN_FUNCTION(sdc4_cmd), |
1360 | MSM_PIN_FUNCTION(sec_mi2s), |
1361 | MSM_PIN_FUNCTION(tb_trig), |
1362 | MSM_PIN_FUNCTION(tgu_ch0), |
1363 | MSM_PIN_FUNCTION(tgu_ch1), |
1364 | MSM_PIN_FUNCTION(tgu_ch2), |
1365 | MSM_PIN_FUNCTION(tgu_ch3), |
1366 | MSM_PIN_FUNCTION(tsense_pwm1), |
1367 | MSM_PIN_FUNCTION(tsense_pwm2), |
1368 | MSM_PIN_FUNCTION(uim0_clk), |
1369 | MSM_PIN_FUNCTION(uim0_data), |
1370 | MSM_PIN_FUNCTION(uim0_present), |
1371 | MSM_PIN_FUNCTION(uim0_reset), |
1372 | MSM_PIN_FUNCTION(uim1_clk), |
1373 | MSM_PIN_FUNCTION(uim1_data), |
1374 | MSM_PIN_FUNCTION(uim1_present), |
1375 | MSM_PIN_FUNCTION(uim1_reset), |
1376 | MSM_PIN_FUNCTION(usb2phy_ac), |
1377 | MSM_PIN_FUNCTION(usb_phy), |
1378 | MSM_PIN_FUNCTION(vfr_0), |
1379 | MSM_PIN_FUNCTION(vfr_1), |
1380 | MSM_PIN_FUNCTION(vsense_trigger), |
1381 | }; |
1382 | |
1383 | /* Every pin is maintained as a single group, and missing or non-existing pin |
1384 | * would be maintained as dummy group to synchronize pin group index with |
1385 | * pin descriptor registered with pinctrl core. |
1386 | * Clients would not be able to request these dummy pin groups. |
1387 | */ |
1388 | static const struct msm_pingroup sm8350_groups[] = { |
1389 | [0] = PINGROUP(0, qup13, _, _, _, _, _, _, _, _), |
1390 | [1] = PINGROUP(1, qup13, _, _, _, _, _, _, _, _), |
1391 | [2] = PINGROUP(2, qup13, qup_l4, _, _, _, _, _, _, _), |
1392 | [3] = PINGROUP(3, qup13, qup_l5, _, _, _, _, _, _, _), |
1393 | [4] = PINGROUP(4, qup0, _, _, _, _, _, _, _, _), |
1394 | [5] = PINGROUP(5, qup0, _, _, _, _, _, _, _, _), |
1395 | [6] = PINGROUP(6, qup0, qup_l4, _, _, _, _, _, _, _), |
1396 | [7] = PINGROUP(7, qup0, qup_l5, _, _, _, _, _, _, _), |
1397 | [8] = PINGROUP(8, qup1, _, _, _, _, _, _, _, _), |
1398 | [9] = PINGROUP(9, qup1, _, _, _, _, _, _, _, _), |
1399 | [10] = PINGROUP(10, qup1, qup_l6, _, _, _, _, _, _, _), |
1400 | [11] = PINGROUP(11, qup1, _, _, _, _, _, _, _, _), |
1401 | [12] = PINGROUP(12, qup2, phase_flag, _, _, _, _, _, _, _), |
1402 | [13] = PINGROUP(13, qup2, phase_flag, _, _, _, _, _, _, _), |
1403 | [14] = PINGROUP(14, qup2, qdss_cti, dbg_out, _, _, _, _, _, _), |
1404 | [15] = PINGROUP(15, qup2, mdp_vsync, _, _, _, _, _, _, _), |
1405 | [16] = PINGROUP(16, qup3, phase_flag, _, _, _, _, _, _, _), |
1406 | [17] = PINGROUP(17, qup3, phase_flag, _, _, _, _, _, _, _), |
1407 | [18] = PINGROUP(18, qup3, _, _, _, _, _, _, _, _), |
1408 | [19] = PINGROUP(19, qup3, _, _, _, _, _, _, _, _), |
1409 | [20] = PINGROUP(20, qup4, _, _, _, _, _, _, _, _), |
1410 | [21] = PINGROUP(21, qup4, _, _, _, _, _, _, _, _), |
1411 | [22] = PINGROUP(22, qup4, _, _, _, _, _, _, _, _), |
1412 | [23] = PINGROUP(23, qup4, _, _, _, _, _, _, _, _), |
1413 | [24] = PINGROUP(24, qup5, _, _, _, _, _, _, _, _), |
1414 | [25] = PINGROUP(25, qup5, _, _, _, _, _, _, _, _), |
1415 | [26] = PINGROUP(26, qup5, mdp_vsync, _, _, _, _, _, _, _), |
1416 | [27] = PINGROUP(27, qup5, qdss_cti, _, _, _, _, _, _, _), |
1417 | [28] = PINGROUP(28, qup6, phase_flag, _, _, _, _, _, _, _), |
1418 | [29] = PINGROUP(29, qup6, phase_flag, _, _, _, _, _, _, _), |
1419 | [30] = PINGROUP(30, qup6, phase_flag, _, _, _, _, _, _, _), |
1420 | [31] = PINGROUP(31, qup6, phase_flag, _, _, _, _, _, _, _), |
1421 | [32] = PINGROUP(32, qup7, phase_flag, _, _, _, _, _, _, _), |
1422 | [33] = PINGROUP(33, qup7, phase_flag, _, _, _, _, _, _, _), |
1423 | [34] = PINGROUP(34, qup7, phase_flag, _, _, _, _, _, _, _), |
1424 | [35] = PINGROUP(35, qup7, phase_flag, _, _, _, _, _, _, _), |
1425 | [36] = PINGROUP(36, qup8, ibi_i3c, ddr_bist, _, _, _, _, _, _), |
1426 | [37] = PINGROUP(37, qup8, ibi_i3c, ddr_bist, _, _, _, _, _, _), |
1427 | [38] = PINGROUP(38, qup8, _, _, _, _, _, _, _, _), |
1428 | [39] = PINGROUP(39, qup8, usb2phy_ac, _, _, _, _, _, _, _), |
1429 | [40] = PINGROUP(40, qup9, ddr_bist, _, _, _, _, _, _, _), |
1430 | [41] = PINGROUP(41, qup9, ddr_bist, _, _, _, _, _, _, _), |
1431 | [42] = PINGROUP(42, qup9, qup_l6, _, _, _, _, _, _, _), |
1432 | [43] = PINGROUP(43, qup9, ddr_pxi3, _, _, _, _, _, _, _), |
1433 | [44] = PINGROUP(44, qup10, qspi0, sdc40, ddr_pxi3, _, _, _, _, _), |
1434 | [45] = PINGROUP(45, qup10, qspi1, sdc41, ddr_pxi2, _, _, _, _, _), |
1435 | [46] = PINGROUP(46, qup10, _, _, _, _, _, _, _, _), |
1436 | [47] = PINGROUP(47, qup10, qspi_cs, ddr_pxi2, _, _, _, _, _, _), |
1437 | [48] = PINGROUP(48, qup11, qspi2, sdc42, ddr_pxi1, _, _, _, _, _), |
1438 | [49] = PINGROUP(49, qup11, qspi3, sdc43, ddr_pxi1, _, _, _, _, _), |
1439 | [50] = PINGROUP(50, qup11, qspi_clk, sdc4_clk, _, _, _, _, _, _), |
1440 | [51] = PINGROUP(51, qup11, qspi_cs, sdc4_cmd, ddr_pxi0, _, _, _, _, _), |
1441 | [52] = PINGROUP(52, qup12, ddr_pxi0, _, _, _, _, _, _, _), |
1442 | [53] = PINGROUP(53, qup12, _, _, _, _, _, _, _, _), |
1443 | [54] = PINGROUP(54, qup12, _, _, _, _, _, _, _, _), |
1444 | [55] = PINGROUP(55, qup12, atest_usb, _, _, _, _, _, _, _), |
1445 | [56] = PINGROUP(56, qup14, ibi_i3c, _, _, _, _, _, _, _), |
1446 | [57] = PINGROUP(57, qup14, ibi_i3c, _, _, _, _, _, _, _), |
1447 | [58] = PINGROUP(58, qup14, qup_l4, _, _, _, _, _, _, _), |
1448 | [59] = PINGROUP(59, qup14, qup_l5, _, _, _, _, _, _, _), |
1449 | [60] = PINGROUP(60, qup15, ibi_i3c, _, _, _, _, _, _, _), |
1450 | [61] = PINGROUP(61, qup15, ibi_i3c, _, _, _, _, _, _, _), |
1451 | [62] = PINGROUP(62, qup15, qup_l6, _, _, _, _, _, _, _), |
1452 | [63] = PINGROUP(63, qup15, qup_l4, _, _, _, _, _, _, _), |
1453 | [64] = PINGROUP(64, qup16, tb_trig, _, _, _, _, _, _, _), |
1454 | [65] = PINGROUP(65, qup16, _, _, _, _, _, _, _, _), |
1455 | [66] = PINGROUP(66, qup16, qup_l5, _, _, _, _, _, _, _), |
1456 | [67] = PINGROUP(67, qup16, qup_l6, _, _, _, _, _, _, _), |
1457 | [68] = PINGROUP(68, qup18, _, _, _, _, _, _, _, _), |
1458 | [69] = PINGROUP(69, qup18, _, _, _, _, _, _, _, _), |
1459 | [70] = PINGROUP(70, qup18, _, _, _, _, _, _, _, _), |
1460 | [71] = PINGROUP(71, qup18, _, _, _, _, _, _, _, _), |
1461 | [72] = PINGROUP(72, qup17, phase_flag, _, _, _, _, _, _, _), |
1462 | [73] = PINGROUP(73, qup17, phase_flag, _, _, _, _, _, _, _), |
1463 | [74] = PINGROUP(74, qup17, phase_flag, _, _, _, _, _, _, _), |
1464 | [75] = PINGROUP(75, qup17, phase_flag, _, _, _, _, _, _, _), |
1465 | [76] = PINGROUP(76, qup19, phase_flag, _, _, _, _, _, _, _), |
1466 | [77] = PINGROUP(77, qup19, phase_flag, _, _, _, _, _, _, _), |
1467 | [78] = PINGROUP(78, qup19, phase_flag, _, vsense_trigger, _, _, _, _, _), |
1468 | [79] = PINGROUP(79, qup19, phase_flag, _, _, _, _, _, _, _), |
1469 | [80] = PINGROUP(80, usb2phy_ac, jitter_bist, atest_usb, _, _, _, _, _, _), |
1470 | [81] = PINGROUP(81, usb_phy, pll_bist, pll_clk, atest_usb, _, _, _, _, _), |
1471 | [82] = PINGROUP(82, mdp_vsync, _, _, _, _, _, _, _, _), |
1472 | [83] = PINGROUP(83, mdp_vsync, dp_lcd, _, _, _, _, _, _, _), |
1473 | [84] = PINGROUP(84, mdp_vsync, vfr_0, _, _, _, _, _, _, _), |
1474 | [85] = PINGROUP(85, atest_char, _, _, _, _, _, _, _, _), |
1475 | [86] = PINGROUP(86, mdp_vsync0, mdp_vsync1, atest_char, _, _, _, _, _, _), |
1476 | [87] = PINGROUP(87, dp_hot, mdp_vsync2, mdp_vsync3, qdss_cti, atest_char, _, _, _, _), |
1477 | [88] = PINGROUP(88, qdss_cti, tsense_pwm1, tsense_pwm2, _, _, _, _, _, _), |
1478 | [89] = PINGROUP(89, qdss_cti, _, _, _, _, _, _, _, _), |
1479 | [90] = PINGROUP(90, vfr_1, qdss_cti, _, _, _, _, _, _, _), |
1480 | [91] = PINGROUP(91, qdss_cti, _, _, _, _, _, _, _, _), |
1481 | [92] = PINGROUP(92, qdss_cti, _, _, _, _, _, _, _, _), |
1482 | [93] = PINGROUP(93, sd_write, _, _, _, _, _, _, _, _), |
1483 | [94] = PINGROUP(94, _, _, _, _, _, _, _, _, _), |
1484 | [95] = PINGROUP(95, pcie0_clkreqn, _, _, _, _, _, _, _, _), |
1485 | [96] = PINGROUP(96, _, _, _, _, _, _, _, _, _), |
1486 | [97] = PINGROUP(97, _, _, _, _, _, _, _, _, _), |
1487 | [98] = PINGROUP(98, pcie1_clkreqn, _, _, _, _, _, _, _, _), |
1488 | [99] = PINGROUP(99, tgu_ch0, _, _, _, _, _, _, _, _), |
1489 | [100] = PINGROUP(100, cam_mclk, tgu_ch1, qdss_gpio, _, _, _, _, _, _), |
1490 | [101] = PINGROUP(101, cam_mclk, tgu_ch2, qdss_gpio, _, _, _, _, _, _), |
1491 | [102] = PINGROUP(102, cam_mclk, tgu_ch3, qdss_gpio, _, _, _, _, _, _), |
1492 | [103] = PINGROUP(103, cam_mclk, phase_flag, _, qdss_gpio, _, _, _, _, _), |
1493 | [104] = PINGROUP(104, cam_mclk, phase_flag, _, qdss_gpio, _, _, _, _, _), |
1494 | [105] = PINGROUP(105, cam_mclk, phase_flag, _, qdss_gpio, _, _, _, _, _), |
1495 | [106] = PINGROUP(106, cci_async, phase_flag, _, qdss_gpio, _, _, _, _, _), |
1496 | [107] = PINGROUP(107, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), |
1497 | [108] = PINGROUP(108, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), |
1498 | [109] = PINGROUP(109, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), |
1499 | [110] = PINGROUP(110, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), |
1500 | [111] = PINGROUP(111, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), |
1501 | [112] = PINGROUP(112, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), |
1502 | [113] = PINGROUP(113, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), |
1503 | [114] = PINGROUP(114, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), |
1504 | [115] = PINGROUP(115, cci_timer, gcc_gp1, qdss_gpio, atest_char, _, _, _, _, _), |
1505 | [116] = PINGROUP(116, cci_timer, gcc_gp2, qdss_gpio, _, _, _, _, _, _), |
1506 | [117] = PINGROUP(117, cci_timer, gcc_gp3, qdss_gpio, atest_char, _, _, _, _, _), |
1507 | [118] = PINGROUP(118, cci_timer, cci_async, _, _, _, _, _, _, _), |
1508 | [119] = PINGROUP(119, cci_timer, cci_async, _, _, _, _, _, _, _), |
1509 | [120] = PINGROUP(120, mi2s2_sck, _, _, _, _, _, _, _, _), |
1510 | [121] = PINGROUP(121, mi2s2_data0, _, _, _, _, _, _, _, _), |
1511 | [122] = PINGROUP(122, mi2s2_ws, _, _, _, _, _, _, _, _), |
1512 | [123] = PINGROUP(123, pri_mi2s, _, _, _, _, _, _, _, _), |
1513 | [124] = PINGROUP(124, sec_mi2s, audio_ref, mi2s2_data1, _, _, _, _, _, _), |
1514 | [125] = PINGROUP(125, mi2s0_sck, _, _, _, _, _, _, _, _), |
1515 | [126] = PINGROUP(126, mi2s0_data0, _, _, _, _, _, _, _, _), |
1516 | [127] = PINGROUP(127, mi2s0_data1, _, _, _, _, _, _, _, _), |
1517 | [128] = PINGROUP(128, mi2s0_ws, _, _, _, _, _, _, _, _), |
1518 | [129] = PINGROUP(129, lpass_slimbus, mi2s1_sck, gcc_gp1, _, _, _, _, _, _), |
1519 | [130] = PINGROUP(130, lpass_slimbus, mi2s1_data0, gcc_gp2, _, _, _, _, _, _), |
1520 | [131] = PINGROUP(131, mi2s1_data1, gcc_gp3, _, _, _, _, _, _, _), |
1521 | [132] = PINGROUP(132, mi2s1_ws, _, _, _, _, _, _, _, _), |
1522 | [133] = PINGROUP(133, uim1_data, _, _, _, _, _, _, _, _), |
1523 | [134] = PINGROUP(134, uim1_clk, _, _, _, _, _, _, _, _), |
1524 | [135] = PINGROUP(135, uim1_reset, _, _, _, _, _, _, _, _), |
1525 | [136] = PINGROUP(136, uim1_present, tb_trig, _, _, _, _, _, _, _), |
1526 | [137] = PINGROUP(137, uim0_data, _, _, _, _, _, _, _, _), |
1527 | [138] = PINGROUP(138, uim0_clk, _, _, _, _, _, _, _, _), |
1528 | [139] = PINGROUP(139, uim0_reset, _, _, _, _, _, _, _, _), |
1529 | [140] = PINGROUP(140, uim0_present, _, _, _, _, _, _, _, _), |
1530 | [141] = PINGROUP(141, _, mss_grfc0, _, _, _, _, _, _, _), |
1531 | [142] = PINGROUP(142, _, mss_grfc1, _, _, _, _, _, _, _), |
1532 | [143] = PINGROUP(143, _, mss_grfc2, _, _, _, _, _, _, _), |
1533 | [144] = PINGROUP(144, _, mss_grfc3, _, _, _, _, _, _, _), |
1534 | [145] = PINGROUP(145, _, mss_grfc4, _, _, _, _, _, _, _), |
1535 | [146] = PINGROUP(146, _, mss_grfc5, _, _, _, _, _, _, _), |
1536 | [147] = PINGROUP(147, _, mss_grfc6, _, _, _, _, _, _, _), |
1537 | [148] = PINGROUP(148, _, mss_grfc7, _, _, _, _, _, _, _), |
1538 | [149] = PINGROUP(149, _, mss_grfc8, _, _, _, _, _, _, _), |
1539 | [150] = PINGROUP(150, _, mss_grfc9, _, _, _, _, _, _, _), |
1540 | [151] = PINGROUP(151, coex_uart1, atest_usb, _, _, _, _, _, _, _), |
1541 | [152] = PINGROUP(152, coex_uart1, atest_usb, _, _, _, _, _, _, _), |
1542 | [153] = PINGROUP(153, coex_uart2, mss_grfc10, atest_usb, _, _, _, _, _, _), |
1543 | [154] = PINGROUP(154, coex_uart2, mss_grfc11, atest_usb, _, _, _, _, _, _), |
1544 | [155] = PINGROUP(155, nav_gpio, _, _, _, _, _, _, _, _), |
1545 | [156] = PINGROUP(156, nav_gpio, _, _, _, _, _, _, _, _), |
1546 | [157] = PINGROUP(157, mss_grfc12, pa_indicator, nav_gpio, _, _, _, _, _, _), |
1547 | [158] = PINGROUP(158, mss_grfc0, atest_usb, _, _, _, _, _, _, _), |
1548 | [159] = PINGROUP(159, qlink0_request, atest_usb, _, _, _, _, _, _, _), |
1549 | [160] = PINGROUP(160, qlink0_enable, _, _, _, _, _, _, _, _), |
1550 | [161] = PINGROUP(161, qlink0_wmss, atest_usb, _, _, _, _, _, _, _), |
1551 | [162] = PINGROUP(162, qlink1_request, _, _, _, _, _, _, _, _), |
1552 | [163] = PINGROUP(163, qlink1_enable, _, _, _, _, _, _, _, _), |
1553 | [164] = PINGROUP(164, qlink1_wmss, _, _, _, _, _, _, _, _), |
1554 | [165] = PINGROUP(165, qlink2_request, _, _, _, _, _, _, _, _), |
1555 | [166] = PINGROUP(166, qlink2_enable, _, _, _, _, _, _, _, _), |
1556 | [167] = PINGROUP(167, qlink2_wmss, _, _, _, _, _, _, _, _), |
1557 | [168] = PINGROUP(168, _, _, _, _, _, _, _, _, _), |
1558 | [169] = PINGROUP(169, _, _, _, _, _, _, _, _, _), |
1559 | [170] = PINGROUP(170, _, _, _, _, _, _, _, _, _), |
1560 | [171] = PINGROUP(171, _, _, _, _, _, _, _, _, _), |
1561 | [172] = PINGROUP(172, _, _, _, _, _, _, _, _, _), |
1562 | [173] = PINGROUP(173, _, _, _, _, _, _, _, _, _), |
1563 | [174] = PINGROUP(174, cmu_rng, _, _, _, _, _, _, _, _), |
1564 | [175] = PINGROUP(175, cmu_rng, _, _, _, _, _, _, _, _), |
1565 | [176] = PINGROUP(176, cmu_rng, _, _, _, _, _, _, _, _), |
1566 | [177] = PINGROUP(177, cmu_rng, _, _, _, _, _, _, _, _), |
1567 | [178] = PINGROUP(178, _, _, _, _, _, _, _, _, _), |
1568 | [179] = PINGROUP(179, _, _, _, _, _, _, _, _, _), |
1569 | [180] = PINGROUP(180, _, _, _, _, _, _, _, _, _), |
1570 | [181] = PINGROUP(181, _, _, _, _, _, _, _, _, _), |
1571 | [182] = PINGROUP(182, _, _, _, _, _, _, _, _, _), |
1572 | [183] = PINGROUP(183, cri_trng0, qdss_gpio, _, _, _, _, _, _, _), |
1573 | [184] = PINGROUP(184, cri_trng1, qdss_gpio, _, _, _, _, _, _, _), |
1574 | [185] = PINGROUP(185, prng_rosc, qdss_gpio, _, _, _, _, _, _, _), |
1575 | [186] = PINGROUP(186, cri_trng, qdss_gpio, _, _, _, _, _, _, _), |
1576 | [187] = PINGROUP(187, qdss_gpio, _, _, _, _, _, _, _, _), |
1577 | [188] = PINGROUP(188, qdss_gpio, _, _, _, _, _, _, _, _), |
1578 | [189] = PINGROUP(189, qdss_gpio, _, _, _, _, _, _, _, _), |
1579 | [190] = PINGROUP(190, qdss_gpio, _, _, _, _, _, _, _, _), |
1580 | [191] = PINGROUP(191, qdss_gpio, _, _, _, _, _, _, _, _), |
1581 | [192] = PINGROUP(192, qdss_gpio, _, _, _, _, _, _, _, _), |
1582 | [193] = PINGROUP(193, qdss_gpio, _, _, _, _, _, _, _, _), |
1583 | [194] = PINGROUP(194, qdss_gpio, _, _, _, _, _, _, _, _), |
1584 | [195] = PINGROUP(195, qdss_gpio, _, _, _, _, _, _, _, _), |
1585 | [196] = PINGROUP(196, qdss_gpio, _, _, _, _, _, _, _, _), |
1586 | [197] = PINGROUP(197, qdss_gpio, _, _, _, _, _, _, _, _), |
1587 | [198] = PINGROUP(198, qdss_gpio, _, _, _, _, _, _, _, _), |
1588 | [199] = PINGROUP(199, qdss_gpio, _, _, _, _, _, _, _, _), |
1589 | [200] = PINGROUP(200, qdss_gpio, _, _, _, _, _, _, _, _), |
1590 | [201] = PINGROUP(201, _, _, _, _, _, _, _, _, _), |
1591 | [202] = PINGROUP(202, _, _, _, _, _, _, _, _, _), |
1592 | [203] = UFS_RESET(ufs_reset, 0xd8000), |
1593 | [204] = SDC_PINGROUP(sdc2_clk, 0xcf000, 14, 6), |
1594 | [205] = SDC_PINGROUP(sdc2_cmd, 0xcf000, 11, 3), |
1595 | [206] = SDC_PINGROUP(sdc2_data, 0xcf000, 9, 0), |
1596 | }; |
1597 | |
1598 | static const struct msm_gpio_wakeirq_map sm8350_pdc_map[] = { |
1599 | { 2, 117 }, { 7, 82 }, { 11, 83 }, { 14, 80 }, { 15, 146 }, |
1600 | { 19, 121 }, { 23, 84 }, { 26, 86 }, { 27, 75 }, { 31, 85 }, |
1601 | { 32, 97 }, { 34, 98 }, { 35, 131 }, { 36, 79 }, { 38, 99 }, |
1602 | { 39, 92 }, { 40, 101 }, { 43, 137 }, { 44, 102 }, { 46, 96 }, |
1603 | { 47, 93 }, { 50, 108 }, { 51, 127 }, { 55, 128 }, { 56, 81 }, |
1604 | { 59, 112 }, { 60, 119 }, { 63, 73 }, { 67, 74 }, { 71, 134 }, |
1605 | { 75, 103 }, { 79, 104 }, { 80, 126 }, { 81, 139 }, { 82, 140 }, |
1606 | { 83, 141 }, { 84, 124 }, { 85, 109 }, { 86, 143 }, { 87, 138 }, |
1607 | { 88, 122 }, { 89, 113 }, { 90, 114 }, { 91, 115 }, { 92, 76 }, |
1608 | { 95, 147 }, { 96, 148 }, { 98, 149 }, { 99, 150 }, { 115, 125 }, |
1609 | { 116, 106 }, { 117, 105 }, { 118, 116 }, { 119, 123 }, { 130, 145 }, |
1610 | { 136, 72 }, { 140, 100 }, { 151, 110 }, { 153, 95 }, { 155, 107 }, |
1611 | { 156, 94 }, { 157, 111 }, { 159, 118 }, { 162, 77 }, { 165, 78 }, |
1612 | { 169, 70 }, { 172, 132 }, { 174, 87 }, { 175, 88 }, { 177, 89 }, |
1613 | { 179, 120 }, { 180, 129 }, { 183, 90 }, { 185, 136 }, { 187, 142 }, |
1614 | { 190, 144 }, { 198, 91 }, { 200, 133 }, { 202, 135 }, |
1615 | }; |
1616 | |
1617 | static const struct msm_pinctrl_soc_data sm8350_tlmm = { |
1618 | .pins = sm8350_pins, |
1619 | .npins = ARRAY_SIZE(sm8350_pins), |
1620 | .functions = sm8350_functions, |
1621 | .nfunctions = ARRAY_SIZE(sm8350_functions), |
1622 | .groups = sm8350_groups, |
1623 | .ngroups = ARRAY_SIZE(sm8350_groups), |
1624 | .ngpios = 204, |
1625 | .wakeirq_map = sm8350_pdc_map, |
1626 | .nwakeirq_map = ARRAY_SIZE(sm8350_pdc_map), |
1627 | }; |
1628 | |
1629 | static int sm8350_tlmm_probe(struct platform_device *pdev) |
1630 | { |
1631 | return msm_pinctrl_probe(pdev, soc_data: &sm8350_tlmm); |
1632 | } |
1633 | |
1634 | static const struct of_device_id sm8350_tlmm_of_match[] = { |
1635 | { .compatible = "qcom,sm8350-tlmm" , }, |
1636 | { }, |
1637 | }; |
1638 | |
1639 | static struct platform_driver sm8350_tlmm_driver = { |
1640 | .driver = { |
1641 | .name = "sm8350-tlmm" , |
1642 | .of_match_table = sm8350_tlmm_of_match, |
1643 | }, |
1644 | .probe = sm8350_tlmm_probe, |
1645 | .remove_new = msm_pinctrl_remove, |
1646 | }; |
1647 | |
1648 | static int __init sm8350_tlmm_init(void) |
1649 | { |
1650 | return platform_driver_register(&sm8350_tlmm_driver); |
1651 | } |
1652 | arch_initcall(sm8350_tlmm_init); |
1653 | |
1654 | static void __exit sm8350_tlmm_exit(void) |
1655 | { |
1656 | platform_driver_unregister(&sm8350_tlmm_driver); |
1657 | } |
1658 | module_exit(sm8350_tlmm_exit); |
1659 | |
1660 | MODULE_DESCRIPTION("QTI SM8350 TLMM driver" ); |
1661 | MODULE_LICENSE("GPL v2" ); |
1662 | MODULE_DEVICE_TABLE(of, sm8350_tlmm_of_match); |
1663 | |